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Register renaming method and system for out-of-order high-performance processor

A high-performance processor and register renaming technology, applied in register devices, machine execution devices, concurrent instruction execution, etc., can solve the problems of increasing the complexity of operand reading structures, and achieve the effect of improving processor performance

Inactive Publication Date: 2020-06-02
核芯互联科技(青岛)有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In the existing processor technology, when renaming registers through ROB, an operand will be stored in two places during its life cycle, and the complexity of the operand reading structure will also increase.

Method used

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  • Register renaming method and system for out-of-order high-performance processor
  • Register renaming method and system for out-of-order high-performance processor

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Embodiment Construction

[0033] The implementation mode of the present invention is illustrated by specific specific examples below, and those who are familiar with this technology can easily understand other advantages and effects of the present invention from the contents disclosed in this description. Obviously, the described embodiments are a part of the present invention. , but not all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0034]When register renaming is performed by reordering buffer (Re-order Buffer, ROB) in the prior art, the register value will be stored in the architecture register file and reordering cache, and the reordering cache stores the results of instructions that have not been submitted , while the architectural register file stores the committed values ​​to be written to the architectural registers. ...

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Abstract

The invention discloses a register renaming method and a system for an out-of-order high-performance processor. The method comprises the steps of constructing a parameterized processor model of an electronic system level ESL based on a high-level language, converting processor core components into an actual circuit through a hardware generator, and the core components comprise an instruction information classifier and a register renaming component for optimizing the structure of a reordering buffer; analyzing actual processor performance in real time and determining related parameters of the core component through a performance monitoring component composed of one or more hardware counters; and the performance monitoring component is used for counting performance data of the branch predictor component, the instruction information classifier, the reordering buffer, the renaming buffer and the instruction distribution component of the processor. In addition, based on the optimized register renaming structure, a fine-granularity instruction in-advance retirement mechanism is realized, and the performance of the processor can be further improved.

Description

technical field [0001] The invention relates to the technical field of computer processors, in particular to a register renaming method and system for out-of-order high-performance processors. Background technique [0002] With the continuous development of science and technology, the application fields of processors are becoming more and more extensive, and at the same time, the performance requirements of processors are also constantly increasing. The methods for improving processor performance mainly include: increasing the main frequency of the processor, and increasing instruction-level parallelism. In recent years, it is no longer necessary to increase processor performance deliberately by increasing the main frequency, but improving instruction-level parallelism has become the main means of improving processor performance. The main factors that limit the parallel execution of instructions include: data correlation, control correlation and name correlation. The regis...

Claims

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Application Information

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IPC IPC(8): G06F9/30G06F9/38
CPCG06F9/30098G06F9/38
Inventor 陈伟杰
Owner 核芯互联科技(青岛)有限公司
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