Thick glue photoetching method for smooth forming of side wall of deep mesa structure

Abstract

The invention provides a thick photoresist photoetching method for smooth forming of a side wall of a deep mesa structure. The thick photoresist photoetching method comprises the following steps: coating a layer of uniform and compact positive photoresist on the surface of a chip by using spin coating equipment; pre-baking: placing the chip coated with the photoresist in a first temperature environment for baking; placing the pre-baked chip on a sample table of a contact type photoetching machine, placing a mask plate, adjusting WEC to a proper position, and then performing exposure; post-baking: placing the exposed chip in a first temperature environment for baking; developing: preparing a proper developing solution, and placing the post-baked chip in the developing solution to remove the photosensitive part so as to complete the forming of the mesa mask; and carrying out hardening process treatment on the developed chip by adopting a gradient heating mode. According to the invention, the quality of the side wall can be improved, the roughness of the side wall can be reduced, the adhesion quality of the passivation layer can be improved, and the performance of the infrared detector can be improved.

Description

Technical Field

[0001] The invention relates to the technical field of infrared detector preparation, and in particular to a thick-resin photolithography method for smoothly molding the side walls of a deep mesa structure. Background Art

[0002] Photolithography is a critical step in the manufacture of semiconductor devices, which involves transferring the pattern on the mask to the photoresist. When light shines through the mask onto the photoresist, the photoresist changes its properties depending on whether it is exposed to light, and then the exposed part can be removed by chemical treatment (such as development), leaving the desired pattern.

[0003] For infrared detectors with array specifications (i.e., an array composed of multiple pixel units), the isolation between pixels has a greater impact on dark current, which refers to the current generated inside the device when there is no external signal input. This is an undesirable noise source for infrared detectors. Improving the isolation between pixel units, especially the quality of the side walls, can reduce the level of dark current, thereby improving the overall performance of the detector.

[0004] In order to form the pixel unit of the area array infrared detector, dry etching technology is usually used to realize the formation of the mesa structure. Dry etching is a technology that can precisely control the removal of materials and is suitable for applications that require high-precision patterning. Then, a passivation film is formed on the sidewalls of the mesa structure by plasma enhanced chemical vapor deposition (PE-CVD) technology to reduce surface defects and further reduce dark current. In addition, an opening is required on the top of the mesa to facilitate subsequent electrode contact.

[0005] However, in the above process, when ultraviolet light passes through the slit for exposure, a diffraction effect is generated on the photoresist, resulting in irregular lines on the edge of the mask. These lines will be amplified in the subsequent dry etching step, causing the mesa surface to become uneven and increasing the surface area of ​​the sidewalls. This result will not only increase the dark current, but also affect the quality of the passivation layer, and thus affect the final pixel performance. Summary of the invention

[0006] The invention provides a thick-resin photolithography method for smoothly molding the side wall of a deep mesa structure, which solves the problem of how to overcome the roughness of the mesa side wall caused by the diffraction effect occurring during the photolithography and etching process.

[0007] In order to achieve the above objectives, this application adopts the following technical solutions:

[0008] A thick resist photolithography method for smoothly forming the side wall of a deep mesa structure is provided, comprising:

[0009] A uniform and dense positive photoresist layer is coated on the chip surface using a spin coating device;

[0010] Pre-baking: placing the chip coated with photoresist under a first temperature environment for baking;

[0011] Placing the pre-baked chip on a contact lithography machine sample stage and placing a mask, adjusting the WEC to a suitable position and then performing exposure;

[0012] Post-baking: placing the exposed chip in the first temperature environment for baking;

[0013] Development: preparing a suitable developer, placing the post-baked chip in the developer to remove the photosensitive portion, and completing the formation of the mesa mask;

[0014] The developed chip is subjected to a hardening process by adopting a gradient temperature increase method.

[0015] In a first possible implementation manner, the step of performing a hardening process on the developed chip by using a gradient temperature increase method includes:

[0016] Placing the developed chip in a second temperature environment for an initial hardening treatment for a first set time;

[0017] performing a hardening treatment for a second set time at a third temperature, a fourth temperature, and a fifth temperature respectively;

[0018] The second temperature is lower than the first temperature; the second temperature, the third temperature, the fourth temperature and the fifth temperature increase in sequence.

[0019] Based on the first possible implementation, in a second possible implementation, the first temperature is configured to be 110° C.;

[0020] The step of performing a hardening process on the developed chip by using a gradient temperature increase method includes:

[0021] Placing the developed chip in an environment of 100° C. for an initial hardening treatment for a first set time;

[0022] The hardening treatment is performed for the second set time in the environments of 110° C., 120° C. and 140° C., respectively.

[0023] Based on the second possible implementation manner, in a third possible implementation manner, the first set time is greater than the second set time.

[0024] Based on the third possible implementation, in a fourth possible implementation, the first set time is configured to be 10 minutes, and the second set time is configured to be 5 minutes.

[0025] In a fifth possible implementation manner, before the pre-baking step, the following steps are performed:

[0026] Check the photoresist layer under a yellow light microscope to ensure that it is uniform and dense and free of impurities and bubbles;

[0027] Use a scalpel to remove excess photoresist from the edge of the chip.

[0028] Based on any possible implementation, in a sixth possible implementation, the photoresist is configured as AZ4620 type photoresist.

[0029] The present application removes the solvent in the photoresist through pre-baking to solidify the photoresist, thereby enhancing its adhesion to the substrate and reducing expansion and contraction in subsequent processing. The photoresist becomes more solid and can better withstand subsequent exposure and development processes, thereby improving the resolution and fidelity of the graphics. Post-baking is performed after exposure to accelerate the chemical reaction of the photosensitive agent in the photoresist, ensure that the difference between the exposed area and the non-exposed area is maximized, improve the quality of the graphics, and reduce the edge blurring of the graphics during development. The hardening process of the photoresist is further enhanced through a gradient temperature increase, especially the side wall quality is improved, the roughness of the side wall is reduced, which helps to improve the adhesion quality of the passivation layer, thereby improving the performance of the infrared detector. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic flow chart of a thick resist photolithography method for smoothing the sidewalls of a deep mesa structure provided in an embodiment of the present application;

[0031] Figure 2 Scanning electron microscope images of the surface formation after different hardening film processes provided in the embodiments of the present application. DETAILED DESCRIPTION

[0032] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined purpose, the technical solutions in the embodiments of the present application are clearly described. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0033] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the terms used in this way are interchangeable where appropriate, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0034] The description of the method flow in the specification of the present application and the steps of the flowchart in the drawings of the present specification do not have to be strictly executed according to the step numbers, and the method steps can be executed in a different order. Moreover, some steps can be omitted, multiple steps can be combined into one step, and / or one step can be decomposed into multiple steps.

[0035] In the following, in conjunction with the accompanying drawings and preferred embodiments, a thick resist photolithography method for smoothing the sidewall of a deep mesa structure provided in an embodiment of the present application is described in detail as follows.

[0036] First, an application scenario of a thick resist photolithography method for smoothing the sidewalls of a deep mesa structure according to an embodiment of the present application is described in detail.

[0037] The dual-color superlattice infrared detector is a table-type structure with a pixel depth of about 8μm. The table is formed under a photoresist mask. The hardening temperature of the general photoresist mask process is 100℃, and the obtained table pattern is consistent with the photoresist pattern. However, due to the diffraction of ultraviolet light when passing through the slit, it will cause uneven diffraction marks on the side wall of the mask, which will cause the marks to be magnified under dry etching, resulting in uneven table test, increasing the side wall surface area, and the rough side wall is not conducive to the passivation layer coverage, which seriously affects the pixel quality.

[0038] Based on this, the present application aims to improve the performance of infrared detectors by improving photoresist materials and their processing technology, especially by adopting multi-stage high-temperature treatment in the hardening stage, so as to solve the problem of roughness of the mesa sidewalls existing in the prior art.

[0039] See also Figure 1 The present application embodiment provides a thick resist photolithography method for smoothly forming the sidewall of a deep mesa structure, such as Figure 1 As shown, the method of the embodiment of the present application includes the following steps:

[0040] Step S1, using a spin coating device to coat a uniform and dense positive photoresist layer on the surface of the chip.

[0041] Furthermore, after coating the photoresist, the photoresist layer is checked under a yellow light microscope to ensure that it is uniform and dense and free of impurities and bubbles; and a scalpel is used to remove excess photoresist at the edge of the chip.

[0042] Furthermore, AZ4620 photoresist with slightly lower sensitivity to ultraviolet light can be selected as the mesa mask. Due to its lower sensitivity, AZ4620 photoresist can provide clearer and smoother pattern boundaries during the exposure process. This helps to maintain the flatness of the mesa sidewall in the subsequent etching step, thereby reducing the roughness of the sidewall.

[0043] Step S2, pre-baking: placing the chip coated with photoresist in an environment of 110° C. for baking.

[0044] In specific implementation, the chip coated with photoresist is placed on a hot plate at 110° C. for baking to remove the solvent in the photoresist and improve its strength so that it can better support the subsequent exposure process.

[0045] Setting a higher pre-bake temperature (110° C.) can effectively increase the strength of the photoresist, reduce the diffraction effect of the photoresist during the photolithography process, and thus improve the quality of the final mesa structure.

[0046] Step S3, placing the pre-baked chip on the sample stage of the contact lithography machine and placing the mask, adjusting the WEC to a suitable position and then performing exposure.

[0047] WEC (Wavefront Error Correction) is a wavefront error correction, which is performed after adjusting to the appropriate position.

[0048] Step S4, post-baking: the exposed chip is placed in a 110° C. environment for baking.

[0049] After exposure to a suitable exposure dose, the post-baked chip is placed on a hot plate at 100°C for post-baking to ensure that the photoresist is fully reacted and fully formed to form the desired pattern to ensure pattern quality.

[0050] Step S5, development: prepare a suitable developer, place the chip in the developer to remove the photosensitive portion, and complete the formation of the mesa mask.

[0051] Step S6, using a gradient temperature increase method to perform a hardening process on the developed chip.

[0052] Specifically, it includes:

[0053] Step S601 , placing the developed chip in a 100° C. environment for an initial hardening treatment for a first set time.

[0054] In step S602, a hardening treatment is performed for a second set time at 110° C., 120° C. and 140° C. respectively.

[0055] In specific implementation, the chip after development microscopy is placed on a 100°C hot plate for gradient temperature hardening for 10 minutes, then placed on a 110°C hot plate for 5 minutes, on a 120°C hot plate for 5 minutes, and on a 140°C hot plate for 5 minutes to complete the hardening.

[0056] The hardening process with gradient temperature rise makes the side wall of photoresist melt back, which improves the strength of photoresist and shrinks the side wall of photoresist, thus improving the quality of side wall. After the hardening process, the side wall of the mesa is smoother, the side surface area is reduced, and the adhesion quality of the passivation layer is improved.

[0057] The present application removes the solvent in the photoresist through pre-baking to solidify the photoresist, thereby enhancing its adhesion to the substrate and reducing expansion and contraction in subsequent processing. The photoresist becomes more solid and can better withstand subsequent exposure and development processes, thereby improving the resolution and fidelity of the graphics. Post-baking is performed after exposure to accelerate the chemical reaction of the photosensitive agent in the photoresist, ensure that the difference between the exposed area and the non-exposed area is maximized, improve the quality of the graphics, and reduce the edge blurring of the graphics during development. The hardening process of the photoresist is further enhanced through a gradient temperature increase, especially the side wall quality is improved, the roughness of the side wall is reduced, which helps to improve the adhesion quality of the passivation layer, thereby improving the performance of the infrared detector.

[0058] See also Figure 2 , Figure 2 The scanning electron microscope images of the surface after different hardening processes are shown in FIG. 1 . The former is the traditional low-temperature hardening process, and the latter is the gradient high-temperature hardening process of the present application. Figure 2 As shown in the figure, it can be seen that the depth of the two-color superlattice terrace formed by the photoresist mask is about 8.6μm, the terrace pattern prepared by the traditional photolithography process is closer to the photoresist plate, and the terrace pattern formed by the photoresist mask after the gradient high-temperature hardening film tends to be a round square; from the side wall forming effect of the terrace, the side wall of the terrace and the covered passivation layer of the traditional photolithography process are jagged, and the side wall and passivation layer of the terrace of the photoresist mask after the gradient high-temperature hardening film are smooth.

[0059] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0060] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A thick resist photolithography method for smoothing the sidewall of a deep mesa structure, characterized in that: include: A uniform and dense positive photoresist layer is coated on the chip surface using a spin coating device; Pre-baking: placing the chip coated with photoresist under a first temperature environment for baking; Placing the pre-baked chip on a contact lithography machine sample stage and placing a mask, adjusting the WEC to a suitable position and then performing exposure; Post-baking: placing the exposed chip in the first temperature environment for baking; Development: preparing a suitable developer, placing the post-baked chip in the developer to remove the photosensitive portion, and completing the formation of the mesa mask; The developed chip is subjected to a hardening process by adopting a gradient temperature increase method.

2. The thick resist photolithography method for smoothing the sidewall of a deep mesa structure according to claim 1, characterized in that: The step of performing a hardening process on the developed chip by using a gradient temperature increase method includes: Placing the developed chip in a second temperature environment for an initial hardening treatment for a first set time; performing a hardening treatment for a second set time at a third temperature, a fourth temperature, and a fifth temperature respectively; The second temperature is lower than the first temperature; the second temperature, the third temperature, the fourth temperature and the fifth temperature increase in sequence.

3. The thick resist photolithography method for smoothing the sidewall of a deep mesa structure according to claim 2, characterized in that: The first temperature is configured to be 110°C; The step of performing a hardening process on the developed chip by using a gradient temperature increase method includes: Placing the developed chip in an environment of 100° C. for an initial hardening treatment for a first set time; The hardening treatment is performed for the second set time in the environments of 110° C., 120° C. and 140° C., respectively.

4. The thick resist photolithography method for smoothing the sidewall of a deep mesa structure according to claim 3, characterized in that: The first set time is greater than the second set time.

5. The thick resist photolithography method for smoothing the sidewall of a deep mesa structure according to claim 4, characterized in that: The first set time is configured as 10 minutes, and the second set time is configured as 5 minutes.

6. The thick resist photolithography method for smoothing the sidewall of a deep mesa structure according to claim 1, characterized in that: Before the pre-baking step, the following steps are performed: Check the photoresist layer under a yellow light microscope to ensure that it is uniform and dense and free of impurities and bubbles; Use a scalpel to remove excess photoresist from the edge of the chip.

7. The thick resist photolithography method for smoothing the side wall of a deep mesa structure according to any one of claims 1 to 6, characterized in that: The photoresist configuration is AZ4620 type photoresist.

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