Method for manufacturing mask, mask, and frame-integrated mask

Abstract

The present invention relates to a method for manufacturing a mask, a mask, and a frame-integrated mask. The method for manufacturing a mask of the present invention comprises the following steps: (a) forming a patterned first insulating portion on one side of a metal sheet; (b) forming a first mask pattern of a predetermined depth on one side of the metal sheet by wet etching; (c) filling a second insulating portion at least in the first mask pattern; (d) volatilizing at least a portion of the second insulating portion by baking; (e) exposing the upper portion of the first insulating portion, leaving only the second insulating portion located vertically below the first insulating portion; and (f) performing wet etching on one side of the metal sheet to form a second mask pattern that penetrates the other side of the metal sheet from the first mask pattern.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a mask, a mask and a frame-integrated mask, and more particularly to a method for manufacturing a mask, a mask and a frame-integrated mask capable of accurately controlling the size and position of a mask pattern. Background Art

[0002] Recently, research on the electroforming method for thin plate manufacturing is underway. The electroforming method is a method that can manufacture electrode thin plates and is expected to be mass-produced by immersing an anode body and a cathode body in an electrolyte and applying power to deposit a metal thin plate on the surface of the cathode body.

[0003] On the other hand, as a technology for forming pixels in an OLED (Organic Light Emitting Diode) manufacturing process, a fine metal mask (FMM) method is mainly used, in which a metal mask (Shadow Mask) in the form of a thin film is closely attached to a substrate and an organic substance is deposited at a desired position.

[0004] The existing mask manufacturing method prepares a metal sheet used as a mask, performs PR coating on the metal sheet and then performs patterning, or performs PR coating to make a pattern and then performs etching to manufacture a mask having a pattern. However, in order to prevent the shadow effect, it is difficult to make the mask pattern obliquely taper, and an additional process is required, which leads to an increase in process time and cost and a decrease in productivity.

[0005] In ultra-high-definition OLEDs, the existing QHD image quality is 500-600 PPI (pixel per inch), and the pixel size is about 30-50 μm, while 4K UHD and 8K UHD have higher resolutions of ~860 PPI and ~1600 PPI, etc. Therefore, it is urgent to develop a technology that can accurately adjust the size of the mask pattern.

[0006] In addition, in the existing OLED manufacturing process, after the mask is manufactured into a strip shape, a plate shape, etc., the mask is welded and fixed to the OLED pixel deposition frame and used. In order to manufacture large-area OLEDs, multiple masks can be fixed in the OLED pixel deposition frame, and in the process of fixing them to the frame, each mask is stretched to make it flat. In the process of fixing multiple masks to a frame, there is still a problem of poor alignment between masks and between mask units. In addition, in the process of welding the mask to the frame, because the thickness of the mask film is too thin and the area is large, there is a problem of the mask sagging or twisting due to the load.

[0007] In this way, considering the pixel size of ultra-high-definition OLED, the alignment error between each unit needs to be reduced to a few μm. If the error exceeds this, it will lead to defective products, so the yield may be extremely low. Therefore, it is necessary to develop a technology that can prevent deformation such as sagging or twisting of the mask and make the alignment accurate, as well as a technology to fix the mask to the frame. Summary of the invention

[0008] Technical issues

[0009] Therefore, the present invention has been made to solve the above-mentioned problems in the prior art, and an object of the present invention is to provide a method for manufacturing a mask, a mask, and a frame-integrated mask capable of accurately controlling the size of a mask pattern.

[0010] Technical Solution

[0011] The above-mentioned object of the present invention is achieved through a mask manufacturing method, which includes the following steps: (a) forming a patterned first insulating portion on one side of a metal sheet; (b) forming a first mask pattern of a predetermined depth on one side of the metal sheet by wet etching; (c) filling a second insulating portion at least within the first mask pattern; (d) volatilizing at least a portion of the second insulating portion by baking; (e) exposing the upper portion of the first insulating portion and leaving only the second insulating portion located vertically below the first insulating portion; and (f) performing wet etching on one side of the metal sheet to form a second mask pattern that passes through the other side of the metal sheet from the first mask pattern.

[0012] A width of the second mask pattern may be smaller than a width of the first mask pattern.

[0013] The predetermined depth of the first mask pattern may have a value smaller than a thickness of the metal sheet.

[0014] The sum of the shapes of the first mask pattern and the second mask pattern may have a cone shape or an inverted cone shape as a whole.

[0015] In the step of forming the first mask pattern, the first mask pattern may be formed to have a width greater than a space between patterns of the first insulating portion.

[0016] Undercut portions may be formed at lower portions of both sides of the first insulating portion.

[0017] In the step of leaving only the second insulating portion located at a vertically lower portion of the first insulating portion, the second insulating portion may remain in the space where the undercut portion is formed.

[0018] When the upper portion of the first insulating portion is exposed to light, the first insulating portion may function as an exposure mask for the second insulating portion.

[0019] A thickness of the first mask pattern may be greater than a thickness of the second mask pattern.

[0020] The first insulating portion may be a black matrix photoresist or a photoresist material with a metal plating film formed on the upper portion.

[0021] The second insulating part may be a positive type photoresist material.

[0022] In the step of filling the second insulating portion in the first mask pattern, the second insulating portion diluted in a solvent may be filled, and the solvent may be volatilized by baking.

[0023] The pattern width of the remaining second insulating portion located vertically below the first insulating portion may correspond to the width of the pattern of the first insulating portion.

[0024] When the second mask pattern is formed by wet etching, the second insulating portion may function as a mask for the wet etching.

[0025] The metal sheet formed with the first mask pattern and the second mask pattern can be used as a fine metal mask (FMM) in OLED pixel deposition.

[0026] The metal sheet may be any one of invar, super invar, nickel, and nickel-cobalt.

[0027] The thickness of the metal sheet may be 2 μm to 50 μm.

[0028] When a metal sheet is manufactured by an electroforming process, a conductive substrate is used as a cathode body, and a metal sheet is formed by electroforming on one side of the conductive substrate. The substrate may be a doped single crystal silicon material or one of Invar alloy, super Invar alloy, Si, Ti, Cu, Ag, GaN, SiC, GaAs, GaP, AlN, InN, InP, Ge, Al2O3, graphite, graphene, perovskite structured ceramics, and super heat-resistant alloy materials.

[0029] In addition, the above-mentioned object of the present invention is achieved by a mask for forming an OLED pixel having a plurality of mask patterns, wherein the mask pattern of the mask includes a first mask pattern at the top and a second mask pattern at the bottom, wherein the width of the second mask pattern is smaller than the width of the first mask pattern, and both side surfaces of the first mask pattern and the second mask pattern have curvature.

[0030] In addition, the above-mentioned purpose of the present invention is achieved through a frame-integrated mask, which is formed integrally by multiple masks with multiple mask patterns and a frame for supporting the masks, wherein the frame includes: an edge frame portion having a hollow area; and a mask unit sheet portion having multiple mask unit areas and connected to the edge frame portion, each mask is connected to the upper part of the mask unit sheet portion, and the mask pattern of the mask includes a first mask pattern at the upper part and a second mask pattern at the lower part, the width of the second mask pattern is smaller than the width of the first mask pattern, and the two side surfaces of the first mask pattern and the second mask pattern have curvature.

[0031] Beneficial Effects

[0032] According to the present invention constituted as described above, there is an effect that the size and position of the mask pattern can be accurately controlled. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a schematic diagram of a conventional OLED pixel deposition mask.

[0034] Figure 2 1 is a schematic diagram showing a conventional process of bonding a mask to a frame.

[0035] Figure 3 is a schematic diagram showing the alignment error between cells that occurs in the conventional stretch mask process.

[0036] Figure 4 1 is a front view and a side cross-sectional view showing a frame-integrated mask according to an embodiment of the present invention.

[0037] Figure 5 1 is a front view and a side cross-sectional view showing a frame according to an embodiment of the present invention.

[0038] Figure 6 FIG. 1 is a schematic diagram showing a mask according to an embodiment of the present invention.

[0039] Figure 7 This is a schematic diagram showing a conventional mask manufacturing process.

[0040] Figures 8 to 10 FIG. 1 is a schematic diagram showing a process of manufacturing a mask according to an embodiment of the present invention.

[0041] Fig.11 This is a schematic diagram showing the degree of etching of a mask according to a comparative example of the present invention.

[0042] Fig.12 FIG. 1 is a schematic diagram showing the etching degree of a mask according to an embodiment of the present invention.

[0043] Fig.13 FIG. 4 is a schematic diagram showing the adjustment of the taper angle according to an embodiment of the present invention.

[0044] Fig.14 FIG. 4 is a graph showing the coefficient of thermal expansion (CTE) of a mask after heat treatment according to an embodiment of the present invention.

[0045] Fig.15 FIG. 1 is a schematic diagram showing a state in which a mask and a frame are matched to a cell region according to an embodiment of the present invention.

[0046] Fig.16 FIG. 1 is a schematic diagram showing a process of aligning a mask to a unit region of a frame and bonding the mask to the frame according to an embodiment of the present invention.

[0047] Fig.17 is a schematic diagram illustrating a process of lowering the temperature of a process region after bonding a mask to a unit region of a frame according to an embodiment of the present invention.

[0048] Fig.18 FIG. 1 is a schematic diagram showing an OLED pixel deposition apparatus using a frame-integrated mask according to an embodiment of the present invention.

[0049] Reference numerals:

[0050] 50: Conductive substrate

[0051] 100: Mask

[0052] 110: Mask film, metal sheet

[0053] 200: Frame

[0054] 210: Edge frame

[0055] 220: Mask unit sheet portion

[0056] 221: Edge sheet section

[0057] 223: First grid sheet section

[0058] 225: Second grid sheet section

[0059] 1000: OLED pixel deposition device

[0060] C: Unit, mask unit

[0061] CR: Mask cell region

[0062] ET: Raise the temperature of the process area to the first temperature

[0063] LE: Laser etching or dry etching

[0064] LT: Lower the temperature of the process area to a second temperature

[0065] M1: First insulation part

[0066] M2, M2': Second insulation part

[0067] M2”: The second insulating part remaining after exposure

[0068] R: Hollow area of ​​the edge frame

[0069] P: mask pattern

[0070] P1, P1-1, P1-2: First mask pattern

[0071] P2, P2-1, P2-2: Second mask pattern

[0072] W: Welding

[0073] WE1, WE2: wet etching DETAILED DESCRIPTION

[0074] The following detailed description of the present invention can be referred to the accompanying drawings which are diagrams of specific embodiments that can be implemented by the present invention. In order to enable those skilled in the art to implement the present invention, these embodiments are described in detail below. It should be understood that the various embodiments of the present invention are different from each other, but not mutually exclusive. For example, the specific shape, structure and features of an embodiment recorded herein can be implemented by other embodiments without exceeding the spirit and scope of the present invention. In addition, it should be noted that the position or arrangement of individual components in each disclosed embodiment can be changed without exceeding the spirit and scope of the present invention. Therefore, the detailed description described below is not intended to be limiting. To be precise, as long as it can be reasonably explained, the scope of the present invention will be limited by all scopes equivalent to the claims and the attached claims. Similar figure marks in the drawings represent the same or similar functions in various aspects, and for ease of description, length and area, thickness, etc. and their shapes can also be expressed in an enlarged manner.

[0075] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention.

[0076] Figure 1 1 is a schematic diagram showing a conventional mask 10 for OLED pixel deposition.

[0077] Reference Figure 1 The existing mask 10 can be manufactured in a stick-type or a plate-type. Figure 1The mask 10 shown in (a) is used as a strip mask, and both sides of the strip can be welded and fixed to the OLED pixel deposition frame and used. Figure 1 The mask 100 shown in (b) can be used as a plate mask in a large-area pixel formation process.

[0078] The body (Body, or mask film 11) of the mask 10 has a plurality of display cells C. One cell C corresponds to one display of a smartphone, etc. A pixel pattern P is formed in the cell C so as to correspond to each pixel of the display. When the cell C is enlarged, a plurality of pixel patterns P corresponding to R, G, and B are displayed. As an example, a pixel pattern P is formed in the cell C so as to have a resolution of 70×140. That is, a large number of pixel patterns P are formed as a set to constitute one cell C, and a plurality of cells C can be formed on the mask 10.

[0079] Figure 2 1 is a schematic diagram showing a conventional process of bonding the mask 10 to the frame 20 . Figure 3 FIG. 1 is a schematic diagram showing the alignment error between cells that occurs during the conventional stretching process of the F1-F2 mask 10. Figure 1 The stripe mask 10 having six cells C ( C1 - C6 ) shown in (a) is taken as an example for description.

[0080] Reference Figure 2 (a), first, the strip mask 10 should be unfolded flatly. A tensile force F1-F2 is applied along the long axis direction of the strip mask 10, and the strip mask 10 is unfolded as it is stretched. In this state, the strip mask 10 is loaded on a frame 20 in a square frame shape. The cells C1-C6 of the strip mask 10 will be located in the blank area inside the frame 20. The size of the frame 20 can be sufficient to allow the cells C1-C6 of one strip mask 10 to be located in the blank area inside the frame, and can also be sufficient to allow the cells C1-C6 of multiple strip masks 10 to be located in the blank area inside the frame.

[0081] Reference Figure 2 (b), after fine-tuning the tensile forces F1-F2 applied to the respective sides of the strip mask 10 while performing alignment, a portion of the side surface of the strip mask 10 is welded, and the strip mask 10 and the frame 20 are connected. Figure 2 (c) shows a side section of the stripe mask 10 and the frame connected to each other.

[0082] Reference Figure 3, despite fine-tuning the stretching force F1-F2 applied to each side of the strip mask 10, the problem of poor alignment between the mask units C1-C3 still occurs. For example, the distances D1-D1", D2-D2" between the patterns P of the units C1-C3 are different from each other, or the pattern P is skewed. Since the strip mask 10 has a large area including a plurality of (as an example, 6) units C1-C6 and has a very thin thickness of tens of μm, it is easy to sag or twist due to the load. In addition, it is a very difficult task to adjust the stretching force F1-F2 so that all the units C1-C6 become flat while confirming the alignment status between the units C1-C6 in real time through a microscope.

[0083] Therefore, a slight error in the stretching force F1-F2 may cause an error in the stretching or expansion degree of each unit C1-C3 of the strip mask 10, thereby resulting in different distances D1-D1", D2-D2" between the mask patterns P. Although it is very difficult to perfectly align so that the error is 0, in order to avoid the mask pattern P with a size of several μm to tens of μm from having a bad influence on the pixel process of the ultra-high-definition OLED, the alignment error is preferably not greater than 3 μm. The alignment error between such adjacent units is called pixel position accuracy (PPA).

[0084] In addition, it is a very difficult task to connect approximately 6-20 strip masks 10 respectively to one frame 20 while accurately aligning the multiple strip masks 10 and the multiple units C-C6 of the strip masks 10, and it will only increase the process time based on alignment, which will become an important reason for reducing productivity.

[0085] On the other hand, after the strip mask 10 is connected and fixed to the frame 20, the tensile force F1-F2 applied to the strip mask 10 can act on the frame 20 in reverse. That is, after the strip mask 10 is connected to the frame 20 by the tensile force F1-F2 being stretched, tension can be applied to the frame 20. Generally, when the tension is not large, it will not have a great impact on the frame 20, but when the size of the frame 20 is miniaturized and the strength is reduced, this tension will cause the frame 20 to deform slightly. In this way, the alignment state between the plurality of cells C1-C6 may be destroyed.

[0086] In view of this, the present invention proposes a frame 200 and a frame-integrated mask that can form an integrated structure of the mask 100 and the frame 200. Not only can the mask 100 formed integrally with the frame 200 be prevented from being deformed such as sagging or twisting, but it can also be accurately aligned with the frame 200. When the mask 100 is connected to the frame 200, no tensile force is applied to the mask 100, so after the mask 100 is connected to the frame 200, no tension that causes deformation is applied to the frame 200. In addition, the manufacturing time of integrally connecting the mask 100 to the frame 200 can be significantly shortened, and the yield can be significantly improved.

[0087] Figure 4 1 is a front view showing a frame-integrated mask according to an embodiment of the present invention ( Figure 4 (a)) and side cross-sectional view ( Figure 4 (b)), Figure 5 is a front view showing a frame according to an embodiment of the present invention ( Figure 5 (a)) and side cross-sectional view ( Figure 5 (b)).

[0088] Reference Figure 4 as well as Figure 5 , the frame-integrated mask may include a plurality of masks 100 and a frame 200. In other words, the plurality of masks 100 are bonded to the frame 200. Below, for the sake of convenience, although a quadrangular mask 100 is used as an example, the mask 100 may be a strip-shaped mask with protrusions for clamping on both sides before being bonded to the frame 200, and the protrusions may be removed after being bonded to the frame 200.

[0089] A plurality of mask patterns P are formed on each mask 100, and one mask 100 may be formed with one unit C. One mask unit C may correspond to one display of a smartphone or the like. To form a thinner thickness, the mask 100 may use a metal sheet produced by electroforming or rolling. The mask 100 may have a thermal expansion coefficient of about 1.0×10 -6 / ℃ of Invar alloy or about 1.0×10 -7 / ℃ super invar material. Since the thermal expansion coefficient of the mask 100 made of this material is very low, the pattern shape of the mask is less likely to be deformed by heat energy, so it can be used as a fine metal mask and a shadow mask in the manufacture of high-resolution OLEDs. In addition, considering that a technology for implementing a pixel deposition process within a range of small temperature changes has been recently developed, the mask 100 can also be made of materials such as nickel (Ni) and nickel-cobalt (Ni-Co) with a slightly larger thermal expansion coefficient than the material.

[0090] In addition, the metal sheet obtained by the rolling process may have a thickness of tens to hundreds of μm in the manufacturing process. In order to finely form the mask pattern P described later, it is necessary to thin the thickness of such a metal sheet. Therefore, a process of thinning the thickness of the metal sheet to about 50 μm or less by a method such as CMP may be further performed. The thickness of the mask is preferably about 2 to 50 μm, more preferably about 5 to 20 μm, but is not limited thereto.

[0091] If a metal sheet produced by a rolling process is used, there is a problem that the thickness is greater than the thickness of the plating film formed by electroforming, but since the coefficient of thermal expansion (CTE) is low, no additional heat treatment process is required and it has the advantage of strong corrosion resistance.

[0092] The frame 200 is formed in a form capable of bonding a plurality of masks 100. The frame 200 may include a plurality of corners formed along a first direction (e.g., lateral direction) and a second direction (e.g., vertical direction) including the outermost edge. Such a plurality of corners may divide the region for bonding the mask 100 on the frame 200.

[0093] The frame 200 may include an edge frame portion 210 that is approximately quadrangular or square. The inside of the edge frame portion 210 may be hollow. That is, the edge frame portion 210 may include a hollow region R. The frame 200 may be formed of metal materials such as Invar, Super Invar, aluminum, and titanium. Considering thermal deformation, the frame 200 is preferably formed of materials such as Invar, Super Invar, nickel, and nickel-cobalt that have the same thermal expansion coefficient as the mask. These materials may be applied to the edge frame portion 210 and the mask unit sheet portion 220 that are components of the frame 200.

[0094] In addition, the frame 200 has a plurality of mask unit regions CR, and may include a mask unit sheet portion 220 connected to the edge frame portion 210. The mask unit sheet portion 220 is the same as the mask 100, and may be formed by electroforming, rolling, or by other film forming processes. In addition, the mask unit sheet portion 220 may be connected to the edge frame portion 210 after forming a plurality of mask unit regions CR on a planar sheet by laser scribing, etching, etc. Alternatively, the mask unit sheet portion 220 may form a plurality of mask unit regions CR by laser scribing, etching, etc. after connecting a planar sheet to the edge frame portion 210. This specification mainly describes the case where a plurality of mask unit regions CR are first formed on the mask unit sheet portion 220 and then connected to the edge frame portion 210.

[0095] The mask unit sheet portion 220 may include at least one of an edge sheet portion 221, a first grid sheet portion 223, and a second grid sheet portion 225. The edge sheet portion 221, the first grid sheet portion 223, and the second grid sheet portion 225 are parts divided on the same sheet and are integrated with each other.

[0096] The edge sheet portion 221 may be substantially connected to the edge frame portion 210. Therefore, the edge sheet portion 221 may have a substantially quadrangular shape or a square frame shape corresponding to the edge frame portion 210.

[0097] In addition, the first grid sheet portion 223 may be formed to extend along the first direction (lateral direction). The first grid sheet portion 223 is formed in a straight line, and both ends thereof may be connected to the edge sheet portion 221. When the mask unit sheet portion 220 includes a plurality of first grid sheet portions 223, each first grid sheet portion 223 preferably has the same pitch.

[0098] In addition, the second grid sheet portion 225 may be formed to extend along the second direction (vertical direction), and the second grid sheet portion 225 may be formed in a straight line, and both ends thereof may be connected to the edge sheet portion 221. The first grid sheet portion 223 and the second grid sheet portion 225 may cross each other vertically. When the mask unit sheet portion 220 includes a plurality of second grid sheet portions 225, each second grid sheet portion 225 preferably has the same spacing.

[0099] On the other hand, depending on the size of the mask unit C, the intervals between the first grid sheet portions 223 and the intervals between the second grid sheet portions 225 may be the same or different.

[0100] Although the first grid sheet portion 223 and the second grid sheet portion 225 have a thin film-like thickness, the cross-sectional shape perpendicular to the length direction can be a quadrilateral shape such as a rectangle, a parallelogram, a triangle, etc., and the sides and corners can be rounded. The cross-sectional shape can be adjusted during laser scribing, etching, etc.

[0101] The thickness of the edge frame portion 210 may be greater than the thickness of the mask unit sheet portion 220. Since the edge frame portion 210 is responsible for the overall rigidity of the frame 200, it may be formed to have a thickness of several mm to several cm.

[0102] As for the mask unit sheet portion 220, it is actually difficult to manufacture a thick sheet. If it is too thick, it is possible that the organic source 600 (refer to Fig.18) blocks the path through the mask 100. On the contrary, if it is too thin, it may be difficult to ensure sufficient rigidity to support the mask 100. Therefore, the mask unit sheet portion 220 is preferably thinner than the edge frame portion 210, but thicker than the mask 100. The thickness of the mask unit sheet portion 220 can be about 0.1 mm to 1 mm. In addition, the width of the first grid sheet portion 223 and the second grid sheet portion 225 can be about 1 to 5 mm.

[0103] In the planar sheet, a plurality of mask unit regions CR (CR11 to CR56) may be provided in addition to the regions occupied by the edge sheet portion 221, the first grid sheet portion 223, and the second grid sheet portion 225. From another perspective, the mask unit region CR may refer to a blank region in the hollow region R of the edge frame portion 210 except for the regions occupied by the edge sheet portion 221, the first grid sheet portion 223, and the second grid sheet portion 225.

[0104] As the cell C of the mask 100 corresponds to the mask cell region CR, it can be used as a channel for depositing pixels of the OLED through the mask pattern P. As described above, one mask cell C corresponds to one display of a smartphone or the like. A mask pattern P for constituting one cell C may be formed in one mask 100. Alternatively, one mask 100 has a plurality of cells C and each cell C may correspond to each cell region CR of the frame 200, but in order to accurately align the mask 100, it is necessary to avoid using a large area of ​​the mask 100, and the mask 100 is preferably a small area with one cell C. Alternatively, one mask 100 having a plurality of cells C may also correspond to one cell region CR of the frame 200. At this time, in order to accurately align, it may be considered to correspond to a mask 100 having a small number of cells C of about 2-3.

[0105] The frame 200 has a plurality of mask cell regions CR, and the respective masks 100 may be bonded so that the respective mask cells C correspond to the respective mask cell regions CR.

[0106] Figure 6 FIG. 1 is a schematic diagram showing a mask 100 according to an embodiment of the present invention.

[0107] Each mask 100 may include a mask unit C formed with a plurality of mask patterns P and a dummy portion (equivalent to a portion of the mask film 110 other than the unit C) around the mask unit C. The dummy portion may include only the mask film 110, or may include a mask film 110 formed with a predetermined dummy portion pattern having a similar form to the mask pattern P. The mask unit C corresponds to the mask unit region CR of the frame 200, and a portion or all of the dummy portion may be bonded to the frame 200 (mask unit sheet portion 220). Thus, the mask 100 and the frame 200 may form an integrated structure.

[0108] On the other hand, according to another embodiment, the frame is not manufactured by bonding the mask unit sheet portion 220 to the edge frame portion 210, but a frame in which a grid frame (equivalent to the grid sheet portions 223 and 225) integrated with the edge frame portion 210 is directly formed in the hollow region R of the edge frame portion 210. This form of frame also includes at least one mask unit region CR, and a frame-integrated mask can be manufactured by matching the mask 100 with the mask unit region CR.

[0109] The process of manufacturing the mask 100 is described below.

[0110] Figure 7 This is a schematic diagram showing a conventional mask manufacturing process.

[0111] Reference Figure 7 , the existing mask manufacturing process only performs wet etching.

[0112] First, if Figure 7 As shown in (a), a patterned photoresist M may be formed on a planar film (sheet) 110'. Then, as Figure 7 (b) wet etching WE can be performed through the space between the patterned photoresists M. After wet etching WE, part of the space of the film 110' is penetrated, so that the mask pattern P' can be formed. Then, the photoresist M is cleaned, and the film 110' formed with the mask pattern P' can be completed, that is, the manufacture of the mask 100' is completed.

[0113] like Figure 7 As shown in (b), the existing mask 100' has the problem of non-constant size of the mask pattern P'. Since the wet etching WE is performed isotropically, the shape after etching is roughly arc-shaped. Moreover, since it is difficult to keep the etching speed of each part consistent during the wet etching WE process, the widths R1', R1", and R1"' of the through pattern after penetrating the film 110' can only be different. In particular, in patterns where undercuts UC (undercut) occur frequently, not only is the lower width R1" of the mask pattern P' formed wider, but the upper width R2" is also formed wider, while in patterns where undercuts UC occur less frequently, the lower widths R1', R1"' and the upper widths R2', R2"' are relatively narrow.

[0114] As a result, the existing mask 100' has the problem of uneven size of each mask pattern P'. As for ultra-high-definition OLED, the current QHD image quality is 500-600 PPI (pixel per inch), and the pixel size reaches about 30-50 μm, while 4K UHD and 8K UHD have higher resolutions of ~860 PPI, ~1600 PPI, etc., so slight size differences may also lead to product defects.

[0115] Therefore, the present invention is characterized in that the pattern accuracy of the insulating mask during the wet etching process is improved by performing the wet etching twice.

[0116] Figures 8 to 10 FIG. 1 is a schematic diagram showing a mask manufacturing process according to an embodiment of the present invention.

[0117] Reference Figure 8 (a), first, a metal sheet 110 generated by electroforming or rolling process can be provided. As mentioned above, the material of the metal sheet 110 can be invar, super invar, nickel (Ni), nickel-cobalt (Ni-Co), etc.

[0118] When the electroforming process is used, a conductive substrate (not shown) is prepared, and a metal sheet 110 (or a plated film 110) is formed on the conductive substrate by electroforming. The conductive substrate can be used as a cathode body during electroforming. The material of the substrate can be invar, super invar, Si, Ti, Cu, Ag, GaN, SiC, GaAs, GaP, AlN, InN, InP, Ge, Al2O3, graphite, graphene, etc.

[0119] In addition, in the case of a metal substrate, metal oxides are generated on its surface, impurities flow in during the metal manufacturing process, in the case of a polycrystalline silicon substrate, inclusions or grain boundaries exist thereon, and in the case of a conductive polymer substrate, there is a high possibility of impurities, and the strength and acid resistance are weak. Hereinafter, elements such as metal oxides, impurities, inclusions, grain boundaries, etc. that prevent the uniform formation of an electric field on the surface of the cathode body are referred to as "defects". Due to such defects, a uniform electric field cannot be applied to the cathode body of the above-mentioned materials, so that a portion of the metal sheet 110 is formed unevenly.

[0120] In realizing ultra-high-quality pixels above the UHD level, the unevenness of the metal sheet and the mask pattern P will have a negative impact on the pixel formation. For example, the current QHD image quality is 500-600PPI (pixel per inch), and the pixel size reaches about 30-50μm, while 4K UHD and 8K UHD high-quality images have higher resolutions of ~860PPI, ~1600PPI, etc. Microdisplays directly applicable to VR machines or microdisplays inserted into VR machines aim at ultra-high image quality of about 2000PPI or above, and the pixel size is about 5-10μm. The pattern width of fine metal masks and shadow masks can be formed to be several μm to tens of μm, preferably less than 30μm, so even defects of several μm in size occupy a large proportion in the mask pattern.

[0121] In order to remove the defects of the above-mentioned materials in the cathode body, an additional process for removing metal oxides, impurities, etc. may be performed, and other defects such as etching of the cathode body material may be additionally generated in the process.

[0122] Therefore, the cathode conductive substrate of the present invention can be a single crystal material substrate. The conductive substrate is preferably a single crystal silicon material. 19 The above high concentration doping is performed to make the substrate conductive. The doping can be performed on the entire substrate or only on the surface of the substrate.

[0123] In addition, single crystal materials can use metals such as Ti, Cu, and Ag; semiconductors such as GaN, SiC, GaAs, GaP, AlN, InN, InP, and Ge; carbon materials such as graphite and graphene; single crystal ceramics for superconductors such as perovskite structures including CH3NH3PbCl3, CH3NH3PbBr3, CH3NH3PbI3, and SrTiO3; and single crystal superheat-resistant alloys for aircraft parts. Metals and carbon materials are basically conductive materials. For semiconductor materials, in order to have conductivity, 10 19 Other materials can be made conductive by doping or forming oxygen vacancies.

[0124] Since the single crystal material has no defects, it has the advantage of forming a uniform electric field on the entire surface during electroforming, thereby being able to generate a uniform metal sheet 110. The fine metal mask 100 manufactured by the uniform metal sheet 110 can further improve the image quality level of the OLED pixel. In addition, since there is no need to perform an additional process to remove and eliminate defects, it has the advantage of being able to reduce process costs and improve productivity.

[0125] The anode body (not shown) faces the cathode body and is set at a predetermined distance. The side corresponding to the cathode body has a flat plate shape, etc. The anode body can be completely immersed in the plating solution. The anode body can be made of insoluble materials such as titanium (Ti), iridium (Ir), and ruthenium (Ru). The cathode body and the anode body are separated by about several centimeters.

[0126] A power supply unit (not shown) can supply the cathode and anode with current required for electroplating. A negative (-) terminal of the power supply unit is connected to the cathode, and a positive (+) terminal is connected to the anode.

[0127] In addition, after the metal sheet 110 is formed by electroforming, the metal sheet 110 may be subjected to heat treatment. In order to prevent the decrease in the thermal expansion coefficient of the metal sheet 110 and the heat-induced deformation of the electroformed metal sheet 110, the heat treatment H may be performed with the metal sheet 110 attached to the cathode body (conductive substrate). The heat treatment may be performed at a temperature range of 300° C. to 800° C. (see Fig.14 ).

[0128] Generally, the thermal expansion coefficient of the Invar alloy sheet produced by electroforming is higher than that of the Invar alloy sheet produced by rolling. Therefore, the thermal expansion coefficient can be reduced by heat treating the Invar alloy sheet, but the Invar alloy sheet will be slightly deformed during the heat treatment. Therefore, if the heat treatment is performed in a state where the conductive substrate and the metal sheet 110 are bonded, the slight deformation caused by the heat treatment can be prevented.

[0129] Fig.14 1 is a graph showing the coefficient of thermal expansion (CTE) of a mask after heat treatment according to an embodiment of the present invention. For a sample of 80×200 mm, the coefficient of thermal expansion of an Invar alloy sheet heat treated at 7 temperature ranges of 300°C, 350°C, 400°C, 450°C, 500°C, 550°C, and 800°C was measured. Fig.14 (a) shows the results of measuring the thermal expansion coefficient of each sample while increasing the temperature from room temperature (25°C) to about 240°C. Fig.14 (b) shows the results of measuring the thermal expansion coefficient of each sample while lowering the temperature from about 240°C to room temperature (25°C). Fig.14 (a) and Fig.14 (b) shows that the thermal expansion coefficient of the Invar alloy sheet (or metal sheet 110) produced by electroforming changes according to the heat treatment temperature, and it can be confirmed that the thermal expansion coefficient is the lowest when the heat treatment is performed at 800°C.

[0130] Therefore, by further reducing the thermal expansion coefficient of the metal sheet 110 , it is possible to manufacture the mask 100 that prevents the deformation of the μm-level pattern P and can deposit ultra-high-quality OLED pixels.

[0131] Then, a patterned first insulating portion M1 may be formed on one side (upper side) of the metal sheet 110. The first insulating portion M1 may be formed of a photoresist material by printing, etc. When an electroforming process is used, the metal sheet 110 and the conductive substrate may be separated before forming the first insulating portion M1.

[0132] The first insulating portion M1 may be a black matrix photoresist or a photoresist material with a metal coating formed on the upper portion. The black matrix photoresist may be a material comprising a black matrix resin, which is used to form a black matrix of a display panel. The light shielding effect of the black matrix photoresist is better than that of a general photoresist. Moreover, the light shielding effect of the photoresist with a metal coating formed on the upper portion is also better in that the metal coating shields the light irradiated from the upper portion.

[0133] Then, refer to Figure 8 (b), a first mask pattern P1 having a predetermined depth may be formed on one side (upper side) of the metal sheet 110 by wet etching WE1. When wet etching WE1 is performed, the metal sheet 110 should not be penetrated. Therefore, the first mask pattern P does not penetrate the metal sheet 110 but may be generally formed in an arc shape. That is, the depth value of the first mask pattern P1 may be less than the thickness of the metal sheet 110.

[0134] Since the wet etching WE1 has an isotropic etching characteristic, the width R2 of the first mask pattern P1 is different from the spacing R3 between the patterns of the first insulating portion M1, and can have a width wider than the spacing R3 between the patterns of the first insulating portion M1. In other words, since undercut portions UC are formed at the lower portions of both sides of the first insulating portion M1, the width R2 of the first mask pattern P1 can be greater than the spacing R3 between the patterns of the first insulating portion M1 by the width of the undercut portions UC.

[0135] Then, refer to Figure 8 (c), a second insulating portion M2 may be formed on one side (top) of the metal sheet 110. The second insulating portion M2 may be formed of a photoresist material by a printing method or the like. Since the second insulating portion M2 needs to be retained in the space for forming the undercut portion UC described later, a positive photoresist material is preferably used.

[0136] Since the second insulating portion M2 is formed on one surface (upper surface) of the metal sheet 110 , a portion of the second insulating portion M2 is formed on the first insulating portion M1 , and another portion of the second insulating portion M2 is filled into the first mask pattern P1 .

[0137] The second insulating part M2 may use a photoresist diluted in a solvent. If a high-concentration photoresist solution is formed on the metal sheet 110 and the first insulating part M1, the high-concentration photoresist solution reacts with the photoresist of the first insulating part M1, thereby possibly dissolving a portion of the first insulating part M1. Therefore, in order not to affect the first insulating part M1, the second insulating part M2 may use a photoresist whose concentration is reduced by dilution in a solvent.

[0138] Then, refer to Fig. 9 (d) A portion of the second insulating portion M2 can be volatilized by baking. After the solvent of the second insulating portion M2 is volatilized by baking, only the photoresist component remains. Therefore, a thinner portion of the second insulating portion M2', such as a coated film, remains on the exposed portion of the first mask pattern P1 and the surface of the first insulating portion M1. The thickness of the remaining second insulating portion M2' is preferably less than several μm, so as not to affect the pattern width R3 of the first insulating portion M1 or the pattern width R2 of the first mask pattern P1.

[0139] Then, refer to Fig. 9 (e), exposure L can be performed on one side (top) of the metal sheet 110. When exposure L is performed on the upper part of the first insulating part M1, the first insulating part M1 can act as an exposure mask. Since the first insulating part M1 is a black matrix photoresist or a photoresist material with a metal coating formed on the upper part, it has an excellent light shielding effect. Therefore, the second insulating part M2 (refer to Fig. 9 (f)) will not be exposed to L, while the other insulating portion M2' will be exposed to L.

[0140] Then, refer to Fig. 9 (f), if the exposure L is followed by development, the second insulating portion M2' portion that is not exposed L will remain, and the other second insulating portion M2' will be removed. Since the second insulating portion M2' is a positive photoresist, the portion exposed L will be removed. The space of the remaining second insulating portion M2' can form an undercut portion UC (refer to Figure 8 (b) step) of the spatial correspondence.

[0141] Secondly, refer to Fig.10(g), wet etching WE2 may be performed on the first mask pattern P1 of the metal sheet 110. The wet etching liquid penetrates into the space between the patterns of the first insulating portion M1 and the space of the first mask pattern P1 and wet etching WE2 is performed. The second mask pattern P2 may be formed by penetrating the metal sheet 110. That is, it is formed by penetrating from the lower end of the first mask pattern P1 to the other side of the metal sheet 110.

[0142] At this time, a second insulating portion M2" remains on the first mask pattern P1, and the remaining second insulating portion M2" can serve as a mask for wet etching. That is, the second insulating portion M2" masks the etching liquid and prevents the etching liquid from etching toward the side direction of the first mask pattern P1, but instead etches toward the lower surface direction of the first mask pattern P1.

[0143] Since the second insulating part M2" is arranged in the bottom cut portion UC space of the vertical lower part of the first insulating part M1, the pattern width of the second insulating part M2" substantially corresponds to the pattern width R3 of the first insulating part M1. Therefore, the second mask pattern P2 is equivalent to wet etching WE2 on the spacing R3 between the patterns of the first insulating part M1. Therefore, the width R1 of the second mask pattern P2 may be smaller than the width R2 of the first mask pattern P1.

[0144] Since the width of the second mask pattern P2 defines the width of the pixel, the width of the second mask pattern P2 is preferably less than 35 μm. If the thickness of the second mask pattern P2 is too thick, it is difficult to control the width R1 of the second mask pattern P2, and the uniformity of the width R1 decreases, and the shape of the mask pattern P as a whole may not be conical / inverted conical, so the thickness of the second mask pattern P2 is preferably less than the thickness of the first mask pattern P1. The thickness of the second mask pattern P2 is preferably close to 0, and when the size of the pixel is taken into consideration, for example, the thickness of the second mask pattern P2 is preferably about 0.5 to 3.0 μm, and more preferably 0.5 to 2.0 μm.

[0145] The mask pattern P may be constituted by the sum of the shapes of the connected first mask pattern P1 and the second mask pattern P2.

[0146] Then, refer to Fig.10 (h), the manufacturing process of the mask 100 can be ended by removing the first insulating portion M1 and the second insulating portion M2. The first mask pattern P1 is formed to include an inclined surface, and the height of the second mask pattern P2 is formed very low, so if the shapes of the first mask pattern P1 and the second mask pattern P2 are added together, the overall shape is a cone or an inverted cone.

[0147] Fig.11 1 is a schematic diagram showing the degree of mask etching according to a comparative example of the present invention.

[0148] Reference Fig.11 Since wet etching is performed isotropically, the etched shape is generally in the shape of an arc. Moreover, during the wet etching process, it is difficult for the etching speeds of each part to be exactly the same. If only one wet etching is performed to penetrate the metal sheet 110 to form the mask pattern, the deviation will be greater. For example, although the wet etching speeds of the mask pattern 111 and the mask pattern 112 are different, the difference in the upper width (bottom cut) is not very large. However, the difference between the lower width PD1 of the metal sheet 110 penetrated by forming the mask pattern 111 and the lower width PD2 of the metal sheet 110 penetrated by forming the mask pattern 112 is much greater than the difference in the upper width. This is a result of the isotropic wet etching. In other words, it is the lower widths PD1 and PD2 of the mask patterns 111 and 112, rather than the upper widths, that determine the width of the pixel size. Therefore, compared to one wet etching, it is easier to control the lower widths PD1 and PD2 if two wet etchings are performed. Next, in Fig.12 The embodiments of the present invention are further described in detail.

[0149] Fig.12 FIG. 1 is a schematic diagram showing the extent of mask etching according to an embodiment of the present invention.

[0150] Fig.12 (a) The previous process and Figure 8 The process is the same as described in (a) to (b) of . However, Fig.12 In (a), the first mask pattern P1-1 and the first mask pattern P1-2 having different etching degrees in the wet etching WE1 of the first insulating portion M1 are compared and described.

[0151] Reference Fig.12 (a), even if the wet etching WE1-1 and WE1-2 are the same, the etching degree will be different depending on the etching part, as shown in the first mask pattern P1-1 and the first mask pattern P1-2. The pattern width R2-1 of the first mask pattern P1-1 is smaller than the pattern width R2-2 of the first mask pattern P1-2. This difference in pattern widths R2-1 and R2-2 will have a bad effect on the resolution of the pixel.

[0152] Then, refer to Fig.12 (b) can be confirmed that when executing Figure 8 (c) to Fig. 9After the process described in (f), the second insulating parts M2”-1 and M2”-2 are respectively formed on the vertical lower space of the first insulating part M1. Depending on the size of the bottom cut space at the bottom of the first insulating part, the sizes of the second insulating parts M2”-1 and M2”-2 will be different. Although the size of the second insulating part M2”-1 is smaller than the size of the second insulating part M2”-2, the pattern widths of the second insulating parts M2”-1 and M2”-2 will be the same. The pattern widths of the second insulating parts M2”-1 and M2”-2 may be the same to correspond to the pattern width R3 of the first insulating part M1.

[0153] Then, refer to Fig.12 (c), the second insulating parts M2"-1 and M2"-2 are used as masks for wet etching and a second wet etching WE2 is performed, thereby penetrating the metal sheet 110. As a result, the deviation of the width R1-1 and R1-2 of the second mask patterns P2-1 and P2-2 is significantly smaller than the deviation of the width R2-1 and R2-2 of the first mask patterns P1-1 and P1-2. This is because, after the metal sheet 110 is wet etched for the first time with the depth of the first mask patterns P1-1 and P1-2 and then the thickness of the remaining metal sheet 110 is wet etched for the second time, the pattern width of the second insulating parts M2"-1 and M2"-2 subjected to the second wet etching is substantially the same as the pattern width of the first insulating part M1 subjected to the first wet etching.

[0154] As described above, the mask manufacturing method of the present invention has the effect of forming a mask pattern P of a desired size by performing two wet etchings. In particular, since a portion of the second insulating portion M2" remains, the second wet etching is performed narrower and thinner than the first wet etching, so the present invention has the advantage of easily controlling the width R1 of the second mask pattern P2. On the other hand, since an inclined surface can be formed by wet etching, a mask pattern P that can prevent a shadow effect can be realized.

[0155] Fig.13 FIG. 1 is a schematic diagram showing the adjustment of the taper angles a1 and a2 according to an embodiment of the present invention.

[0156] In addition, the mask manufacturing method of the present invention has the advantage that the mask pattern P composed of the first mask pattern P1 and the second mask pattern P2 is easy to form a tapered angle. Moreover, the present invention has the effect of easily adjusting the tapered angles a1 and a2. Fig.13 (a), if the thickness T1 of the second mask pattern P2 is thinner, the taper angle a1 will become larger. In other words, if the thickness of the first mask pattern P1 is thick and the thickness T1 of the second mask pattern P2 is thinner, the taper angle a1 will become larger as a result of isotropic wet etching (R1 is the radius). Fig.13(b), if the thickness T2 of the second mask pattern P2 becomes thicker, the taper angle a2 will become smaller. In other words, compared to Fig.13 (a), if the thickness of the first mask pattern P1 is thin and the thickness T2 of the second mask pattern P2 becomes thicker, as a result of isotropic wet etching (R1 is the radius), the taper angle a2 will become larger. Therefore, the present invention has the advantage that the taper angles a1 and a2 can be adjusted by adjusting the thickness of the second mask pattern P2.

[0157] Next, the manufacturing process of the frame-integrated mask of the present invention is further described.

[0158] First, it can provide Figure 4 and Figure 5 The frame 200 described above may provide an edge frame portion 210 having a square frame shape including a hollow area R.

[0159] Then, the mask unit sheet portion 220 is manufactured. The mask unit sheet portion 220 can be manufactured by the following process, that is, after manufacturing a planar sheet by electroforming, rolling or other film forming processes, the mask unit region CR portion is removed by laser scribing, etching, etc., thereby manufacturing the mask unit sheet portion 220. In this specification, the formation of 6×5 mask unit regions CR (CR11 to CR56) is used as an example for explanation. There can be 5 first grid sheet portions 223 and 4 second grid sheet portions 225.

[0160] Then, the mask unit sheet portion 220 may be aligned with the edge frame portion 210. In the alignment process, the edge sheet portion 221 may be aligned with the edge frame portion 210 while all sides of the mask unit sheet portion 220 are stretched F1 to F4 so that the mask unit sheet portion 220 is flat and stretched. Figure 6 (b) shows points 1 to 3) and the mask unit sheet portion 220 is clamped and stretched. On the other hand, the mask unit sheet portion 220 F1 and F2 may be stretched along the direction of part of the side portions instead of all the side portions.

[0161] Then, if the mask unit sheet portion 220 corresponds to the edge frame portion 210, the edge sheet portion 221 of the mask unit sheet portion 220 may be bonded by welding. It is preferable to weld all sides so that the mask unit sheet portion 220 is firmly bonded to the edge frame portion 210. The welding should be performed as close to the corner side of the edge frame portion 210 as possible, so that the warping space between the edge frame portion 210 and the mask unit sheet portion 220 can be minimized and the bonding property can be improved. The welding portion may be generated in a line or spot shape, has the same material as the mask unit sheet portion 220, and may become a medium for connecting the edge frame portion 210 and the mask unit sheet portion 220 into one body.

[0162] In addition, after being bonded to the planar edge frame portion 210 , the mask unit region CR portion may be removed by laser scribing, etching, or the like, and the mask unit sheet portion 220 may be formed.

[0163] Fig.15 1 is a schematic diagram showing a state where the mask 100 is aligned with the cell region CR of the frame 200 according to an embodiment of the present invention. Next, a series of processes for bonding the mask 100 to the manufactured frame 200 will be described based on an embodiment of the present invention.

[0164] Then, refer to Fig.15 , the mask 100 may correspond to one mask unit region CR of the frame 200. In the present invention, no tensile force may be applied to the mask 100 during the process of corresponding the mask 100 to the mask unit region CR of the frame 200.

[0165] Since the thickness of the mask unit sheet portion 220 of the frame 200 is thin, if the mask 100 is bonded to the mask unit sheet portion 220 in a state where a tensile force is applied, the tensile force remaining in the mask 100 will act on the mask unit sheet portion 220 and the mask unit region CR, thereby deforming them. Therefore, the mask 100 should be bonded to the mask unit sheet portion 220 without applying a tensile force to the mask 100. Thus, it is possible to prevent the tensile force applied to the mask 100 from acting in reverse as tension on the frame 200, thereby preventing the frame 200 (or the mask unit sheet portion 220) from being deformed.

[0166] However, when the mask 100 is bonded to the frame 200 (or the mask unit sheet portion 220) without applying a tensile force to manufacture a frame-integrated mask, and the frame-integrated mask is applied to a pixel deposition process, the following problem may occur: in the pixel deposition process performed at about 25-45°C, the mask 100 thermally expands by a predetermined length. Even for the mask 100 made of an Invar alloy material, when the temperature is increased by about 10°C to form a pixel deposition process atmosphere, a length change of about 1-3ppm will occur. For example, when the total length of the mask 100 is 500mm, the length will increase by about 5-15μm. Therefore, the mask 100 sags due to its own weight, or is stretched while being fixed to the frame 200, causing deformation such as distortion, and the alignment error of the pattern P becomes larger.

[0167] Therefore, the present invention corresponds and bonds the mask 100 to the mask unit region CR of the frame 200 at a temperature higher than normal temperature and without applying a tensile force to the mask 100. In this specification, it is described that the mask and the frame are matched and bonded after the temperature of the process region is raised to the first temperature ET1.

[0168] "Process area" refers to a space where components such as mask 100 and frame 200 are arranged and where the bonding process of mask 100 is implemented. The process area can be a space in a closed chamber or an open space. In addition, the "first temperature" may refer to a temperature that is higher than or equal to the pixel deposition process when a frame-integrated mask is used in an OLED pixel deposition process. Considering that the pixel deposition process temperature is about 25-45°C, the first temperature may be about 25°C to 60°C. The temperature increase in the process area can be achieved by providing a heating device in the chamber or providing a heating device around the process area.

[0169] Refer again Fig.15 After the mask 100 is matched to the mask unit region CR, the temperature of the process region including the frame 200 may be raised to the first temperature ET. Alternatively, the temperature of the process region including the frame 200 may be raised to the first temperature before the mask 100 is matched to the mask unit region CR. The accompanying drawings only illustrate the case where one mask 100 corresponds to one mask unit region CR, but multiple masks 100 may be matched to each mask unit region CR before the temperature of the process region is raised to the first temperature ET.

[0170] Existing Figure 1The mask 10 of the present invention includes 6 units C1 to C6 and is relatively long, while the mask 100 of the present invention includes one unit C and is relatively short, so the degree of distortion of pixel positioning accuracy will be reduced. For example, assuming that the length of the mask 10 including multiple units C1 to C6, ... is 1m, and a pixel positioning accuracy error of 10μm occurs in the total length of 1m, the mask 100 of the present invention can change the above error range to 1 / n as the relative length decreases (equivalent to a decrease in the number of units C). For example, if the length of the mask 100 of the present invention is 100mm, the length is reduced from 1m of the existing mask 10 to 1 / 10, so a pixel positioning accuracy error of 1μm occurs in the total length of 100mm, which has the effect of significantly reducing the alignment error.

[0171] On the other hand, if the mask 100 has a plurality of cells C and the correspondence of each cell C with each cell region CR of the frame 200 is within the range in which the alignment error is minimized, the mask 100 may correspond to a plurality of mask cell regions CR of the frame 200. Alternatively, the mask 100 having a plurality of cells C may correspond to one mask cell region CR. In this case, the mask 100 preferably has as few cells C as possible in consideration of the process time and productivity based on alignment.

[0172] The mask 100 is not subjected to a tensile force and is only kept flat to correspond to the mask unit region CR, and the alignment state can be confirmed in real time by a microscope. Since the present invention only needs to correspond to one unit C of the mask 100 and confirm the alignment state, it is different from the existing method (see Figure 2 ), the manufacturing time can be significantly shortened.

[0173] That is, compared with the existing method of simultaneously matching 6 units C1-C6 and simultaneously confirming the alignment status of the 6 units C1-C6, the manufacturing method of the frame integrated mask of the present invention can significantly shorten the time by making each unit C11-C16 contained in the 6 masks 100 correspond to a unit area CR11-CR16 respectively and confirming each alignment status 6 times.

[0174] In addition, in the method for manufacturing the frame-integrated mask of the present invention, the product yield of 30 times of making 30 masks 100 correspond to and align with 30 unit regions CR (CR11-CR56) respectively is significantly higher than that of making 5 masks 100 each including 6 units C1-C6 (refer to Figure 2 (a)) corresponds to and aligns with the frame 200 for 5 times. Since the existing method of aligning 6 cells C1-C6 in the area corresponding to 6 cells C each time is obviously cumbersome and difficult, the product yield is low.

[0175] On the other hand, after the mask 100 is aligned with the frame 200, the mask 100 may be temporarily fixed on the frame 200 by a predetermined adhesive. Then, a step of bonding the mask 100 may be performed.

[0176] Fig.16 1 is a top view showing a process of bonding the mask 100 to the unit region CR of the frame 200 according to an embodiment of the present invention ( Fig.16 (a)) and side cross-sectional view ( Fig.16 (b)).

[0177] Secondly, refer to Fig.16 , a part or all of the edge of the mask 100 may be bonded to the frame 200. The bonding may be performed by welding W, preferably, by laser welding W. The welded part may have the same material as the mask 100 / frame 200 and be connected as one.

[0178] If the laser is irradiated to the upper part of the edge portion (or dummy portion) of the mask 100, a portion of the mask 100 is melted and welded to the frame 200 W. The welding W should be performed as close to the corner side of the frame 200 as possible, so as to minimize the warping space between the mask 100 and the frame 200 and improve the adhesion. The welding W portion can be generated in a line or spot shape, has the same material as the mask 100, and can become a medium for connecting the mask 100 and the frame 200 into one body.

[0179] The accompanying drawings illustrate a state where one edge of two adjacent masks 100 is respectively bonded W to the upper surface of the first grid sheet portion 223 (or the second grid sheet portion 225). The width and thickness of the first grid sheet portion 223 (or the second grid sheet portion 225) can be about 1 to 5 mm. In order to improve product productivity, it is necessary to minimize the width of the overlap between the edges of the first grid sheet portion 223 (or the second grid sheet portion 225) and the mask 100 to about 0.1 to 2.5 mm.

[0180] The welding W method is only one method of bonding the mask 100 to the frame 200, and the present invention is not limited to these embodiments, and various bonding methods may be used.

[0181] Since welding W is performed on the mask unit sheet portion 220 without applying a tensile force to the mask 100 , no tension is applied to the mask unit sheet portion 220 (or the edge sheet portion 221 ), the first grid sheet portion 223 , and the second grid sheet portion 225 .

[0182] If the process of bonding one mask 100 to the frame 200 is completed, the process of making the remaining masks 100 correspond to the remaining mask cells C in sequence and bonding them to the frame 200 can be repeated. Since the mask 100 that has been bonded to the frame 200 can provide a reference position, the time in the process of making the remaining masks 100 correspond to the unit regions CR in sequence and confirming the alignment state can be significantly shortened. In addition, the pixel positioning accuracy between the mask 100 bonded to one mask unit region and the mask 100 bonded to the adjacent mask unit region does not exceed 3μm, so that a mask for forming ultra-high-definition OLED pixels with accurate alignment can be provided.

[0183] Fig.17 1 is a top view showing a process of lowering the temperature LT of the process region after the mask 100 is bonded to the unit region CR of the frame 200 according to an embodiment of the present invention ( Fig.17 (a)) and side cross-sectional view ( Fig.17 (b)).

[0184] Then refer to Fig.17 , the temperature of the process area is reduced to a second temperature LT. The "second temperature" refers to a temperature lower than the first temperature. Considering that the first temperature is about 25°C to 60°C, the second temperature can be about 20°C to 30°C, provided that it is lower than the first temperature. Preferably, the second temperature can be room temperature. The temperature reduction of the process area can be achieved by providing a cooling device in the chamber or providing a cooling device around the process area, or by natural cooling at room temperature.

[0185] When the temperature of the process area is lowered to the second temperature LT, the mask 100 can be thermally shrunk by a predetermined length. The mask 100 can be thermally shrunk isotropically along all side directions. However, since the mask 100 is fixedly connected to the frame 200 (or the mask unit sheet portion 220) by welding W, the thermal shrinkage of the mask 100 will spontaneously apply tension TS to the surrounding mask unit sheet portion 220. Since the mask 100 spontaneously applies tension, the mask 100 can be more closely bonded to the frame 200.

[0186] In addition, after all the masks 100 are bonded to the corresponding mask unit regions CR, the temperature of the process region is reduced to the second temperature LT, thereby causing thermal contraction of all the masks 100 at the same time, thereby preventing the frame 200 from being deformed or the alignment error of the pattern P from becoming larger. More specifically, even if the tension TS is applied to the mask unit sheet portion 220, the plurality of masks 100 apply the tension TS in opposite directions, so the force is offset, and the mask unit sheet portion 220 will not be deformed. For example, in the first grid sheet portion 223 between the mask 100 attached to the CR11 unit region and the mask 100 attached to the CR12 unit region, the tension TS acting in the right direction of the mask 100 attached to the CR11 unit region and the tension TS acting in the left direction of the mask 100 attached to the CR12 unit region are offset by each other. As a result, the deformation of the frame 200 (or the mask unit sheet portion 220) caused by the tension TS is minimized, thereby being able to minimize the alignment error of the mask 100 (or the mask pattern P).

[0187] Fig.18 FIG. 1 is a schematic diagram showing an OLED pixel deposition apparatus 1000 using frame-integrated masks 100 and 200 according to an embodiment of the present invention.

[0188] Reference Fig.18 The OLED pixel deposition device 1000 includes: a magnetic plate 300 accommodating a magnet 310 and provided with a cooling water pipe 350 ; and a deposition source supplying part 500 , which supplies an organic source 600 from the lower part of the magnetic plate 300 .

[0189] A target substrate 900 such as glass for depositing the organic source 600 may be inserted between the magnetic plate 300 and the deposition source supply unit 500. A frame-integrated mask 100, 200 (or FMM) for depositing the organic source 600 according to different pixels may be arranged in close contact or very close to the target substrate 900. The magnet 310 may generate a magnetic field and be closely attached to the target substrate 900 through the magnetic field.

[0190] The deposition source supply unit 500 can supply the organic source 600 in a reciprocating left and right path, and the organic source 600 supplied by the deposition source supply unit 500 can be deposited on one side of the target substrate 900 after passing through the pattern P formed on the frame-integrated mask 100, 200. The organic source 600 deposited after passing through the pattern P of the frame-integrated mask 100, 200 can be used as a pixel 700 of an OLED.

[0191] In order to prevent uneven deposition of the pixels 700 due to the shadow effect, the mask pattern P may be formed obliquely S (or formed in a tapered S shape). Since the organic source 600 passing through the pattern in a diagonal direction along the inclined surface contributes to the formation of the pixels 700, the pixels 700 can be deposited with uniform thickness as a whole. Fig.10 As described above, the inclined surface of the mask pattern P is formed by wet etching, and the second mask pattern P2 through which the organic source 600 finally passes is formed by wet etching WE2 the width R3 between the second insulating portions M2' and the thinner thickness, so the width of the pixel 700 can be defined to match the size of the second mask pattern P2.

[0192] The mask 100 is bonded and fixed to the frame 200 at a first temperature higher than the pixel deposition process temperature, so even if the temperature is raised to the temperature used for the pixel deposition process, the position of the mask pattern P is hardly affected, and the pixel positioning accuracy between the mask 100 and the adjacent mask 100 can be maintained at no more than 3μm.

[0193] As described above, although the preferred embodiments of the present invention are described with reference to the accompanying drawings, the present invention is not limited to the embodiments, and a person skilled in the art of the present invention may make various modifications and changes to the embodiments without departing from the spirit of the present invention. The modifications and changes should be deemed to fall within the scope of the present invention and the appended claims.

Claims

1. A method for manufacturing a mask, comprising the following steps: (a) forming a patterned first insulating portion on one side of a metal sheet; (b) forming a first mask pattern of a predetermined depth on one side of the metal sheet by wet etching; (c) filling the second insulating portion at least within the first mask pattern; (d) volatilizing at least a portion of the second insulating portion by baking; (e) performing exposure on the upper portion of the first insulating portion, and leaving only the second insulating portion located vertically below the first insulating portion; as well as (f) performing wet etching on one side of the metal sheet to form a second mask pattern extending from the first mask pattern through the other side of the metal sheet.

2. The method for manufacturing a mask according to claim 1, wherein: A width of the second mask pattern is smaller than a width of the first mask pattern.

3. The method for manufacturing a mask according to claim 1, wherein: The predetermined depth of the first mask pattern has a value smaller than the thickness of the metal sheet.

4. The method for manufacturing a mask according to claim 1, wherein: The sum of the shapes of the first mask pattern and the second mask pattern presents a cone shape or an inverted cone shape as a whole.

5. The method for manufacturing a mask according to claim 1, wherein: In the step of forming the first mask pattern, the first mask pattern is formed to have a width greater than a space between patterns of the first insulating portion.

6. The method for manufacturing a mask according to claim 5, wherein: Undercut portions are formed at lower portions of both sides of the first insulating portion.

7. The method for manufacturing a mask according to claim 6, wherein: In the step of leaving only the second insulating portion located at a vertically lower portion of the first insulating portion, the second insulating portion remains in the space where the undercut portion is formed.

8. The method for manufacturing a mask according to claim 1, wherein: When the upper portion of the first insulating portion is exposed to light, the first insulating portion functions as an exposure mask for the second insulating portion.

9. The method for manufacturing a mask according to claim 1, wherein: The thickness of the first mask pattern is greater than the thickness of the second mask pattern.

10. The method for manufacturing a mask according to claim 1, wherein: The first insulating portion is a black matrix photoresist or a photoresist material with a metal plating film formed on the upper portion.

11. The method for manufacturing a mask according to claim 1, wherein: The second insulating portion is a positive photoresist material.

12. The method for manufacturing a mask according to claim 11, wherein: In the step of filling the second insulating portion in the first mask pattern, the second insulating portion diluted in a solvent is filled, and the solvent is volatilized by baking.

13. The method for manufacturing a mask according to claim 1, wherein: The pattern width of the remaining second insulating portion located at the vertical lower portion of the first insulating portion corresponds to the pattern width of the first insulating portion.

14. The method for manufacturing a mask according to claim 13, wherein: When the second mask pattern is formed by wet etching, the second insulating portion functions as a mask for the wet etching.

15. The method for manufacturing a mask according to claim 1, wherein: The metal sheet formed with the first mask pattern and the second mask pattern is used as a fine metal mask in OLED pixel deposition.

16. The method for manufacturing a mask according to claim 1 or 2, wherein: The metal sheet is any one of Invar, Super Invar, nickel, and nickel-cobalt.

17. The method for manufacturing a mask according to claim 1, wherein: The thickness of the metal sheet is 2 μm to 50 μm.

18. The method for manufacturing a mask according to claim 2, wherein: When the metal sheet is manufactured by the electroforming process, the conductive substrate is used as the cathode body, and the metal sheet is formed by electroforming on one side of the conductive substrate. The substrate is a doped single crystal silicon material or any one of Invar alloy, super Invar alloy, Si, Ti, Cu, Ag, GaN, SiC, GaAs, GaP, AlN, InN, InP, Ge, Al2O3, graphite, graphene, perovskite structured ceramics, and super heat-resistant alloy materials.

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