Semiconductor structure and method for forming the same

Abstract

The present invention relates to a semiconductor structure and a method for forming the same. A transition layer is formed between a tungsten layer and a pad metal layer, the transition layer is attached to the upper surface of the tungsten layer, and the pad metal layer is attached to the upper surface of the transition layer. The transition layer plays a transition role between the tungsten layer and the pad metal layer, can reduce the influence of the rough tungsten layer surface on the morphology of the pad metal layer, optimize the surface morphology of the pad metal layer located on the tungsten layer, help reduce the difficulty of the subsequent sealing and testing process, and improve the accuracy of sealing and testing.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor structure and a method for forming the same. Background Art

[0002] With the rapid development of very large-scale integrated circuits, the integrated circuit manufacturing process has become more and more complex and sophisticated. One way to improve the integration density is to use the vertical space of the chip to form a through hole in the insulating material on the metal layer, and then fill the through hole with metal material to form a conductive via (ie TSV), and then cover the via with another metal layer, so as to achieve electrical connection between the upper and lower metal layers through the via.

[0003] The commonly used conductive material in the above-mentioned vias is tungsten (W), and in order to make the tungsten material fill the via better, CVD process (ie chemical vapor deposition) is often used to deposit tungsten. The tungsten material is usually also covered on the substrate outside the via (the tungsten material inside and outside the via is referred to as a tungsten layer as a whole), and is patterned as needed, and then a metal layer (such as metal aluminum (Al)) is deposited on the tungsten layer by CVD process or PVD process (ie physical vapor deposition). The metal layer, for example, the pad is electrically connected to the top metal layer through the tungsten layer.

[0004] However, when a pad metal layer for forming a pad is fabricated on the tungsten layer, the surface flatness of the pad metal layer is poor and even has some hillock defects, which increases the difficulty of the subsequent packaging and testing process and affects the accuracy of packaging and testing. Summary of the invention

[0005] Through research, it is learned that when tungsten is deposited using the CVD process, tungsten is formed into a film in the form of columnar crystal growth. The surface roughness of the formed tungsten layer is relatively large. When the pad metal layer is then deposited on the tungsten layer, the rough tungsten substrate will affect the crystal orientation and stress release of the pad metal material, resulting in a relatively large roughness of the pad metal layer, and the lattice distortion in some areas manifests as protrusion defects.

[0006] In order to improve the surface morphology of a pad metal layer located on a tungsten layer, the present invention provides a semiconductor structure and a method for forming the semiconductor structure.

[0007] In one aspect, the present invention provides a semiconductor structure, comprising:

[0008] A semiconductor substrate, wherein the semiconductor substrate comprises a top metal layer, and a through hole exposing the top metal layer is disposed on the top metal layer;

[0009] a tungsten layer, the tungsten layer filling the through hole and extending from the through hole to cover the top surface of the semiconductor substrate;

[0010] a pad metal layer, disposed on the tungsten layer; and

[0011] A transition layer is attached to the upper surface of the tungsten layer, and the lower surface of the pad metal layer is attached to the upper surface of the transition layer.

[0012] Optionally, the transition layer includes a titanium layer.

[0013] Optionally, the transition layer includes a titanium nitride layer and a titanium layer stacked in sequence in a direction away from the tungsten layer.

[0014] Optionally, the material of the pad metal layer includes metal aluminum or metal copper.

[0015] Optionally, an insulating layer and an adhesion layer covering the insulating layer are provided on the side surface of the through hole, and the tungsten layer covers the adhesion layer.

[0016] In one aspect, the present invention provides a method for forming a semiconductor structure, comprising the following steps:

[0017] Providing a semiconductor substrate, the semiconductor substrate comprising a top metal layer, and a through hole exposing the top metal layer is disposed on the top metal layer;

[0018] Depositing tungsten on the semiconductor substrate by a CVD process to form a tungsten layer, wherein the tungsten layer fills the through hole and extends from the through hole to cover the top surface of the semiconductor substrate; and,

[0019] A transition layer and a pad metal layer are sequentially deposited on the tungsten layer, wherein the transition layer is attached to the upper surface of the tungsten layer, and the pad metal layer is attached to the upper surface of the transition layer.

[0020] Optionally, the material of the pad metal layer includes metal aluminum or metal copper, and the material of the transition layer includes metal titanium.

[0021] Optionally, the transition layer includes a titanium nitride layer and a titanium layer stacked in sequence in a direction away from the tungsten layer.

[0022] Optionally, the transition layer only includes a titanium layer.

[0023] Optionally, the transition layer is deposited by a sputtering process.

[0024] In the semiconductor structure and the method for forming the semiconductor structure described in the embodiment of the present invention, a transition layer is formed between the tungsten layer and the pad metal layer, the transition layer is attached to the upper surface of the tungsten layer, and the pad metal layer is attached to the upper surface of the transition layer. The transition layer plays a transition role between the tungsten layer and the pad metal layer, can improve the coordinated deformation of the pad metal material during the growth process, is conducive to stress release, reduces the probability of protrusion defects, can reduce the influence of the rough tungsten layer surface on the morphology of the pad metal layer, optimizes the surface morphology of the pad metal layer located on the tungsten layer, helps to reduce the difficulty of the subsequent packaging and testing process, and improves the accuracy of packaging and testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Schematic diagram of a semiconductor structure according to an embodiment of the present invention.

[0026] Figure 2A FIG. 1 is a partial schematic diagram of a semiconductor structure according to an embodiment of the present invention.

[0027] Figure 2B yes Figure 2A A photograph of a pad metal layer in a semiconductor structure shown.

[0028] Figure 3A FIG. 4 is a partial schematic diagram of a semiconductor structure according to another embodiment of the present invention.

[0029] Figure 3B yes Figure 3A A photograph of a pad metal layer in a semiconductor structure shown.

[0030] Figure 4 It is a schematic flow chart of a method for forming a semiconductor structure according to an embodiment of the present invention.

[0031] Description of reference numerals:

[0032] 10-semiconductor structure; 100-semiconductor base; 102-substrate; 101-top metal layer; 101a-through hole; 103-insulating layer; 110-tungsten layer; 120-pad metal layer; 130-transition layer; 131-titanium nitride layer; 132-titanium layer. DETAILED DESCRIPTION

[0033] The semiconductor structure and the method for forming the same of the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be understood that the drawings of the specification are all in a very simplified form and are all in an inaccurate scale, which is only used to facilitate and clearly assist in explaining the purpose of the embodiments of the present invention. It should be noted that the order of the steps in the method presented herein is not necessarily the only order for performing these steps, and some of the steps described may be omitted and / or some other steps not described herein may be added to the method. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation of the device described in the figure. For example, if the structure in the accompanying drawings is inverted or positioned in other different ways (such as rotation), the exemplary term "on..." may also include "under..." and other orientation relationships. For clarity, in all the drawings used to assist in explaining the embodiments of the present invention, the same components are marked with the same reference numerals in principle, and repeated descriptions thereof are omitted.

[0034] Figure 1 Schematic diagram of a semiconductor structure according to an embodiment of the present invention. Figure 1 An embodiment of the present invention relates to a semiconductor structure 10, which includes a semiconductor substrate 100, a tungsten layer 110, a pad metal layer 120 and a transition layer 130; specifically, the semiconductor substrate 100 includes a top metal layer 101, and a through hole 101a exposing the top metal layer 101 is provided on the top metal layer 101, the tungsten layer 110 fills the through hole 101a and extends from the through hole 101a to cover the top surface of the semiconductor substrate 100, the pad metal layer 120 is provided on the tungsten layer 110, the transition layer 130 is attached to the upper surface of the tungsten layer 110, and the pad metal layer 120 is attached to the upper surface of the transition 130.

[0035] Reference Figure 1 The semiconductor substrate 100 may include a substrate and semiconductor elements formed using the substrate, such as a memory cell and / or a logic circuit (e.g., MOSFET). The semiconductor substrate may be made of silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, or indium antimonide, or may be silicon on insulator (SOI) or germanium on insulator (GOI), or may be other materials, such as GaAs, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, or GaInAsP, or may be a combination of the above materials. Depending on the design of the device (or chip) being constructed, the semiconductor substrate 100 may include corresponding settings.

[0036] This embodiment is described by taking the semiconductor substrate 100 used to form a back-illuminated image sensor as an example. In this embodiment, the semiconductor substrate 100 includes a substrate 102, a pixel array formed on the front side of the substrate 102, and an interconnection structure electrically connected to the pixel array. In order to electrically lead out the interconnection structure through the pads arranged on the back side, the front side of the substrate 102 is bonded to a supporting substrate 103, and with the back side as the "upper" orientation, a through hole 101a is formed in the substrate 102 to expose the top layer of the interconnection structure. Here, the top layer of the interconnection structure serves as the top metal layer 101. By providing a conductive material in the through hole 101a, the electrical properties of the interconnection structure can be led out to the back side of the substrate 102. Since the focus of the present invention is to explain the morphology of the tungsten layer 110 and the pad metal layer 120 thereon, Figure 1 The pixel array, interconnection structure and other well-known structures are not shown.

[0037] In this embodiment, the through hole 101a on the semiconductor base 100 passes through the substrate 102 in the thickness direction, and the side surface of the through hole 101a is provided with an insulating layer 103 and an adhesion layer (not shown) covering the insulating layer 103, the insulating layer 103 is used to isolate the tungsten layer 110 and the substrate 102, the adhesion layer is used to increase the adhesion of the tungsten layer 110, and the adhesion layer can also cover the bottom surface of the through hole 101a (i.e., the surface of the top metal layer 101 exposed by the through hole 101a). The material of the insulating layer 103 may include at least one of silicon oxide, silicon nitride and silicon oxynitride, and the adhesion layer is, for example, a titanium nitride layer. In some other embodiments (not shown), a top metal layer and an interlayer dielectric layer located on the top metal layer are formed on the front side of the substrate, and the through hole passes through the interlayer dielectric layer in the thickness direction, that is, the top metal layer and the through hole are located on the same side of the substrate. In this case, the through hole is formed in the interlayer dielectric layer and does not need to pass through the substrate.

[0038] like Figure 1As shown, the tungsten layer 110 fills the through hole 101a and extends from the through hole 101a to cover the top surface of the semiconductor substrate 100. The tungsten layer 110, for example, covers the adhesion layer in the through hole 101a. The through hole 101a filled with the tungsten layer 110 constitutes a conductive via (i.e., TSV), which leads the electrical properties of the top metal layer 101 to the top surface side of the semiconductor substrate 100 (here, the back side of the substrate 102). In the present embodiment, the semiconductor structure 10 is a back-illuminated image sensor structure. In addition to being used to form a via connected to the back side of the substrate 102 to connect the pad, the tungsten layer 110 is also used to form a metal grating on the back side of the substrate 102. The metal grating is used to prevent the light irradiated to the pixel area with the target of one pixel from diffusing to adjacent pixels, and to block the light from being incident on the area outside the pixel area to be kept optically dark. Therefore, the tungsten layer 110 is, for example, patterned, and the remaining tungsten layer 110 is located in the via hole area, the metal grating area, and the area where the pad is to be set on the back side of the substrate 102.

[0039] The pad metal layer 120 is disposed on the tungsten layer 110 to form a pad. In this embodiment, the pad metal layer 120 may also be a pad obtained by patterning. The material of the pad metal layer 120 may include metal aluminum or metal copper, and in this embodiment, for example, metal aluminum.

[0040] The semiconductor structure 10 of the embodiment of the present invention further includes a transition layer 130, which is attached to the upper surface of the tungsten layer 110, and the lower surface of the pad metal layer 120 is attached to the upper surface of the transition layer 130. The transition layer 130 is used to buffer and transition the relatively rough surface of the tungsten layer 120, that is, to avoid the poor morphology caused by the change of crystal orientation and stress release when the pad metal layer 120 is directly deposited on the rough tungsten substrate. The upper surface of the tungsten layer 110 and the lower surface of the pad metal layer 120 are separated by the transition layer 130, which has an improvement effect on the morphology of the pad metal layer 120. It can be understood that the transition layer 130 is not a part of the above-mentioned tungsten layer 110, but a layer attached to the tungsten layer 110 formed by another process and / or material. The transition layer 130 is preferably formed by a sputtering process (or a PVD process) to reduce the influence of the crystal orientation of the film layer by the tungsten layer 110.

[0041] Figure 2A FIG. 1 is a partial schematic diagram of a semiconductor structure according to an embodiment of the present invention. Figure 2B yes Figure 2A A photograph of a pad metal layer in a semiconductor structure shown. Figure 2A The part of the semiconductor structure shown is, for example, Figure 1 The area outlined by the dotted line in the middle. Figure 2AIn one embodiment, the transition layer 130 is a single-layer titanium nitride layer, that is, the titanium nitride layer is used for buffering, and the pad material layer 120 is made of metal aluminum. Figure 2B As shown, when the titanium nitride layer is used as the transition layer 130, there are still some hillock defects on the surface of the metal aluminum layer.

[0042] Figure 3A FIG. 4 is a partial schematic diagram of a semiconductor structure according to another embodiment of the present invention. Figure 3A The part of the semiconductor structure shown is, for example, Figure 1 The area outlined by the dotted circle. Figure 3B yes Figure 3A A photograph of a pad metal layer in a semiconductor structure shown. Figure 3B and Figure 2B The photos shown are at the same magnification. Figure 3A In another embodiment, the transition layer 130 includes a titanium nitride layer 131 and a titanium layer 132 stacked in sequence in a direction away from the tungsten layer 110. This embodiment mainly uses the stack of the titanium nitride layer 131 and the titanium layer 132 to buffer and transition between the tungsten layer 110 and the pad metal layer 120. The pad material layer 120 is made of metal aluminum. Figure 3B As shown, relative to Figure 2B , the protrusion defects are greatly reduced, that is, the transition layer 130 of this embodiment has a better effect on improving the surface morphology of the pad metal layer 120.

[0043] Research has found that, compared with titanium nitride, the transition layer using titanium single substance has a better effect on improving the surface morphology of the pad metal layer 120. In another embodiment, only a titanium layer is used as the transition layer 130 disposed between the tungsten layer 110 and the pad metal layer 120, which can also improve the surface morphology of the pad metal layer 120 located on the tungsten layer 110, and only using a titanium layer is more effective than using only a titanium nitride layer (such as Figure 2B As shown in FIG. 1 , the surface of the pad metal layer 120 has fewer defects and better flatness. In the semiconductor structure 10 of the embodiment of the present invention, the setting of the transition layer 130 is not limited to the above embodiment, and a single-layer transition layer or a multi-layer transition layer can also be used according to specific circumstances, and the transition layer can also include other materials.

[0044] The embodiment of the present invention further relates to a method for forming a semiconductor structure. Figure 4 FIG. 1 is a flow chart of a method for forming a semiconductor structure according to an embodiment of the present invention. The method can be used to form the semiconductor structure 10 described in the previous embodiment. Figure 1 and Figure 4 The method for forming a semiconductor structure according to an embodiment of the present invention comprises the following steps:

[0045] S1: providing a semiconductor substrate 100, wherein the semiconductor substrate 100 comprises a top metal layer 101, and a through hole 101a exposing the top metal layer 101 is disposed on the top metal layer 101;

[0046] S2: Depositing tungsten on the semiconductor substrate 100 by a CVD process to form a tungsten layer 110, wherein the tungsten layer 110 fills the through hole 101a and extends from the through hole 101a to cover the top surface of the semiconductor substrate 100;

[0047] S3 : sequentially depositing a transition layer 130 and a pad metal layer 120 on the tungsten layer 110 , wherein the transition layer 130 is attached to the upper surface of the tungsten layer 110 , and the pad metal layer 120 is attached to the upper surface of the transition layer 130 .

[0048] The structure of the semiconductor substrate 100 in step S1 can refer to the above description of the semiconductor substrate 100 in the semiconductor structure 10. The present invention focuses on the tungsten layer 110, the transition layer 130 and the pad metal layer 120. The formation of the semiconductor substrate 100 can refer to the public technology and will not be described here.

[0049] In step S2, tungsten is deposited on the semiconductor substrate 100 by a CVD process, for example, by a HDCVD (high density plasma CVD) process, to improve the filling performance of tungsten. The formed tungsten layer 110 fills the through hole 101a and extends from the through hole 101a to cover the top surface of the semiconductor substrate 100. Since the tungsten deposited by the CVD process is formed in a columnar crystal growth mode, the surface roughness of the tungsten layer 110 is relatively large.

[0050] In step S3, a transition layer 130 and a pad metal layer 120 are sequentially deposited on the tungsten layer 110. The material of the pad metal layer 120 may include metal aluminum or metal copper. The transition layer 130 may select a suitable material according to the actual improvement effect. In order to simultaneously improve the adhesion with the tungsten layer 110 and the pad metal layer 120, the material of the transition layer 130 may include metal titanium, and further, may also include titanium nitride. In one embodiment, the transition layer 130 includes only a titanium layer. In another embodiment, the transition layer 130 includes a titanium nitride layer and a titanium layer sequentially stacked in a direction away from the tungsten layer 110. The transition layer 130 is preferably deposited by a sputtering process to reduce the influence of the crystal orientation of the film layer by the tungsten layer 110.

[0051] The following is an exemplary process for making the transition layer 130 .

[0052] In one embodiment, the semiconductor substrate 100 is first placed in a titanium nitride deposition chamber of a sputtering device, and after the titanium nitride layer is grown, it is transferred to a titanium metal deposition chamber, and a titanium thin film is deposited on a heater at a temperature of 25°C to 60°C, with a DC power of 3000W to 8000W and a deposition time of 5s to 30s. Then, the semiconductor substrate 100 is transferred to a deposition chamber of a pad metal material (e.g., aluminum metal) to deposit a pad metal layer.

[0053] In another embodiment, the semiconductor substrate 100 is placed in a titanium nitride deposition chamber of a sputtering device, and a reaction recipe is used to sequentially grow the titanium nitride layer and the titanium layer. The semiconductor substrate 100 is placed on a hot plate at a temperature of 25°C to 60°C. After the titanium nitride film is grown, the DC power and the flow rate of nitrogen in the reaction gas are set to 0 for 10s to 30s to extract the nitrogen in the chamber. Then, the DC power is selected to be 3000W to 8000W, and the deposition time is 5s to 30s to deposit the titanium layer. Finally, the semiconductor substrate 100 is transferred into a deposition chamber of a pad metal material (e.g., metal aluminum) to deposit the pad metal layer 120.

[0054] In another embodiment, a titanium thin film is directly deposited on the semiconductor substrate 100 on a hot plate at a temperature of 25°C to 60°C, with a DC power of 3000W to 8000W and a deposition time of 5s to 30s. The semiconductor substrate 100 is then transferred into a deposition chamber of a pad metal material (e.g., aluminum) to deposit the pad metal layer 120.

[0055] In the semiconductor structure and the method for forming the semiconductor structure described in the embodiment of the present invention, a transition layer 130 is formed between the tungsten layer 110 and the pad metal layer 120, and the transition layer 130 is attached to the upper surface of the tungsten layer 110, and the pad metal layer 120 is attached to the upper surface of the transition layer 130. The transition layer 130 plays a transition role between the tungsten layer 110 and the pad metal layer 120, which can improve the coordinated deformation of the pad metal material during the growth process, is conducive to stress release, and reduces the probability of protrusion defects. It can reduce the influence of the rough surface of the tungsten layer 110 on the morphology of the pad metal layer 120, optimize the surface morphology of the pad metal layer 120 located on the tungsten layer 110, and help reduce the difficulty of the subsequent packaging and testing process and improve the accuracy of packaging and testing.

[0056] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referenced to each other.

[0057] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A semiconductor structure, characterized in that: include: A semiconductor substrate, wherein the semiconductor substrate comprises a top metal layer, and a through hole exposing the top metal layer is disposed on the top metal layer; a tungsten layer, the tungsten layer filling the through hole and extending from the through hole to cover the top surface of the semiconductor substrate, the tungsten layer being formed by chemical vapor deposition; A pad metal layer is disposed on the tungsten layer, and the material of the pad metal layer is metal aluminum; as well as, A transition layer is attached to the upper surface of the tungsten layer, the transition layer includes a titanium layer, and the lower surface of the pad metal layer is attached to the upper surface of the titanium layer of the transition layer.

2. The semiconductor structure according to claim 1, wherein: The transition layer includes a titanium nitride layer and a titanium layer which are sequentially stacked in a direction away from the tungsten layer.

3. The semiconductor structure according to claim 1, wherein: An insulating layer and an adhesion layer covering the insulating layer are provided on a side surface of the through hole, and the tungsten layer covers the adhesion layer.

4. A method for forming a semiconductor structure, characterized in that: include: Providing a semiconductor substrate, the semiconductor substrate comprising a top metal layer, and a through hole exposing the top metal layer is disposed on the top metal layer; Depositing tungsten on the semiconductor substrate by a CVD process to form a tungsten layer, wherein the tungsten layer fills the through hole and extends from the through hole to cover the top surface of the semiconductor substrate; as well as, A transition layer and a pad metal layer are sequentially deposited on the tungsten layer, wherein the transition layer is attached to the upper surface of the tungsten layer, and the pad metal layer is attached to the upper surface of the transition layer. The transition layer includes a titanium layer, and the material of the pad metal layer is metallic aluminum. The lower surface of the pad metal layer is attached to the upper surface of the titanium layer of the transition layer.

5. The forming method according to claim 4, characterized in that: The transition layer includes a titanium nitride layer and a titanium layer which are sequentially stacked in a direction away from the tungsten layer.

6. The forming method according to claim 4, characterized in that: The transition layer comprises only a titanium layer.

7. The forming method according to claim 4, characterized in that: The transition layer is deposited by sputtering process.

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