A synchronous rectification control method for a phase-shifted full-bridge DC-DC converter

Abstract

The present invention discloses a synchronous rectification control method for a phase-shifted full-bridge DC-DC converter. In the secondary side of the synchronous rectification circuit of the traditional phase-shifted full-bridge DC-DC converter, a switch tube that is easy to control is used to replace the diode, and a single-chip microcontroller is used to control the synchronous rectification drive timing logic of the phase-shifted full-bridge circuit, so that in the process of the transformer transferring the primary side energy to the secondary side, the secondary side switch tube is always in a low-impedance conduction stage, thereby achieving the purpose of further reducing the loss of the secondary side switch tube. The principle of the duty cycle loss generated by the phase-shifted full-bridge circuit is simulated and analyzed, and the cause and duration of the duty cycle loss generated by the phase-shifted full-bridge circuit are further obtained. In the simulation, the duty cycle generated by the phase-shifted full-bridge circuit is improved, and then the synchronous rectification timing logic is determined. According to the obtained synchronous rectification drive timing, a closed-loop simulation analysis of the phase-shifted full-bridge DC-DC converter is established to verify that the synchronous rectification timing can well approximate the diode conduction condition.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a synchronous rectification control method of a phase-shifted full-bridge DC-DC converter. Background Art

[0002] In recent years, there has been an increasing demand for power supplies such as servers and on-board chargers to be able to handle higher power. Most of these high-power power supplies use full-bridge circuits, especially phase-shifted full-bridge (PSFB) circuits. The traditional synchronous rectification drive timing applied to the phase-shifted full-bridge uses a simple OR logic, which cannot achieve synchronous rectification in the full operating range. The phase-shifted full-bridge (PSFB) converter is an attractive topology in medium and high power DC / DC converters because it achieves high efficiency and fixed switching frequency by achieving zero voltage switching (ZVS) of the primary side switch, low RMS current, and a simple control scheme. Due to this advantage, it has been widely used in various applications such as server power supplies, electric vehicle chargers, and high-power LED drivers. Because it can achieve zero voltage switching operation when switching elements such as super MOSFETs and IGBTs are turned on, it can reduce switching losses and can handle higher power. Due to the production process, parasitic diodes, also known as body diodes, will appear in the switching elements such as MOSFET and IGBT used in the phase-shift full-bridge circuit. During the rectification operation of the phase-shift full-bridge circuit, current still flows through the body diode of the switch tube, causing large power loss.

[0003] The synchronous rectification strategy of the existing phase-shifted full-bridge DC-DC converter generally adopts simple logic. Although it can realize the function of synchronous rectification, it cannot be well matched with the working mode when using diode rectification. After the synchronous switch tube is turned off, current will still flow through its body diode to generate power loss. This is the power consumption problem caused by the diode rectification timing. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention discloses a synchronous rectification control method for a phase-shifted full-bridge DC-DC converter to solve the problems raised in the above background technology.

[0005] (I) Technical solution

[0006] To achieve the above objectives, the present invention is implemented through the following technical solutions: In view of the fact that the existing synchronous rectification technology of the phase-shifted full-bridge DC-DC converter cannot well realize the power consumption problem caused by the diode rectification timing, the present invention proposes a synchronous rectification control method for the phase-shifted full-bridge DC-DC converter. In the secondary side of the synchronous rectification circuit of the traditional phase-shifted full-bridge DC-DC converter, a switch tube that is easy to control is used to replace the diode, and a single-chip microcontroller is used to control the synchronous rectification drive timing logic of the phase-shifted full-bridge circuit, so that in the process of the transformer transferring the primary side energy to the secondary side, the secondary side switch tube is always in a low-impedance conduction stage, thereby achieving the purpose of further reducing the loss of the secondary side switch tube. The principle of duty cycle loss generated by the phase-shifted full-bridge circuit is simulated and analyzed, and the cause of duty cycle loss in the phase-shifted full-bridge circuit and its duration are further derived. The duty cycle generated by the phase-shifted full-bridge circuit is improved in the simulation, and then the synchronous rectification timing logic is determined. According to the obtained synchronous rectification drive timing, a closed-loop simulation analysis of the phase-shifted full-bridge DC-DC converter is established to verify that the synchronous rectification timing can well approximate the diode conduction condition. Compared with traditional or logical drive timing, it can more effectively reduce the power loss on the switching tube.

[0007] The single-chip microcontroller controlled phase-shifted full-bridge circuit of the present invention includes a primary-side full-bridge circuit of a transformer T, a synchronous rectification circuit of a secondary-side of the transformer T, and a single-chip microcontroller controller. The primary-side full-bridge circuit is composed of a voltage source U, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4, and a resonant inductor L1. The secondary-side synchronous rectification circuit is composed of a fifth switch tube Q5, a sixth switch tube Q6, an output filter inductor L2, an output filter capacitor C1, and a load R. The first switch tube Q1 and the third switch tube Q3 are connected in series and then connected in parallel with the voltage source U. The second switch tube Q2 and the fourth switch tube Q4 are connected in series and then connected in parallel with the voltage source U. The resonant inductor L1 is connected in series between the primary side of the transformer T and the first switch tube Q1. The fifth switch tube Q5 and the sixth switch tube Q6 are connected in parallel to the secondary side of the transformer T, the output filter capacitor C1 and the load R are connected in parallel between one end of the output filter inductor L2 and the secondary side of the transformer T, the other end of the output filter inductor L2 is connected to the cathode of the fifth switch tube Q5, the gates of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, the fourth switch tube Q4, the fifth switch tube Q5, and the sixth switch tube Q6 are connected to the IO port of the single-chip controller, the driving timing generated by the single-chip controller controls the gates of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, the fourth switch tube Q4, the fifth switch tube Q5, and the sixth switch tube Q6, and the voltage and current on the load R are sampled and input into the single-chip controller.

[0008] The implementation steps of the synchronous rectification driving timing logic of the phase-shifted full-bridge circuit controlled by a single-chip microcontroller of the present invention are as follows:

[0009] S1: Establish mathematical models of various parts of the phase-shifted full-bridge converter

[0010] Establish a phase-shifted full-bridge DC-DC converter structure, and through the design of the converter, make the design of the converter parameters meet its application requirements;

[0011] S2: Analyze the operating mode of the converter

[0012] 1. Switching mode 0, time t0:

[0013] Before t0, the first switch tube Q1 and the fourth switch tube Q4 are turned on, and the primary side current i p The current flows through the first switch tube Q1, the resonant inductor L1, the primary winding of the transformer T and the fourth switch tube Q4, and the rectifier side current flows through the fifth switch tube Q5, the output filter inductor L2, the output filter capacitor C1 and the load R;

[0014] 2. Switching mode 1, [t0, t1]:

[0015] The value of the current i1 flowing through the primary side of the transformer T at time t0 is I1. When the first switch tube Q1 is turned off at time t0, the primary side current i1 of the transformer T is p The parallel capacitors of the first switch tube Q1 and the third switch tube Q3 are charged and discharged respectively. The first switch tube Q1 is turned off at zero voltage. During this period, the resonant inductor L1 is connected in series with the filter inductor L2. It can be considered that the primary side current i of the transformer T p Approximately unchanged. In this way, the primary side current i of transformer T p The voltage across the first switch tube Q1 and the third switch tube Q3 is:

[0016] i P (t) = I P (t0) = I1 (1)

[0017]

[0018] At time t1, the voltage across the third switch tube Q3 drops to zero, the anti-parallel diode of the third switch tube Q3 is naturally turned on, and the switching mode 1 ends.

[0019] The time calculation for this switching mode is:

[0020] t 01 =2C Lead V in / I1 (4)

[0021] Where V in is the input voltage of the phase-shifted full-bridge DC-DC converter;

[0022] 3. Switch mode 2, [t1, t2]:

[0023] After the anti-parallel diode of the third switch tube Q3 is turned on, the third switch tube Q3 is turned on at zero voltage. K represents the transformation ratio of the transformer T. During this period, the primary side current i of the transformer T is p Equal to the filter inductor current i converted to the primary side of transformer T Lf ,Right now:

[0024] i P (t) = i Lf (t) / K (5)

[0025] At time t2, the primary current i of transformer T is p Descend to I2;

[0026] 4. Switch mode 3, [t2, t3]:

[0027] At time t2, the fourth switch tube Q4 is turned off, and the primary side current i of the transformer T p The parallel capacitors of the fourth switch tube Q4 and the second switch tube Q2 are charged and discharged respectively. The fourth switch tube Q4 is turned off at zero voltage. At this time, the potential of the secondary winding of the transformer T becomes positive at the bottom and negative at the top. At this time, the sixth switch tube Q6 is turned on. Since the fifth switch tube Q5 and the sixth switch tube Q6 are turned on at the same time, the voltage of the secondary winding of the transformer is zero, that is, duty cycle loss is generated. During this period, the resonant inductor L1 resonates with the output capacitors of the fourth switch tube Q4 and the second switch tube Q2, and the primary side current i of the transformer T is p The voltage across the fourth switch tube Q4 and the second switch tube Q2 is:

[0028] i P (t) = I2cosω1(t-t2) (6)

[0029]

[0030]

[0031] in: At time t3, when the voltage across the fourth switch tube Q4 rises to the input voltage V in , the anti-parallel diode of the second switch tube Q2 is naturally turned on, and the switching mode 3 ends;

[0032] The time calculation for this switching mode is:

[0033]

[0034] 5. Switch mode 4, [t3, t4]:

[0035] At time t3, the anti-parallel diode of the second switch tube Q2 is naturally turned on, clamping the voltage of the second switch tube Q2 at zero. At this time, the second switch tube Q2 is turned on at zero voltage;

[0036] At time t4, the primary current i of transformer T is p When the voltage drops to zero, the anti-parallel diodes of the second switch tube Q2 and the third switch tube Q3 are naturally turned off;

[0037] 6. Switch mode 5, [t4, t5]:

[0038] At time t4, the primary current i of transformer T is p It passes through zero from a positive value and increases in a negative direction, but due to the primary current i of the transformer T p The load current is still insufficient to provide the load current, and the load current is still provided by the fifth switch tube Q5 and the sixth switch tube Q6. Therefore, the primary winding voltage is still zero, and the resonant inductor L r The voltage across the terminals is V in ,i p Increasing in reverse, its size is:

[0039]

[0040] At t5, the current on the primary side of transformer T reaches the load current -I converted to the primary side of transformer T. Lf (t5) / K, the switching mode ends, at which time the fifth switch tube Q5 is turned off, and the sixth switch tube Q6 flows through the entire load current;

[0041] 7. Switching mode 6, [t5, t6]:

[0042] During the period from t5 to t6, the power supply supplies power to the load R. At t6, the third switch tube Q3 is turned off, and the phase-shifted full-bridge DC-DC converter starts to work in another half cycle, and its working condition is similar to the above half cycle.

[0043] S3: Find the time when the duty cycle is lost and give the timing logic of its synchronous rectification

[0044] Based on the above analysis, the duty cycle loss calculation formula of the phase-shifted full-bridge DC-DC converter can be obtained as follows:

[0045]

[0046] Due to t 23 is very short and can be ignored, so the duration of duty cycle loss can be approximated as Based on the analysis of the working mode of a switching cycle of the phase-shifted full-bridge, the cause of the duty cycle loss and its duration can be obtained, so the improved phase-shifted full-bridge synchronous rectification timing is obtained, and then the logical deduction process of the timing of the fifth switch tube Q5 is obtained. From its Karnaugh map, it can be obtained that the improved synchronous rectification timing logic is:

[0047]

[0048] Among them, Q1 is the driving timing of the first switch tube Q1 on the primary side of the transformer T; Q4 is the driving timing of the primary side MOS tube Q4; De is the obtained duty cycle loss delay timing.

[0049] Similarly, the improved synchronous rectification timing logic of the sixth switch tube Q5 is:

[0050]

[0051] S4: Based on the obtained synchronous rectification driving timing, a closed-loop simulation model of the phase-shifted full-bridge DC-DC converter is established, and the synchronous rectification timing is verified through simulation to well approximate the diode conduction condition.

[0052] The beneficial effects brought by the above invention are as follows:

[0053] 1. The present invention improves the power loss on the secondary side of the transformer without affecting the operating state and function of the phase-shifted full-bridge DC-DC converter.

[0054] 2. The present invention provides a synchronous rectification drive timing logic for a phase-shifted full-bridge circuit based on a single-chip microcontroller digital control. According to the obtained synchronous rectification drive timing, a closed-loop simulation model of a phase-shifted full-bridge DC-DC converter is established. Through simulation, it is verified that the synchronous rectification timing can well approximate the diode conduction condition, which can further reduce the power loss of the synchronous switch tube in high current situations. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 The circuit topology diagram of the phase-shifted full-bridge DC-DC converter based on diode rectification in the present invention;

[0056] Figure 2 It is the working waveform of a phase-shifted full-bridge DC-DC converter based on diode rectification in one switching cycle of the present invention;

[0057] Figure 3 A topological diagram of a phase-shifted full-bridge circuit controlled by a single-chip microcontroller of the present invention;

[0058] Figure 4 The single chip microcontroller of the present invention controls the synchronous rectification timing of the phase-shifted full-bridge circuit;

[0059] Figure 5 This is a logic derivation process diagram of the timing of the fifth switch tube Q5 of the present invention;

[0060] Figure 6 A closed-loop simulation model of the phase-shifted full-bridge DC-DC converter of the present invention;

[0061] Figure 7 The figure is a comparison of the driving timing waveform of the phase-shift full-bridge circuit controlled by the single-chip microcontroller of the present invention and the conduction condition of the phase-shift full-bridge DC-DC converter based on diode rectification. DETAILED DESCRIPTION

[0062] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0063] See also Figures 1 to 7 The figure shows a synchronous rectification control method of a phase-shifted full-bridge DC-DC converter in the present invention.

[0064] like Figure 1 The figure shows a circuit topology diagram of a phase-shifted full-bridge DC-DC converter based on diode rectification, including a primary-side full-bridge circuit of a first transformer T1 and a secondary-side synchronous rectification circuit of the first transformer T1. The primary-side full-bridge circuit is composed of a first voltage source U1, a seventh switch tube Q7, an eighth switch tube Q8, a ninth switch tube Q9, a tenth switch tube Q10, and a first resonant inductor L2. The secondary-side synchronous rectification circuit is composed of a first rectifier diode D1, a second rectifier diode D2, a first output filter inductor L3, an output first filter capacitor C2, and a first load R1. The seventh switch tube Q7 and The ninth switch tube Q9 is connected in series and connected in parallel with the first voltage source U1. The eighth switch tube Q8 and the tenth switch tube Q10 are connected in series and connected in parallel with the first voltage source U1. The first resonant inductor L3 is connected in series between the primary side of the first transformer T1 and the seventh switch tube Q7. The first rectifier diode D1 and the second rectifier diode D2 are connected in parallel to the secondary side of the first transformer T1. The first output filter capacitor C2 and the first load R1 are connected in parallel between one end of the first output filter inductor L4 and the secondary side of the first transformer T1. The other end of the first output filter inductor L4 is connected to the cathode of the first rectifier diode D1.

[0065] like Figure 2 The figure shows the working waveform of the phase-shifted full-bridge DC-DC converter based on diode rectification within one switching cycle. It can be seen that the introduction of the first resonant inductor L3 realizes the zero-voltage turn-on of the primary-side switch tube of the first transformer T1, but at the same time brings the problem of duty cycle loss, which is the power consumption problem caused by the diode rectification timing.

[0066] like Figure 3As shown, the single-chip microcontroller controlled phase-shifted full-bridge circuit of the present invention includes a primary-side full-bridge circuit of a transformer T, a synchronous rectification circuit on the secondary side of the transformer T, and a single-chip microcontroller controller. The primary-side full-bridge circuit is composed of a voltage source U, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4, and a resonant inductor L1. The secondary-side synchronous rectification circuit is composed of a fifth switch tube Q5, a sixth switch tube Q6, an output filter inductor L2, an output filter capacitor C1, and a load R. The first switch tube Q1 and the third switch tube Q3 are connected in series and then connected in parallel with the voltage source U. The second switch tube Q2 and the fourth switch tube Q4 are connected in series and then connected in parallel with the load R. The voltage sources U are connected in parallel, the resonant inductor L1 is connected in series between the primary side of the transformer T and the first switch tube Q1, the fifth switch tube Q5 and the sixth switch tube Q6 are connected in parallel to the secondary side of the transformer T, the output filter capacitor C1 and the load R are connected in parallel between one end of the output filter inductor L2 and the secondary side of the transformer T, the other end of the output filter inductor L2 is connected to the cathode of the fifth switch tube Q5, the gates of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, the fourth switch tube Q4, the fifth switch tube Q5, and the sixth switch tube Q6 are connected to the IO port of the single-chip controller, and the voltage and current on the load R are sampled and input into the single-chip controller.

[0067] The implementation steps of the synchronous rectification driving timing logic of the phase-shifted full-bridge circuit controlled by a single-chip microcontroller of the present invention are as follows:

[0068] S1: Establish mathematical models of various parts of the phase-shifted full-bridge converter

[0069] Establish a phase-shifted full-bridge DC-DC converter structure, and through the design of the converter, make the design of the converter parameters meet its application requirements;

[0070] S2: Analyze the operating mode of the converter

[0071] 1. Switching mode 0, time t0:

[0072] Before t0, the first switch tube Q1 and the fourth switch tube Q4 are turned on, and the primary side current i p The current flows through the first switch tube Q1, the resonant inductor L1, the primary winding of the transformer T and the fourth switch tube Q4, and the rectifier side current flows through the fifth switch tube Q5, the output filter inductor L2, the output filter capacitor C1 and the load R;

[0073] 2. Switching mode 1, [t0, t1]:

[0074] The value of the current i1 flowing through the primary side of the transformer T at time t0 is I1. When the first switch tube Q1 is turned off at time t0, the primary side current i1 of the transformer T is pThe parallel capacitors of the first switch tube Q1 and the third switch tube Q3 are charged and discharged respectively. The first switch tube Q1 is turned off at zero voltage. During this period, the resonant inductor L1 is connected in series with the filter inductor L2. It can be considered that the primary side current i of the transformer T p Approximately unchanged. In this way, the primary side current i of transformer T p The voltage across the first switch tube Q1 and the third switch tube Q3 is:

[0075] i P (t) = I P (t0) = I1 (1)

[0076]

[0077] At time t1, the voltage across the third switch tube Q3 drops to zero, the anti-parallel diode of the third switch tube Q3 is naturally turned on, and the switching mode 1 ends.

[0078] The time calculation for this switching mode is:

[0079] t 01 =2C Lead V in / I1 (4)

[0080] Where V in is the input voltage of the phase-shifted full-bridge DC-DC converter;

[0081] 3. Switch mode 2, [t1, t2]:

[0082] After the anti-parallel diode of the third switch tube Q3 is turned on, the third switch tube Q3 is turned on at zero voltage. K represents the transformation ratio of the transformer T. During this period, the primary side current i of the transformer T is p Equal to the filter inductor current i converted to the primary side of transformer T Lf ,Right now:

[0083] i P (t) = i Lf (t) / K (5)

[0084] At time t2, the primary current i of transformer T is p Descend to I2;

[0085] 4. Switch mode 3, [t2, t3]:

[0086] At time t2, the fourth switch tube Q4 is turned off, and the primary side current i of the transformer T pThe parallel capacitors of the fourth switch tube Q4 and the second switch tube Q2 are charged and discharged respectively. The fourth switch tube Q4 is turned off at zero voltage. At this time, the potential of the secondary winding of the transformer T becomes positive at the bottom and negative at the top. At this time, the sixth switch tube Q6 is turned on. Since the fifth switch tube Q5 and the sixth switch tube Q6 are turned on at the same time, the voltage of the secondary winding of the transformer is zero, that is, duty cycle loss is generated. During this period, the resonant inductor L1 resonates with the output capacitors of the fourth switch tube Q4 and the second switch tube Q2, and the primary side current i of the transformer T is p The voltage across the fourth switch tube Q4 and the second switch tube Q2 is:

[0087] i P (t) = I2cosω1(t-t2) (6)

[0088]

[0089] in: At time t3, when the voltage across the fourth switch tube Q4 rises to the input voltage V in , the anti-parallel diode of the second switch tube Q2 is naturally turned on, and the switching mode 3 ends;

[0090] The time calculation for this switching mode is:

[0091]

[0092] 5. Switch mode 4, [t3, t4]:

[0093] At time t3, the anti-parallel diode of the second switch tube Q2 is naturally turned on, clamping the voltage of the second switch tube Q2 at zero. At this time, the second switch tube Q2 is turned on at zero voltage;

[0094] At time t4, the primary current i of transformer T is p When the voltage drops to zero, the anti-parallel diodes of the second switch tube Q2 and the third switch tube Q3 are naturally turned off;

[0095] 6. Switch mode 5, [t4, t5]:

[0096] At time t4, the primary current i of transformer T is p It passes through zero from a positive value and increases in a negative direction, but due to the primary current i of the transformer T p The load current is still insufficient to provide the load current, and the load current is still provided by the fifth switch tube Q5 and the sixth switch tube Q6. Therefore, the primary winding voltage is still zero, and the resonant inductor L r The voltage across the terminals is V in ,i p Increasing in reverse, its size is:

[0097]

[0098] At t5, the current on the primary side of transformer T reaches the load current -I converted to the primary side of transformer T. Lf (t5) / L, the switching mode ends. At this time, the fifth switch tube Q5 is turned off, and the sixth switch tube Q6 flows through the entire load current;

[0099] 7. Switching mode 6, [t5, t6]:

[0100] During the period from t5 to t6, the power supply supplies power to the load R. At t6, the third switch tube Q3 is turned off, and the phase-shifted full-bridge DC-DC converter starts to work in another half cycle, and its working condition is similar to the above half cycle.

[0101] S3: Find the time when the duty cycle is lost and give the timing logic of its synchronous rectification

[0102] Based on the above analysis, the duty cycle loss calculation formula of the phase-shifted full-bridge DC-DC converter can be obtained as follows:

[0103]

[0104] Due to t 23 is very short and can be ignored, so the duration of duty cycle loss can be approximated as Based on the analysis of the working mode of a switching cycle of the phase-shifted full-bridge, the cause of the duty cycle loss and its duration can be obtained, and thus the synchronous rectification timing of the phase-shifted full-bridge circuit controlled by the microcontroller can be obtained. Figure 5 The logical derivation process of the timing of the fifth switch tube Q5 is given. From its Karnaugh map, it can be obtained that the improved synchronous rectification timing logic is:

[0105]

[0106] Among them, Q1 is the driving timing of the first switch tube Q1 on the primary side of the transformer T; Q4 is the driving timing of the primary side MOS tube Q4; De is the obtained duty cycle loss delay timing.

[0107] Similarly, the improved synchronous rectification timing logic of the sixth switch tube Q6 is:

[0108]

[0109] S4: Based on the obtained synchronous rectification driving timing, a closed-loop simulation model of the phase-shifted full-bridge DC-DC converter is established, and the synchronous rectification timing is verified through simulation to well approximate the diode conduction condition.

[0110] Figure 6According to the obtained synchronous rectification driving timing, a closed-loop simulation model of the phase-shifted full-bridge DC-DC converter is established. Figure 7 This is a comparison diagram of the driving timing waveform of the phase-shifted full-bridge circuit controlled by the single-chip microcontroller and the conduction condition of the phase-shifted full-bridge DC-DC converter based on diode rectification, which verifies that the driving timing of the phase-shifted full-bridge circuit controlled by the single-chip microcontroller of the present invention can well approximate the diode conduction condition, and can more effectively reduce the power loss on the switching tube compared to the traditional or logical driving timing.

[0111] The working principle and working process of the present invention are as follows:

[0112] In the secondary side of the synchronous rectification circuit of the traditional phase-shifted full-bridge DC-DC converter, a switch tube that is easy to control is used to replace the diode, and the synchronous rectification drive timing logic of the phase-shifted full-bridge circuit is controlled by a single-chip microcontroller, so that the secondary side switch tube is always in the low-impedance conduction stage during the process of the transformer transferring the primary side energy to the secondary side, so as to further reduce the loss of the secondary side switch tube. The principle of duty cycle loss generated by the phase-shifted full-bridge circuit is simulated and analyzed, and the cause and duration of duty cycle loss generated by the phase-shifted full-bridge circuit are further obtained. In the simulation, the duty cycle generated by the phase-shifted full-bridge circuit is improved, and then the synchronous rectification timing logic is determined. According to the obtained synchronous rectification drive timing, a closed-loop simulation analysis of the phase-shifted full-bridge DC-DC converter is established to verify that the synchronous rectification timing can well approximate the diode conduction condition, and can more effectively reduce the power loss on the switch tube compared to the traditional or logical drive timing.

Claims

1. A synchronous rectification control method for a phase-shifted full-bridge DC-DC converter, characterized in that: include: In the secondary side of the synchronous rectification circuit of the traditional phase-shifted full-bridge DC-DC converter, a switch tube that is easy to control is used to replace the diode, and a single-chip microcontroller is used to control the synchronous rectification drive timing logic of the phase-shifted full-bridge circuit, so that the secondary side switch tube is always in a low-impedance conduction stage during the process of the transformer transferring the primary side energy to the secondary side, which is used to reduce the loss of the secondary side switch tube; The principle of duty cycle loss in the phase-shifted full-bridge circuit is simulated and analyzed, and the cause and duration of duty cycle loss in the phase-shifted full-bridge circuit are obtained. In the simulation, the duty cycle of the phase-shifted full-bridge circuit is improved, and the synchronous rectification timing logic is determined; The synchronous rectification driving timing is obtained according to the preset conditions, and the closed-loop simulation model of the phase-shifted full-bridge DC-DC converter is established by using the timing. It is verified through simulation analysis that the synchronous rectification driving timing is used to simulate the conduction condition of the diode; The method of using a single chip microcontroller to control the synchronous rectification driving timing logic of the phase-shifted full-bridge circuit comprises the following steps: S1: Establish mathematical models of various parts of the phase-shifted full-bridge converter; Establish a phase-shifted full-bridge DC-DC converter structure, and through the design of the converter, make the design of the converter parameters meet its application requirements; S2: Analyze the working mode of the converter; (1) Switching mode 0, time t0; Before t0, the first switch tube Q1 and the fourth switch tube Q4 are turned on, and the primary side current i p The current flows through the first switch tube Q1, the resonant inductor L1, the primary winding of the transformer T and the fourth switch tube Q4, and the rectifier side current flows through the fifth switch tube Q5, the output filter inductor L2, the output filter capacitor C1 and the load R; (2) Switching mode 1, [t0, t1]; The value of the current i1 flowing through the primary side of the transformer T at time t0 is I1. When the first switch tube Q1 is turned off at time t0, the primary side current i1 of the transformer T is p The parallel capacitors of the first switch tube Q1 and the third switch tube Q3 are charged and discharged respectively. The first switch tube Q1 is turned off at zero voltage. During this period, the resonant inductor L1 is connected in series with the filter inductor L2. It can be considered that the primary side current i of the transformer T p Approximately unchanged, so the primary side current i of transformer T p The voltage across the first switch tube Q1 and the third switch tube Q3 is: i P (t)=I P (t0)=I1 (1) At time t1, the voltage across the third switch tube Q3 drops to zero, the anti-parallel diode of the third switch tube Q3 is naturally turned on, and the switching mode 1 ends; The time calculation for this switching mode is: t 01 =2C Lead In in / I1 (4) Where V in is the input voltage of the phase-shifted full-bridge DC-DC converter; (3) Switching mode 2, [t1, t2]; After the anti-parallel diode of the third switch tube Q3 is turned on, the third switch tube Q3 is turned on at zero voltage. K represents the transformation ratio of the transformer T. During this period, the primary side current i of the transformer T is p Equal to the filter inductor current i converted to the primary side of transformer T Lf ,Right now: i P (t)=i Lf (t) / K (5) At time t2, the primary current i of transformer T is p Descend to I2; (4) Switching mode 3, [t2, t3]; At time t2, the fourth switch tube Q4 is turned off, and the primary side current i of the transformer T p The parallel capacitors of the fourth switch tube Q4 and the second switch tube Q2 are charged and discharged respectively. The fourth switch tube Q4 is turned off at zero voltage. At this time, the potential of the secondary winding of the transformer T becomes positive at the bottom and negative at the top. At this time, the sixth switch tube Q6 is turned on. Since the fifth switch tube Q5 and the sixth switch tube Q6 are turned on at the same time, the voltage of the secondary winding of the transformer is zero, that is, duty cycle loss is generated. During this period, the resonant inductor L1 resonates with the output capacitors of the fourth switch tube Q4 and the second switch tube Q2, and the primary side current i of the transformer T is p The voltage across the fourth switch tube Q4 and the second switch tube Q2 is: i P (t)=I2cosω1(t-t2) (6) in: At time t3, when the voltage across the fourth switch tube Q4 rises to the input voltage V in , the anti-parallel diode of the second switch tube Q2 is naturally turned on, and the switching mode 3 ends; The time calculation for this switching mode is: (5) Switching mode 4, [t3, t4]; At time t3, the anti-parallel diode of the second switch tube Q2 is naturally turned on, clamping the voltage of the second switch tube Q2 at zero. At this time, the second switch tube Q2 is turned on at zero voltage; At time t4, the primary current i of transformer T is p When the voltage drops to zero, the anti-parallel diodes of the second switch tube Q2 and the third switch tube Q3 are naturally turned off; (6) Switching mode 5, [t4, t5]; At time t4, the primary current i of transformer T is p It passes through zero from a positive value and increases in a negative direction, but due to the primary current i of the transformer T p The load current is still insufficient to provide the load current, and the load current is still provided by the fifth switch tube Q5 and the sixth switch tube Q6. Therefore, the primary winding voltage is still zero, and the resonant inductor L r The voltage across the terminals is V in ,i p Increasing in reverse, its size is: At t5, the current on the primary side of transformer T reaches the load current -I converted to the primary side of transformer T. Lf (t5) / K, the switching mode ends, at which time the fifth switch tube Q5 is turned off, and the sixth switch tube Q6 flows through the entire load current; (7) Switching mode 6, [t5, t6]; During the period from t5 to t6, the power supply supplies power to the load R. At t6, the third switch tube Q3 is turned off, and the phase-shifted full-bridge DC-DC converter starts to work in another half cycle. After that, the working state of the converter is symmetrical with the working state of the switching mode 1 to the switching mode 6 mentioned above. S3: Find the time when the duty cycle is lost and give the timing logic of its synchronous rectification; Based on the above analysis, the duty cycle loss calculation formula of the phase-shifted full-bridge DC-DC converter can be obtained as follows: Due to t 23 is very short and can be ignored, so the duration of duty cycle loss can be approximated as Based on the analysis of the working mode of a switching cycle of the phase-shifted full-bridge, the cause of the duty cycle loss and its duration can be obtained, so the improved phase-shifted full-bridge synchronous rectification timing is obtained, and then the logical deduction process of the timing of the fifth switch tube Q5 is obtained. From its Karnaugh map, it can be obtained that the improved synchronous rectification timing logic is: Among them, Q1 is the driving timing of the first switch tube Q1 on the primary side of the transformer T; Q4 is the driving timing of the primary side MOS tube Q4; De is the obtained duty cycle loss delay timing; Similarly, the improved synchronous rectification timing logic of the sixth switch tube Q6 is: S4: Based on the obtained synchronous rectification driving timing, a closed-loop simulation model of the phase-shifted full-bridge DC-DC converter is established, and the synchronous rectification timing is verified through simulation to well approximate the diode conduction condition.

2. The synchronous rectification control method of the phase-shifted full-bridge DC-DC converter according to claim 1, characterized in that: The single-chip microcontroller controlled phase-shifted full-bridge circuit includes a primary-side full-bridge circuit of a transformer T, a synchronous rectification circuit on the secondary side of the transformer T, and a single-chip microcontroller controller. The primary-side full-bridge circuit is composed of a voltage source U, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4, and a resonant inductor L1. The secondary-side synchronous rectification circuit is composed of a fifth switch tube Q5, a sixth switch tube Q6, an output filter inductor L2, an output filter capacitor C1, and a load R. The first switch tube Q1 and the third switch tube Q3 are connected in series and then connected in parallel with the voltage source U. The second switch tube Q2 and the fourth switch tube Q4 are connected in series and then connected in parallel with the voltage source U. The resonant inductor L1 is connected in series between the primary side of the transformer T and the first switch tube Q1. The fifth switch tube Q5 and the sixth switch tube Q6 are connected in parallel to the secondary side of the transformer T, the output filter capacitor C1 and the load R are connected in parallel between one end of the output filter inductor L2 and the secondary side of the transformer T, the other end of the output filter inductor L2 is connected to the cathode of the fifth switch tube Q5, the gates of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, the fourth switch tube Q4, the fifth switch tube Q5, and the sixth switch tube Q6 are connected to the IO port of the single-chip controller, the driving timing generated by the single-chip controller controls the gates of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, the fourth switch tube Q4, the fifth switch tube Q5, and the sixth switch tube Q6, and the voltage and current on the load R are sampled and input into the single-chip controller.

Images