Photovoltaic cell and preparation method thereof

Abstract

The present application relates to the field of photovoltaic technology, and to a photovoltaic cell and a method for preparing the same. A photovoltaic cell comprises: a silicon wafer and a gate line. The gate line is formed on the surface of the silicon wafer; the gate line is in a shell-coated core structure; the core includes a silver-copper slurry layer, and the shell is a pure silver slurry layer; the core contacts the surface of the silicon wafer, and the shell completely covers the exposed surface of the core; or the shell contacts the surface of the silicon wafer and completely covers the exposed surface of the core. The photovoltaic cell of the present application has a gate line in a shell-coated core structure, with a silver-copper slurry layer as the gate line core and as the main body of the entire gate line transmitting current, which not only effectively reduces the consumption of silver paste and reduces costs, but also does not affect the electrical performance; the shell of the pure silver slurry layer is coated on the outside of the silver-copper slurry layer, which reduces the direct contact resistance between the gate line and the welding strip and enhances the conductivity. And the shell is wrapped with a pure silver slurry layer, which can reduce the oxidation of copper and increase the reliability of the battery.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a photovoltaic cell and a method for preparing the same. Background Art

[0002] With the coming of the energy crisis and the increasingly serious environmental pollution caused by traditional energy, the development of clean and environmentally friendly energy has become an urgent need of society. New energy has become one of the important scientific research fields in the 21st century, and photovoltaic cells are one of them.

[0003] For photovoltaic cells, one of the current technical difficulties lies in the printing process in the manufacturing process. The printing process has high requirements for the slurry, and the Ag content in the slurry is high, which is very expensive.

[0004] Among the many photovoltaic cells, taking heterojunction cells as an example, the Ag content in their slurry is required to be very high.

[0005] Heterojunction cells are photovoltaic cells that require the deposition of a transparent conductive oxide film (TCO); and then a metal collector is formed on the TCO layer by screen printing technology. Heterojunction cells have the characteristics of high conversion efficiency, good cell stability, low temperature coefficient, and low process temperature.

[0006] However, when manufacturing heterojunction cells using the current conventional process, more Ag needs to be added to the paste to maintain the low resistivity of the grid line and the low contact resistance with the TCO. However, this practice further increases the production cost of the silver paste and also limits the large-scale production of heterojunction cells. Summary of the invention

[0007] The purpose of the embodiments of the present application is to provide a photovoltaic cell and a method for preparing the same, which can reduce the amount of silver paste used and have a lower gate line contact resistance.

[0008] In a first aspect, the present application provides a photovoltaic cell, comprising:

[0009] Silicon wafer;

[0010] The gate line is formed on the surface of the silicon wafer; the gate line has a structure in which a shell covers a core; the core includes a silver-copper paste layer, and the shell is a pure silver paste layer.

[0011] The photovoltaic cell of the present application has a grid line with a shell covering a core structure, and a silver-copper paste layer is used as the core of the grid line, which is the main body of the entire grid line transmitting current, which not only effectively reduces the consumption of silver paste and reduces costs, but also does not affect the electrical performance; the shell of the pure silver paste layer is coated on the outside of the silver-copper paste layer, which reduces the direct contact resistance between the grid line and the welding strip and enhances the conductivity. In addition, the shell is wrapped with a pure silver paste layer, which can reduce the oxidation of copper and increase the reliability of the battery.

[0012] In other optional embodiments of the present application, the core contacts the surface of the silicon wafer, and the shell completely covers the exposed surface of the core; or the shell contacts the surface of the silicon wafer and covers the entire core.

[0013] In other optional embodiments of the present application, when the core contacts the surface of the silicon wafer, the core further includes a TCO conductive layer, and the TCO conductive layer covers the silver-copper paste layer;

[0014] Optionally, the width of the TCO conductive layer is greater than the width of the silver-copper paste layer.

[0015] In other optional embodiments of the present application, the height of the silver-copper paste layer is greater than the height of the TCO conductive layer.

[0016] In other optional embodiments of the present application, when the shell contacts the surface of the silicon wafer, the pure silver paste layer includes a first pure silver paste layer and a second pure silver paste layer; the first pure silver paste layer is formed on the surface of the silicon wafer, and the silver-copper paste layer is formed on the surface of the first pure silver paste layer.

[0017] Optionally, the width of the first pure silver paste layer is greater than the width of the silver-copper paste layer.

[0018] In other optional embodiments of the present application, the height of the silver-copper paste layer is greater than the height of the pure silver paste layer.

[0019] In other optional embodiments of the present application, the height of the silver-copper slurry layer is 15 μm-20 μm;

[0020] Optionally, the width of the silver-copper paste layer is 35 μm-44 μm;

[0021] Optionally, the height of the pure silver paste layer is 8 μm-12 μm;

[0022] Optionally, the width of the pure silver paste layer is 45 μm-55 μm.

[0023] In a second aspect, the present application provides a method for preparing a photovoltaic cell, wherein a gate line having a shell-encapsulated core structure is prepared on a silicon wafer surface; the core comprises a silver-copper paste; and the shell is a pure silver paste;

[0024] The preparation of the gate line includes: printing a core paste on the surface of the silicon wafer, and after curing, printing a shell paste on the surface of the core paste so that the shell paste completely covers the core paste; or

[0025] Part of the shell slurry is printed on the surface of the silicon wafer. After curing, the core slurry is printed on the surface of part of the shell slurry. After curing, the remaining shell slurry is printed on the surface of the core slurry to completely cover the core slurry.

[0026] In other optional embodiments of the present application, when the core contacts the surface of the silicon wafer, the method further comprises the step of printing a TCO conductive layer;

[0027] The step of printing the TCO conductive layer is after the step of printing the silver-copper paste and before the step of printing the pure silver paste; the step of printing the TCO conductive layer includes:

[0028] The TCO conductive layer is printed on the surface of the silver-copper paste layer, and the TCO conductive layer completely covers the silver-copper paste layer.

[0029] In other optional embodiments of the present application, when the outer shell contacts the surface of the silicon wafer, a portion of pure silver paste is printed on the surface of the silicon wafer. After curing, silver-copper paste is printed on its surface so that its width is smaller than the width of the portion of pure silver paste, and then the remaining pure silver paste is printed so that it completely covers the silver-copper paste.

[0030] In other optional embodiments of the present application, the wet weight of the silver-copper slurry is greater than the wet weight of the shell slurry. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0032] Figure 1 A schematic diagram of the first structure of a photovoltaic cell provided in an embodiment of the present application;

[0033] Figure 2 A second structural schematic diagram of a photovoltaic cell provided in an embodiment of the present application.

[0034] Icon: 100 - photovoltaic cell; 110 - silicon wafer; 120 - grid line; 130 - silver-copper paste layer; 140 - pure silver paste layer; 141 - first pure silver paste layer; 142 - second pure silver paste layer; 150 - TCO conductive layer. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0036] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0037] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0038] In the description of the embodiments of the present application, it should be understood that the terms "up", "left", "right", "horizontal", "inside", "outside", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the products of the application are conventionally placed when in use, or are the orientations or positional relationships conventionally understood by those skilled in the art. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0039] Furthermore, the terms “first”, “second”, etc. are merely used for distinguishing descriptions and are not to be understood as indicating or implying relative importance.

[0040] In the description of the embodiments of the present application, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be a connection between the two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0041] Please refer to Figure 1 Some embodiments of the present application provide a photovoltaic cell 100 , including: a silicon wafer 110 and a gate line 120 .

[0042] Furthermore, the gate line 120 is formed on the surface of the silicon wafer 110 ; the gate line 120 is in a structure of a core covered by a shell; the core includes a silver-copper paste layer 130 , and the shell is a pure silver paste layer 140 .

[0043] Furthermore, in some embodiments of the present application, the core of the gate line in the above-mentioned structure of a shell covering a core contacts the surface of the silicon wafer, and the shell completely covers the exposed surface of the core.

[0044] Furthermore, in some embodiments of the present application, the shell contacts the surface of the silicon wafer and covers the entire core.

[0045] The photovoltaic cell 100 provided in the embodiment of the present application has a grid line 120 in a shell-encased core structure, with a silver-copper paste layer 130 as the grid line core, as the main body of the entire grid line transmitting current, which not only effectively reduces the consumption of silver paste and reduces costs, but also does not affect the electrical performance; the outer shell of the pure silver paste layer 140 is coated on the outside of the silver-copper paste layer 130, which reduces the direct contact resistance between the grid line and the welding strip and enhances the conductivity. In addition, the outermost layer is wrapped with a pure silver paste layer, which can reduce the oxidation of copper and increase the reliability of the battery.

[0046] It should be noted that the above-mentioned silver-copper paste layer 130 can be obtained by printing and curing a silver-copper paste composite paste commonly used in the art.

[0047] In some embodiments of the present application, reference Figure 1 ,exist Figure 1 In the embodiment, the entire gate line is in a shell-enclosing core structure. The outermost layer of the gate line is a pure silver paste layer 140. Part of the pure silver paste layer 140 is printed on the silicon wafer 110, on which is a silver-copper paste layer 130, and the silver-copper paste layer 130 is further enclosed by the pure silver paste layer 140, forming a complete encapsulation of the silver-copper paste layer 130. This gate line in a shell-enclosing core structure uses the core silver-copper paste as the main body for transmitting current, which can effectively reduce the silver content while ensuring a low contact resistance, and forms a good protection effect for the silver-copper paste to prevent copper oxidation.

[0048] Furthermore, in some embodiments of the present application, the core of the gate line in the structure of a shell covering a core contacts the surface of the silicon wafer 110, and the shell completely covers the exposed surface of the core.

[0049] In some embodiments of the present application, reference Figure 2 ,exist Figure 2 In the embodiment, the entire gate line is in a shell-enclosing core structure. The silver-copper paste layer 130 is printed on the silicon wafer 110, and the silver-copper paste layer 130, as the core of the gate line, contacts the surface of the silicon wafer 110. Figure 2 In the embodiment, the outermost layer of the gate line is a pure silver paste layer 140. The entire gate line presents a structure in which the pure silver paste envelops the silver-copper paste. This gate line with a shell-enveloping core structure uses the core silver-copper paste as the main body for transmitting current, which can effectively reduce the silver content while ensuring a low contact resistance, forming a good protection effect for the silver-copper paste, reducing copper oxidation, and increasing the reliability of the battery.

[0050] Further, in some embodiments of the present application, reference is made to Figure 2 When the core contacts the surface of the silicon wafer, the core further includes a TCO conductive layer 150 , and the TCO conductive layer 150 covers the silver-copper paste layer 130 .

[0051] By providing the TCO conductive layer 150 as the core of the gate line and covering the silver-copper paste layer 130 , the contact resistance can be further reduced due to its excellent conductivity.

[0052] Please continue to refer to Figure 2 , the above Figure 2 In the illustrated embodiment, the entire gate line presents a structure in which pure silver paste encapsulates silver-copper paste. This gate line with a shell-encapsulated core structure uses the core silver-copper paste as the main body for transmitting current, which can effectively reduce the silver content while ensuring low contact resistance. The TCO conductive layer 150 covers the silver-copper paste layer 130, and its excellent conductivity can further reduce the contact resistance. The pure silver paste layer of the shell has a good protective effect on the copper paste, reduces copper oxidation, and can increase the reliability of the battery.

[0053] Further, in some embodiments of the present application, the height of the silver-copper paste layer 130 is greater than the height of the TCO conductive layer 150 .

[0054] The higher silver-copper paste layer 130 can make the bulk resistivity of the entire gate line 120 smaller, reduce the absorption and blocking of light by the gate line, and serve as the main body of the entire gate line 120 to transmit current, thereby improving the transmission performance.

[0055] Further, in some embodiments of the present application, when the housing contacts the surface of the silicon wafer, the pure silver paste layer 140 includes a first pure silver paste layer 141 and a second pure silver paste layer 142; the first pure silver paste layer 141 is formed on the surface of the silicon wafer 110, and the silver-copper paste layer 130 is formed on the surface of the first pure silver paste layer 141. The second pure silver paste layer 142 is formed on the surface of the silver-copper paste layer 130.

[0056] Furthermore, the width of the first pure silver paste layer 141 is greater than the width of the silver-copper paste layer 130 .

[0057] By setting the width of the first pure silver paste layer 141 to be greater than the width of the silver-copper paste layer 130 , the contact area can be increased and the contact resistance can be reduced.

[0058] By providing the first pure silver paste layer 141 , a solid layer can also be formed on the silicon wafer, making it convenient to subsequently print other pastes thereon.

[0059] In some embodiments of the present application, the height of the silver-copper paste layer 130 is greater than the height of the pure silver paste layer 140 .

[0060] By setting the height of the silver-copper paste layer 130 to be greater than the height of the pure silver paste layer 140, the entire gate line has a lower overall height when the silver-copper paste layer 130 is used as the main body, which can reduce the resistivity of the gate line and reduce the absorption and blocking of light by the gate line.

[0061] In some embodiments of the present application, the height of the silver-copper paste layer is 15 μm-20 μm.

[0062] Further, in some embodiments of the present application, the height of the silver-copper paste layer is 16 μm-19 μm. Further optionally, in some embodiments of the present application, the height of the silver-copper paste layer is 17 μm-18 μm.

[0063] Exemplarily, the height of the silver-copper paste layer is 16 μm, 17 μm, 18 μm or 19 μm.

[0064] Further, the width of the silver-copper paste layer is 35μm-44μm; further optionally, the width of the silver-copper paste layer is 36μm-43μm; further optionally, the width of the silver-copper paste layer is 37μm-42μm; illustratively, the width of the silver-copper paste layer is 38μm, 39μm, 40μm, 41μm, 42μm or 43μm.

[0065] Further, in some embodiments of the present application, the height of the above-mentioned pure silver paste layer 140 is 8 μm-12 μm. Further optionally, the height of the above-mentioned pure silver paste layer 140 is 9 μm-11 μm. Exemplarily, the height of the above-mentioned pure silver paste layer 140 is 9 μm, 10 μm or 11 μm.

[0066] It should be noted that, in some embodiments of the present application, the height of the above-mentioned first pure silver paste layer 141 is 8μm-12μm. The height of the second pure silver paste layer 142 is also in the range of 8μm-12μm. In some embodiments, the height of the above-mentioned first pure silver paste layer 141 may be the same as or different from the height of the second pure silver paste layer 142. Exemplarily, in some embodiments of the present application, the height of the above-mentioned first pure silver paste layer 141 may be 9μm, and the height of the second pure silver paste layer 142 may be 10μm; or in some embodiments of the present application, the height of the above-mentioned first pure silver paste layer 141 may be 11μm, and the height of the second pure silver paste layer 142 may be 11μm.

[0067] Further, in some embodiments of the present application, the width of the above-mentioned pure silver paste layer is 45μm-55μm. Further optionally, the width of the above-mentioned pure silver paste layer is 46μm-54μm. Exemplarily, the width of the above-mentioned pure silver paste layer is 47μm, 48μm, 49μm, 50μm, 51μm, 52μm, 53μm or 54μm.

[0068] It should be noted that, in some embodiments of the present application, the width of the first pure silver paste layer 141 is 45μm-55μm. The width of the second pure silver paste layer 142 is 46μm-54μm. In some embodiments, the height of the first pure silver paste layer 141 may be the same as or different from the height of the second pure silver paste layer 142. Exemplarily, in some embodiments of the present application, the width of the first pure silver paste layer 141 may be 47μm, and the width of the second pure silver paste layer 142 may be 48μm; or in some embodiments of the present application, the width of the first pure silver paste layer 141 may be 50μm, and the width of the second pure silver paste layer 142 may be 51μm.

[0069] Some embodiments of the present application provide a method for preparing a photovoltaic cell, preparing a grid line with a shell-encapsulated core structure on the surface of a silicon wafer; the core includes a silver-copper paste; and the shell is a pure silver paste.

[0070] In some embodiments of the present application, preparing the gate line includes: printing a core paste on a surface of a silicon wafer, and after curing, printing a shell paste on the surface of the core paste to completely cover the core paste.

[0071] In some embodiments of the present application, part of the shell slurry is printed on the surface of the silicon wafer. After curing, the core slurry is printed on the surface of part of the shell slurry. After curing, the remaining shell slurry is printed on the surface of the core slurry to completely cover the core slurry.

[0072] It should be noted that the preparation methods of the photovoltaic cell in other steps are the same as conventional methods in the art.

[0073] It should also be noted that the method for preparing the photovoltaic cell grid line is applicable to both the front and back sides of the silicon wafer, and can be selected according to actual needs.

[0074] Further, in some embodiments of the present application, when the core contacts the surface of the silicon wafer, the method further comprises the step of printing a TCO conductive layer;

[0075] The step of printing the TCO conductive layer is after the step of printing the silver-copper paste and before the step of printing the pure silver paste; the step of printing the TCO conductive layer includes:

[0076] The TCO conductive layer is printed on the surface of the silver-copper paste layer, and the TCO conductive layer completely covers the silver-copper paste layer.

[0077] Furthermore, in some embodiments of the present application, when the shell contacts the surface of the silicon wafer, a portion of pure silver paste is printed on the surface of the silicon wafer. After curing, silver-copper paste is printed on its surface so that its width is smaller than the width of the portion of pure silver paste, and then the remaining pure silver paste is printed so that it completely covers the silver-copper paste.

[0078] Further, in some embodiments of the present application, the wet weight of the silver-copper slurry is greater than the wet weight of the shell slurry.

[0079] In some embodiments of the present application, the preparation method of a photovoltaic cell includes the following steps: loading, back electrode printing, drying, back field printing, drying, positive electrode printing (pure silver paste), drying, positive electrode printing (silver-copper paste), drying, positive electrode printing (pure silver paste), curing, light injection, and testing and sorting.

[0080] The following is an exemplary description using the positive electrode grid lines, but the same method can also be used for the back electrode grid lines.

[0081] In some embodiments of the present application, Figure 1 The steps to achieve this are as follows: first, print a layer of pure Ag paste with a height of about 10um and a width of about 50um on the surface of the silicon wafer. Compared with the conventional ones, the width is larger and the thickness is smaller. The purpose is to increase the contact area and reduce the contact resistance. The thin thickness has little effect on light absorption. This method can be achieved by adjusting the printing table parameters and the screen, and then drying the layer of paste at 200°C. After the first layer is dried, the pure Ag paste printed on the surface will be relatively strong and not easy to deform, which is convenient for the subsequent printing of paste on this basis. The second step is to continue printing silver-copper paste on the first layer of formed paste. By adjusting the screen parameters, the grid line after printing with silver-copper paste can achieve a width of about 40um and a height of about 20um. The purpose of setting the height and width of the above grid lines is to reduce the body resistivity of the grid lines. Making the height of the grid lines as small as possible can reduce the absorption and blocking of light by the grid lines. After drying, the silver-copper paste becomes the second layer of grid lines. The second layer of grid lines is the main body of the entire grid line transmission current, that is, the "core" of the grid lines. Therefore, the wet weight of the second layer of grid lines is required to be greater than the first and third layers. The specific wet weight data is affected by the different slurry components used and needs to be determined according to actual conditions. The third step is to continue printing pure Ag paste on the second layer of formed silver-copper grid lines. The third layer does not explicitly limit the specific printing line width and line height, as long as the effect of wrapping the second layer of silver-copper grid lines is achieved. After the third layer is printed, you can wait for a while before curing. The purpose is to make the third layer of pure Ag paste collapse downward under the action of gravity to form a complete wrapping of the second layer of grid lines. The specific waiting time is affected by the paste and the screen, and needs to be determined according to the specific on-site conditions. After the third layer is printed, the overall composite grid line is cured at high temperature.

[0082] It should be noted that the above line height and line width are not absolute. Since the actual screen and slurry used may vary, the dimensions can be adjusted up or down to achieve the best efficiency according to the actual situation.

[0083] Furthermore, as to how to achieve perfect overlap of multiple layers of grid lines front and back, the mature mark point positioning method on the current PERC battery can be used to locate the position of the grid lines, which can basically ensure that the grid lines printed front and back will not be offset.

[0084] It should be noted that the above-mentioned preparation method is applicable to heterojunction cells, PERC cells, TOPCON cells, etc.

[0085] For heterojunction cells, the high cost of silver paste is caused by the fact that amorphous silicon limits the process temperature, resulting in a poor ohmic contact between the gate line and TCO. Currently, the common practice is to add more Ag to the paste to maintain the low resistivity of the gate line and the low contact resistance with the TCO, but this practice greatly increases the production cost of silver paste and also limits the large-scale production of heterojunction cells.

[0086] The preparation method of the present application is particularly suitable for reducing the amount of silver paste used in heterojunction batteries and maintaining low contact resistance.

[0087] The following is a further explanation of heterojunction batteries:

[0088] In some embodiments of the present application, Figure 2 The steps of implementation are as follows: the preparation method of the heterojunction battery includes: the first step, printing a silver-copper paste layer on the surface of the silicon wafer, the gate line after the silver-copper paste is printed to achieve a width of about 40um and a height of about 20um. The purpose of setting the height and width of the above gate line is to reduce the body resistivity of the gate line. The gate line height is as small as possible to reduce the absorption and blocking of light by the gate line. After drying, the silver-copper paste serves as the main body of the entire gate line transmission current, that is, the "core" of the gate line. The second step is to plate a TCO conductive layer on the solidified silver-copper paste layer, and the height of the TCO conductive layer is less than the height of the silver-copper paste layer. Generally speaking, the TCO conductive layer will only cover a very thin layer on the surface of the gate line, because the thickness of the TCO is only tens of nanometers, and the gate line height is micron level. It should also be noted that the preparation process of the above-mentioned TCO conductive layer can adopt the currently commonly used preparation process of the TCO conductive layer. The third step is to print another layer of pure Ag paste on the TCO conductive layer, and the thickness of the pure Ag paste is less than the height of the silver-copper paste, and the silver-copper gate line can be covered.

[0089] The excellent conductivity of the TCO conductive layer in the heterojunction battery makes the contact area between the silver-copper paste and the TCO conductive layer relatively larger and the contact resistance smaller.

[0090] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A photovoltaic cell, characterized in that: include: Silicon wafer; A gate line formed on the surface of the silicon wafer; The grid line is in a structure of a shell covering a core; the core comprises a silver-copper paste layer, and the shell is a pure silver paste layer; When the core contacts the surface of the silicon wafer, the shell completely covers the exposed surface of the core; the core further comprises a TCO conductive layer, and the TCO conductive layer covers the silver-copper paste layer; the width of the TCO conductive layer is greater than the width of the silver-copper paste layer, and the height of the silver-copper paste layer is greater than the height of the TCO conductive layer; When the shell contacts the surface of the silicon wafer and covers the entire core, the pure silver paste layer includes a first pure silver paste layer and a second pure silver paste layer; the first pure silver paste layer is formed on the surface of the silicon wafer, and the silver-copper paste layer is formed on the surface of the first pure silver paste layer; The width of the first pure silver paste layer is greater than the width of the silver-copper paste layer; The preparation method of the photovoltaic cell comprises: printing part of the shell slurry on the surface of the silicon wafer, printing the core slurry on the surface of part of the shell slurry after curing, and printing the remaining shell slurry on the surface of the core slurry after curing to completely cover the core slurry.

2. The photovoltaic cell according to claim 1, characterized in that: The height of the silver-copper paste layer is greater than the height of the pure silver paste layer.

3. The photovoltaic cell according to claim 1 or 2, characterized in that: The height of the silver-copper slurry layer is 15 μm-20 μm.

4. The photovoltaic cell according to claim 1 or 2, characterized in that: The width of the silver-copper slurry layer is 35 μm-44 μm.

5. The photovoltaic cell according to claim 1 or 2, characterized in that: The height of the pure silver paste layer is 8 μm-12 μm.

6. The photovoltaic cell according to claim 1 or 2, characterized in that: The width of the pure silver paste layer is 45 μm-55 μm.

7. A method for preparing a photovoltaic cell, characterized in that: A gate line having a shell-encapsulated core structure is prepared on the surface of a silicon wafer; the core comprises silver-copper paste; and the shell is pure silver paste; The preparation of the gate line includes: printing the core paste on the surface of the silicon wafer, and after curing, printing the shell paste on the surface of the core paste so that the core paste is completely covered; the method also includes the step of printing the TCO conductive layer; the step of printing the TCO conductive layer is after the step of printing the silver-copper paste and before the step of printing the pure silver paste; the step of printing the TCO conductive layer includes: printing the TCO conductive layer on the surface of the silver-copper paste layer, and making the TCO conductive layer completely cover the silver-copper paste layer; Alternatively, preparing the gate line includes: printing part of the shell paste on the surface of the silicon wafer, and after curing, printing the core paste on the surface of the part of the shell paste, and after curing, printing the remaining shell paste on the surface of the core paste so that it completely covers the core paste; when the shell contacts the surface of the silicon wafer, printing part of the pure silver paste on the surface of the silicon wafer, and after curing, printing the silver-copper paste on its surface so that its width is smaller than the width of the part of the pure silver paste, and then printing the remaining pure silver paste so that it completely covers the silver-copper paste.

8. The method for preparing a photovoltaic cell according to claim 7, characterized in that: include: The wet weight of the silver-copper paste is greater than the wet weight of the shell paste.

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