Semiconductor structure and method for forming the same

Abstract

The present invention relates to a semiconductor structure and a method for forming the same. The semiconductor structure comprises: a substrate, including a substrate and a dielectric layer, wherein the substrate has a front side and a back side arranged opposite to each other, and the dielectric layer is formed on the front side; a connecting hole, which penetrates the substrate and extends to the dielectric layer; a connecting structure, which is located in the connecting hole and is spaced apart from the inner wall of the connecting hole; an insulating structure, which is located between the connecting structure and the inner wall of the connecting hole; wherein the insulating structure, the inner wall of the connecting hole and the connecting structure are surrounded to form an air gap. The present application can effectively improve the heat dissipation performance of the structure.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a semiconductor structure and a method for forming the same. Background Art

[0002] Through Silicon Via (TSV) technology is a technical solution for interconnecting stacked chips in three-dimensional integrated circuits. By effectively stacking chips in three dimensions, TSV technology has become one of the most eye-catching technologies in current electronic packaging technology, as it can produce electronic devices with more complex structures, stronger performance and higher cost efficiency.

[0003] However, existing TSV structures have major problems in terms of heat dissipation capability and impact on peripheral devices. Summary of the invention

[0004] Based on this, it is necessary to provide a semiconductor structure with high reliability and a method for forming the same.

[0005] A semiconductor structure, comprising:

[0006] The substrate comprises a substrate and a dielectric layer, wherein the substrate has a front side and a back side which are arranged opposite to each other, and the dielectric layer is formed on the front side;

[0007] A communication hole, penetrating the substrate and extending to the dielectric layer;

[0008] A communication structure, located in the communication hole and spaced apart from the inner wall of the communication hole;

[0009] An insulating structure, located between the connecting structure and the inner wall of the connecting hole;

[0010] The insulating structure, the inner wall of the connecting hole and the connecting structure are arranged to form an air gap.

[0011] In one embodiment, the air gap penetrates the interface between the substrate and the dielectric layer.

[0012] In one of the embodiments, a width of a portion of the air gap opposite to the dielectric layer is smaller than a width of a portion of the air gap opposite to the substrate.

[0013] In one embodiment, the connecting structure includes a first conductive structure and a second conductive structure connected to each other, the insulating structure includes a first insulating layer and a second insulating layer, the first insulating layer is located between the inner wall of the connecting hole and the first conductive structure, the second insulating layer is located between the inner wall of the connecting hole and the second conductive structure, and the first insulating layer, the second insulating layer, the inner wall of the connecting hole and the connecting structure are surrounded to form an air gap;

[0014] The second insulating layer seals the air gap, or the second insulating layer and the second conductive structure seal the air gap together.

[0015] In one embodiment, the first conductive structure includes a first barrier layer connected to the first insulating layer, and the second conductive structure includes a second barrier layer connected to the second insulating layer and the first barrier layer.

[0016] In one embodiment, the second conductive structure further includes a second conductive layer filling the connecting hole, the second conductive layer is connected to the second barrier layer, and is separated from the first conductive structure by the second barrier layer.

[0017] In one embodiment, the second conductive structure further includes a second conductive layer filling the connecting hole, and the second conductive layer connects the second barrier layer and the first conductive structure.

[0018] In one embodiment, the thickness of the second barrier layer is greater than the thickness of the first barrier layer.

[0019] A method for forming a semiconductor structure, comprising:

[0020] Providing a substrate, the substrate comprising a substrate and a dielectric layer, the substrate having a front side and a back side arranged opposite to each other, the dielectric layer being formed on the front side;

[0021] forming a connecting hole in the substrate, wherein the connecting hole penetrates the substrate and extends to the dielectric layer;

[0022] A communication structure is formed in the communication hole, wherein the communication structure is spaced apart from the inner wall of the communication hole;

[0023] forming an insulating structure between the connecting structure and the inner wall of the connecting hole;

[0024] The insulating structure, the inner wall of the connecting hole and the connecting structure are arranged to form an air gap.

[0025] In one embodiment, forming the connecting hole in the substrate includes:

[0026] The base is etched from the back side of the substrate to form a communication hole.

[0027] In one embodiment, the air gap penetrates the interface between the substrate and the dielectric layer.

[0028] In one of the embodiments, a width of a portion of the air gap opposite to the dielectric layer is smaller than a width of a portion of the air gap opposite to the substrate.

[0029] In one embodiment,

[0030] The forming of a communication structure in the communication hole comprises:

[0031] A first conductive structure is formed in the communicating hole, wherein the first conductive structure is spaced apart from an inner wall of the communicating hole, and a distance exists between the first conductive structure and an opening of the communicating hole;

[0032] The forming of the insulating structure between the connecting structure and the inner wall of the connecting hole comprises:

[0033] forming a first insulating layer between the inner wall of the communicating hole and the first conductive structure, wherein the distance between the surface of the first insulating layer and the opening of the communicating hole is greater than the distance between the surface of the first conductive structure and the opening of the communicating hole;

[0034] A second insulating layer is formed on the inner wall of the communicating hole, the first insulating layer and the second insulating layer constitute the insulating structure, and the first insulating layer, the second insulating layer, the inner wall of the communicating hole and the communicating structure are surrounded to form an air gap;

[0035] The forming of the communication structure in the communication hole further comprises:

[0036] forming a second conductive structure on the surface of the second insulating layer and the surface of the first conductive structure, wherein the first conductive structure and the second conductive structure constitute the connecting structure;

[0037] The second insulating layer seals the air gap, or the second insulating layer and the second conductive structure seal the air gap together.

[0038] In one embodiment,

[0039] The insulating structure formed between the connecting structure and the inner wall of the connecting hole further comprises:

[0040] Before forming the first conductive structure in the communicating hole, forming a primary insulating layer on the inner wall of the communicating hole, the primary insulating layer comprising a first side wall portion located on the side wall of the communicating hole;

[0041] The forming of the first conductive structure in the connecting hole comprises:

[0042] forming a primary barrier layer on the surface of the primary insulating layer;

[0043] forming the primary conductive layer on the surface of the primary barrier layer;

[0044] removing a portion of the primary conductive layer and the primary barrier layer to expose a portion of the first sidewall portion, wherein the remaining primary barrier layer constitutes a first barrier layer, the remaining primary conductive layer constitutes the first conductive layer, and the first barrier layer and the first conductive layer constitute a first conductive structure;

[0045] The forming of a first insulating layer between the inner wall of the connecting hole and the first conductive structure comprises:

[0046] A portion of the primary insulating layer is removed, and the remaining primary insulating layer constitutes a first insulating layer.

[0047] In one embodiment, forming the second conductive structure on the surface of the second insulating layer and the surface of the first conductive structure includes:

[0048] forming a second barrier layer on the surface of the second insulating layer, the surface of the first barrier layer and the surface of the first conductive layer;

[0049] The second conductive layer is formed, wherein the second conductive layer is connected to the second barrier layer.

[0050] In one embodiment, the second barrier base layer serves as a second barrier layer, and the forming of the second conductive layer includes:

[0051] The second conductive layer is formed on the surface of the second barrier layer, and the second conductive layer and the second barrier layer constitute the second conductive structure.

[0052] In one embodiment, forming the second conductive layer comprises:

[0053] removing at least a portion of the second barrier layer on the surface of the first conductive structure;

[0054] A second conductive layer is formed on the surface of the second barrier layer and the exposed surface of the first conductive structure. The second conductive layer and the second barrier layer constitute the second conductive structure.

[0055] In one embodiment, the thickness of the second barrier layer is greater than the thickness of the first barrier layer.

[0056] A stacked structure is formed by processing the semiconductor structure described in any one of the above items.

[0057] The semiconductor structure and its formation method, since there is an air gap between the connecting structure and the inner wall of the connecting hole, and since air has poor thermal conductivity, can effectively prevent the heat generated by the connecting structure from diffusing to the surrounding semiconductor devices or dielectric layers, thereby effectively improving the heat dissipation performance.

[0058] Moreover, the air gap can also effectively isolate the interconnecting structure from the substrate and / or dielectric layer around it, thereby effectively preventing the substrate and / or dielectric layer from stress deformation due to thermal expansion of the interconnecting structure, thereby effectively preventing the substrate and / or dielectric layer from generating interface cracks. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0060] Figure 1 is a flow chart of a method for forming a semiconductor structure provided in one embodiment;

[0061] Figure 2 A flowchart of a method for forming a semiconductor structure provided in another embodiment;

[0062] Figure 3 is a flow chart of a method for forming a semiconductor structure provided in yet another embodiment;

[0063] Figure 4-Figure 12 It is a structural schematic diagram of the semiconductor structure during the formation process;

[0064] Figure 13-Figure 16 Schematic diagrams of semiconductor structures in different embodiments.

[0065] Description of reference numerals:

[0066] Description of reference numerals: 100-substrate, 110-substrate, 110a-front side, 110b-back side, 120-dielectric layer, 100a-connecting hole, 100b-air gap, 200-connecting structure, 210-first conductive structure, 211-first blocking layer, 2111-primary blocking layer, 212-first conductive layer, 2121-primary conductive layer, 220-second conductive structure, 221-second blocking layer, 222-second conductive layer, 300-insulating structure, 310-first insulating layer, 311-primary insulating layer, 3111-first sidewall portion, 320-second insulating layer, 400-shallow trench isolation structure DETAILED DESCRIPTION

[0067] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0068] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0069] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or part discussed below can be represented as a second element, component, region, layer or part.

[0070] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0071] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0072] Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention, and variations from the illustrated shapes as a result, for example, of manufacturing techniques and / or tolerances are to be expected. Thus, embodiments of the invention should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing techniques.

[0073] In one embodiment, see Figure 1 , providing a method for forming a semiconductor structure, comprising:

[0074] Step S100, providing a substrate 100, the substrate 100 includes a substrate 110 and a dielectric layer 120, the substrate 110 has a front side 110a and a back side 110b opposite to each other, and the dielectric layer 120 is formed on the front side 110a, see Figure 4 ;

[0075] Step S200, forming a connecting hole 100a in the substrate 100, the connecting hole 100a penetrates the substrate 110 and extends to the dielectric layer 120, see Figure 5 ;

[0076] Step S300, forming a connecting structure 200 in the connecting hole 100a, the connecting structure 200 is spaced apart from the inner wall of the connecting hole 100a, see Fig.10 as well as Fig.14 ;

[0077] Step S400, forming an insulating structure 300 between the connecting structure 200 and the inner wall of the connecting hole 100a, see Fig.11 as well as Fig.14 .

[0078] The insulating structure 300, the inner wall of the connecting hole 100a and the connecting structure 200 are arranged to form an air gap, see Fig.14 .

[0079] In step S100, the substrate 110 may include but is not limited to a silicon substrate. A shallow trench isolation structure 400 may be formed on the side of the substrate 110 close to the dielectric layer 120. The shallow trench isolation structure 400 isolates the substrate 110 into multiple active regions. The active regions are used to form various semiconductor devices.

[0080] The dielectric layer 120 may include but is not limited to an oxide dielectric layer (such as silicon dioxide, etc.) The dielectric layer 120 may have an interconnection via structure and a metal layer electrically connected to the active region, thereby leading out the signal of the semiconductor device or providing an external signal to the semiconductor device.

[0081] In step S200, the connecting holes 100a are used to form connecting structures 200. When multiple chips formed by semiconductor structures are stacked, the corresponding connecting holes 100a of each chip are aligned, so that the connecting structures 200 in each connecting hole 100a are electrically connected, thereby realizing interconnection between each chip.

[0082] In step S300, the interconnection structure 200 is a structure that can be electrically connected, and may include multiple film layers. Of course, the interconnection structure 200 may also include only one film layer, and the present application has no limitation on this.

[0083] When the interconnection structure 200 is used to electrically connect various chips, it will generate a lot of heat, which may affect the chip performance.

[0084] At the same time, after the interconnecting structure 200 generates heat, it is also easy to expand and contract due to thermal stress. If it contacts the substrate 110 and / or the dielectric layer 120 through the insulating structure, it may cause stress deformation of the substrate 110 and / or the dielectric layer 120, thereby causing cracks at the contact interface, and may even affect the performance of the semiconductor device in the active area.

[0085] In step S400, the insulating structure 300 is located between the connecting structure 200 and the inner wall of the connecting hole 100a, thereby achieving electrical isolation between the connecting structure 200 and the substrate 110. The insulating structure 300 may be made of silicon dioxide, etc. The insulating structure 300 may be the same as or different from the dielectric layer 120.

[0086] In this embodiment, the insulating structure 300, the inner wall of the connecting hole 100a and the connecting structure 200 form an air gap 100b. The air gap 100b has the same insulating property as the insulating structure 300, and can effectively achieve electrical isolation between the connecting structure 200 and the substrate 110 together with the insulating structure 300.

[0087] At the same time, since there is an air gap 100b between the connecting structure 200 and the inner wall of the connecting hole 100a, the air has poor thermal conductivity, which can effectively prevent the heat generated by the connecting structure 200 from diffusing to the surrounding semiconductor devices or dielectric layers, thereby effectively improving the heat dissipation performance.

[0088] Moreover, at this time, the air gap 100b can also effectively isolate the connecting structure 200 from the surrounding substrate 110 and / or dielectric layer 120, thereby effectively preventing the substrate 110 and / or dielectric layer 120 from stress deformation due to the thermal expansion of the connecting structure 200, and further effectively preventing the substrate 110 and / or dielectric layer 120 from generating interface cracks.

[0089] In one embodiment, see Figure 5 , step S200 includes: etching the base 100 from the back side 110 b of the substrate 110 to form a connecting hole 100 a.

[0090] As an example, the substrate 110 and the dielectric layer 120 may be etched in sequence from the back side 110b of the substrate 110 by dry etching to form the connecting hole 100a. The depth of the connecting hole 100 may be 20 μm-150 μm, and the depth of the connecting hole 100 extending into the dielectric layer 120 may be 0.5 μm-1 μm. The diameter of the connecting hole 100 may be 3 μm-50 μm. The aspect ratio (i.e., the ratio of depth to diameter) of the connecting hole 100 may be 0.4-50.

[0091] Since the back side 110b of the substrate 110 is far away from the semiconductor devices formed in the active area and the circuit structures connecting the semiconductor devices, this embodiment can effectively prevent the semiconductor devices formed in the active area and the related circuit structures from being damaged when forming the connecting hole 100a.

[0092] In one embodiment, see Fig.14 The air gap 100 b formed in step S400 penetrates the interface between the substrate 110 and the dielectric layer 120 .

[0093] The interface between the substrate 110 and the dielectric layer 120 is easily affected by the thermal expansion of the connecting structure 200 and thus generates stress deformation, thereby generating interface cracks.

[0094] In this embodiment, the air gap 100b penetrates the interface between the substrate 110 and the dielectric layer 120, so that the air gap 100b isolates the interface between the substrate 110 and the dielectric layer 120 from the connecting structure 200, thereby effectively preventing interface cracks from being generated at the interface between the two.

[0095] Meanwhile, semiconductor devices are densely distributed around the interface between the substrate 110 and the dielectric layer 120 , and the semiconductor device structure usually runs through both sides of the interface between the substrate 110 and the dielectric layer 120 .

[0096] The air gap 100b penetrates the interface between the substrate 110 and the dielectric layer 120, so that the air gap 100b isolates the connection structure 200 from the substrate 110 and the dielectric layer 120 on both sides of the interface. Therefore, this embodiment can also effectively provide heat insulation protection for semiconductor devices around the air gap 100b, and can prevent the semiconductor devices around the air gap 100b from being affected in performance due to stress deformation of the substrate 110 and / or the dielectric layer 120.

[0097] Furthermore, since the dielectric constant of air is relatively small, the formation of the air gap 100b can effectively prevent the formation of parasitic capacitance between the connecting structure 200, the insulating structure 300 and the semiconductor substrate 110. Therefore, this embodiment can effectively prevent the signal on the connecting structure 200 from being coupled to the substrate 110 or surrounding semiconductor devices or other connecting structures 200, thereby causing related signal distortion or leakage current.

[0098] In one embodiment, the width of a portion of the air gap 100 b opposite to the dielectric layer 120 is smaller than the width of a portion of the air gap 100 b opposite to the substrate 110 .

[0099] The dielectric layer 120 is a film layer formed on the substrate 110, and its thickness is much smaller than that of the substrate 110. Therefore, in this embodiment, the width of the portion of the air gap 100b opposite to the dielectric layer 120 is smaller, thereby effectively preventing the air gap 100b from causing the dielectric layer 120 to be unstable.

[0100] Moreover, the heat generated in the dielectric layer 120 is relatively large. At this time, the width of the air gap 100b opposite to the substrate 110 is relatively large, which will cause the heat to flow to the position with a larger gap, thereby being more conducive to heat dissipation and preventing the influence on the surrounding devices.

[0101] In one embodiment, see Figure 2 , step S300 includes:

[0102] Step S310, forming a first conductive structure 210 in the communicating hole 100a, wherein the first conductive structure 210 is spaced apart from the inner wall of the communicating hole 100a, and a distance exists between the first conductive structure 210 and the opening of the communicating hole 100a, see Fig. 9 ;

[0103] Step S400 includes:

[0104] Step S420, forming a first insulating layer 310 between the inner wall of the connecting hole 100a and the first conductive structure 210, the distance H1 between the surface of the first insulating layer 310 and the opening of the connecting hole 100a is greater than the distance H2 between the surface of the first conductive structure 210 and the opening of the connecting hole 100a, see Fig.10 ;

[0105] Step S430, forming a second insulating layer 320 on the inner wall of the connecting hole 100a, the first insulating layer 310 and the second insulating layer 320 constitute an insulating structure 300, and the first insulating layer 310, the second insulating layer 320 and the inner wall of the connecting hole 100a and the connecting structure 200 are surrounded to form an air gap, see Fig.11 .

[0106] Step S300 also includes:

[0107] Step S320, forming a second conductive structure 220 on the surface of the second insulating layer 320 and the surface of the first conductive structure 210, the first conductive structure 210 and the second conductive structure 220 constitute a connecting structure 200, see Fig.14 .

[0108] The second insulating layer 320 closes the air gap 100b (see Fig.16 ), or the second insulating layer 320 and the second conductive structure 220 together close the air gap 100b (see Fig.14 ).

[0109] In this embodiment, the connecting structure 200 is divided into a first conductive structure 210 and a second conductive structure 220, and the insulating structure 300 is divided into a first insulating layer 310 and a second insulating layer 320, and the first conductive structure 210 is formed first, and then the first insulating layer 310, the second insulating layer 320 and the second conductive structure 220 are formed in sequence, so that the gap 100b is easier to process and form.

[0110] In one embodiment, specifically, see Figure 3 , step S400 further includes:

[0111] Step S410, forming a primary insulating layer 311 on the inner wall of the communicating hole 100a, the primary insulating layer 311 includes a first side wall portion 3111 located on the side wall of the communicating hole 100a, see Figure 6 .

[0112] Step S410 precedes step S310.

[0113] At this time, step S310 includes:

[0114] Step S311, forming a primary barrier layer 2111 on the surface of the primary insulating layer 311, see Figure 7 ;

[0115] Step S312, forming a primary conductive layer 2121 on the surface of the primary barrier layer 2111, see Figure 8 ;

[0116] Step S313, removing a portion of the primary conductive layer 2121 and the primary barrier layer 2111 to expose a portion of the first sidewall portion 3111, the remaining primary barrier layer 2111 constitutes the first barrier layer 211, the remaining primary conductive layer 2121 constitutes the first conductive layer 212, the first barrier layer 211 and the first conductive layer 212 constitute the first conductive structure 210, see Fig. 9 .

[0117] Then, step S420 includes:

[0118] Step S421, removing part of the primary insulating layer 311, and the remaining primary insulating layer 311 constitutes the first insulating layer 310, see Fig.10 .

[0119] Specifically, after removing part of the primary insulating layer 311, the distance H1 between the surface of the first insulating layer 310 formed by the remaining primary insulating layer 311 and the opening of the connecting hole 100a is greater than the distance H2 between the surface of the first conductive structure 210 and the opening of the connecting hole 100a. Fig.10 In the middle direction, after a portion of the primary insulating layer 311 is removed, the surface of the first insulating layer 310 formed by the remaining primary insulating layer 311 is lower than the surface of the first conductive structure 210 .

[0120] In step S410, the material of the primary insulating layer 311 may be silicon dioxide or the like. Specifically, a silicon dioxide film layer may be deposited on the inner wall of the communication hole 100a by a chemical vapor deposition (CVD) method based on silane (SiH4) or tetraethyl orthosilicate (TEOS) to serve as the primary insulating layer 311. The thickness of the silicon dioxide film layer may be 0.2 μm-2 μm.

[0121] In step S311, the primary barrier layer 2111 may be formed by physical vapor deposition (PVD) method. The primary barrier layer 2111 may be made of tantalum (Ta) and tantalum nitride (TaN), etc., and its thickness may be 0.05 μm-0.1 μm.

[0122] In step S312, the material of the primary conductive layer 2121 can be metal copper (Cu) or the like. Specifically, a copper seed layer can be formed on the surface of the primary barrier layer 2111 by a PVD method. Then, copper is electroplated on the surface of the copper seed layer by electroplating growth, and the copper seed layer and the electroplated copper together constitute the primary conductive layer 2121.

[0123] More specifically, since the subsequent step S313 will further remove part of the primary conductive layer 2121 to form the air gap 100b, the primary conductive layer 2121 grown on the surface of the primary barrier layer 2111 may not fill the connecting hole 100a. As an example, the filling thickness of the central portion of the primary conductive layer 2121 may be 20%-70% of the depth of the connecting hole 100a.

[0124] In step S313, part of the primary barrier layer 2111 and part of the primary conductive layer 2121 covering the first side wall portion 3111 can be removed by a mixed acid solution, so that the first side wall portion 3111 of the primary insulating layer 311 is partially exposed, and the first barrier layer 211 and the first conductive layer 212 are formed at the same time.

[0125] The first barrier layer 211 can effectively prevent the first conductive layer 212 from being affected by stress caused by thermal expansion.

[0126] After the first sidewall portion 3111 of the primary insulating layer 311 is partially exposed, step S420 is performed, so that the first insulating layer 310 having a surface lower than the surface of the first conductive structure 210 can be formed more easily, thereby making it easier to realize the air gap 100b.

[0127] In step S420 , the first sidewall portion 3111 of the primary insulating layer 311 (eg, silicon dioxide film layer) in the connecting hole 100 a may be etched by hydrofluoric acid or dry etching to form a first insulating layer 310 connected to the first barrier layer 211 .

[0128] Step S430 is performed after step S420.

[0129] In step S430, specifically, a second insulating material layer may be formed on the sidewall of the connecting hole 100a and the surface of the first conductive structure 210 by chemical vapor deposition. Then, the second insulating material layer outside the connecting hole 100a and on the surface of the first conductive structure 210 is removed to form a second insulating layer 320.

[0130] The material of the second insulating layer 320 may be the same as that of the first insulating layer 310 , or may be different from that of the first insulating layer 310 , and the present application has no limitation thereto.

[0131] As an example, the thickness of the second insulating layer 320 formed in this step may be greater than the thickness of the first insulating layer 310. At this time, the air gap 100b may be closed by the second insulating layer 320.

[0132] Of course, the thickness of the second insulating layer 320 may also be the same as the thickness of the first insulating layer 310. Alternatively, the thickness of the second insulating layer 320 may also be less than the thickness of the first insulating layer 310. In this case, the air gap 100b may be closed by the second insulating layer 320 and the second conductive structure 220 formed subsequently.

[0133] In one embodiment, step S320 includes:

[0134] Step S321, forming a second barrier layer 2211 on the surface of the second insulating layer 320, the surface of the first barrier layer 211 and the surface of the first conductive layer 212, see Fig.12 ;

[0135] Step S322, forming a second conductive layer 222, the second conductive layer 222 is connected to the second barrier layer 221, see Fig.13 or Fig.14 .

[0136] In step S321, a second barrier layer 2211 may be formed by chemical vapor deposition. The material of the second barrier layer 2211 may be tantalum (Ta) or tantalum nitride (TaN), etc., which may be the same as the first barrier layer 211 or different from the first barrier layer 211, and the present application has no limitation thereto.

[0137] The second barrier layer 221 is formed on the surface of the second insulating layer 320 and connected to the second insulating layer 320 , thereby effectively preventing the stress caused by thermal expansion of the second conductive layer 222 .

[0138] Meanwhile, in this embodiment, after step S430, the surface of the first barrier layer 211 is exposed to the outside and is not covered by the second insulating layer 320. Therefore, the second barrier layer 2211 formed in this step is connected to the first barrier layer 211.

[0139] In step S322 , the material of the second conductive layer 222 may be the same as that of the first conductive layer 212 , or may be different, and the present application has no limitation on this.

[0140] As an example, when the material of the second conductive layer 222 and the material of the first conductive layer 212 are both copper, the formation process thereof can be similar to the formation process of the first conductive layer 212. A copper seed layer can be formed first, and then copper is electroplated on the copper seed layer, and further processed to form the second conductive layer 222.

[0141] In one embodiment, the second barrier layer 2211 serves as the second barrier layer 221 .

[0142] Step S322 includes: forming a second conductive layer 222 on the surface of the second barrier layer 221, wherein the second conductive layer 222 and the second barrier layer 221 constitute a second conductive structure 220, see Fig.13 .

[0143] At this time, the second conductive layer 222 fills up the connecting hole 100 a . Moreover, the second conductive layer 222 is connected to the second barrier layer 221 , and is separated from the first conductive structure 210 by the second barrier layer 221 .

[0144] That is, the second barrier layer 221 is provided between the second conductive layer 222 and the first conductive layer 221. Therefore, the second barrier layer 221 can effectively prevent the second conductive layer 222 and the first conductive layer 221 formed twice from being inconsistent in grain size and the like, and from being affected by thermal stress and causing cracks at the interface in the subsequent annealing process.

[0145] Of course, the form of the second conductive structure 220 may also be different from that of this embodiment.

[0146] In another embodiment, step S322 includes:

[0147] Step S3221 , removing at least a portion of the second barrier layer 2211 on the surface of the first conductive structure 210 ;

[0148] Step S3222, forming a second conductive layer 222 on the surface of the second barrier layer 221 and the exposed surface of the first conductive structure 210, the second conductive layer 222 and the second barrier layer 221 constitute a second conductive structure 220, see Fig.14 or Fig.15 .

[0149] In step S3221 , the second barrier layer 221 covering the surface of the first conductive structure 210 may be completely removed, or the second barrier layer 221 covering the surface of the first conductive structure 210 may be partially removed.

[0150] In step S3222 , the second conductive layer 222 fills the connecting hole and connects the second barrier layer 221 and the first conductive structure 210 .

[0151] In this embodiment, the second conductive layer 222 is in contact with and connected to the first conductive structure 210 (mainly to the first conductive layer 212 of the first conductive structure 210 ), thereby reducing the contact resistance between the second conductive structure 220 and the first conductive structure 210 .

[0152] See also Fig.15When the second barrier layer 221 covering the surface of the first conductive structure 210 is partially removed, the contact resistance can be reduced and the thermal stress between the second conductive layer 222 and the first conductive layer 221 formed twice can be prevented.

[0153] At the same time, if the central portion of the second barrier layer 221 covering the surface of the first conductive structure 210 is removed and the edge portion is retained, the retained edge portion can also help prevent the connection between the second barrier layer 221 and the first barrier layer 211 from affecting the thermal expansion stress of the internal conductive layer structure (including the first conductive layer 212 and the second conductive layer 222) due to poor contact.

[0154] In the above embodiment, the second barrier layer 221 is connected to the first barrier layer 211. Therefore, the second barrier layer 221 and the first barrier layer 211 can jointly suppress the thermal expansion stress of the conductive layer structure (including the first conductive layer 212 and the second conductive layer 222) therein.

[0155] Furthermore, the air gap 100 b may be closed by the second barrier layer 221 , so that the second barrier layer 221 is in good contact with the first barrier layer 211 .

[0156] In one embodiment, the thickness of the second barrier layer 221 is set to be greater than the thickness of the first barrier layer 211. In this case, the second barrier layer 221 and the first barrier layer 211 can be effectively prevented from having a poor contact at the connection point, thereby preventing the second barrier layer 221 from affecting the thermal expansion stress of the conductive layer structure (including the first conductive layer 212 and the second conductive layer 222) therein.

[0157] Of course, the thickness of the second barrier layer 221 may not be greater than the thickness of the first barrier layer 211 , and the present application has no limitation on this.

[0158] It should be understood that although Figures 1 to 3 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figures 1 to 3 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0159] In one embodiment, a semiconductor structure is also provided. Figures 13 to 16, including a substrate 100 , a connecting hole 100 a , a connecting structure 200 and an insulating structure 300 .

[0160] The substrate 100 includes a substrate 110 and a dielectric layer 120. The substrate 110 has a front side 110a and a back side 110b that are arranged opposite to each other. The dielectric layer 120 is formed on the front side 110a. The connecting hole 100a passes through the substrate 110 and extends to the dielectric layer 120. The connecting structure 200 is located in the connecting hole 100a and is spaced apart from the inner wall of the connecting hole 100a. The insulating structure 300 is located between the connecting structure 200 and the inner wall of the connecting hole 100a. The insulating structure 300, the inner wall of the connecting hole 100a and the connecting structure 200 are arranged to form an air gap 100a.

[0161] In this embodiment, the insulating structure 300, the inner wall of the connecting hole 100a and the connecting structure 200 form an air gap 100b. The air gap 100b has the same insulating property as the insulating structure 300, and can effectively achieve electrical isolation between the connecting structure 200 and the substrate 110 together with the insulating structure 300.

[0162] At the same time, since there is an air gap 100b between the connecting structure 200 and the inner wall of the connecting hole 100a, due to the poor thermal conductivity of air, this structure can effectively prevent the heat generated by the connecting structure 200 from diffusing to the surrounding semiconductor devices or dielectric layers, thereby effectively improving the heat dissipation performance.

[0163] Moreover, at this time, the air gap 100b can also effectively isolate the connecting structure 200 from the surrounding substrate 110 and / or dielectric layer 120, thereby effectively preventing the substrate 110 and / or dielectric layer 120 from stress deformation due to the thermal expansion of the connecting structure 200, and further effectively preventing the substrate 110 and / or dielectric layer 120 from generating interface cracks.

[0164] In one embodiment, the air gap 100 a penetrates the interface between the substrate 110 and the dielectric layer 120 .

[0165] In one embodiment, the width of a portion of the air gap 100 b opposite to the dielectric layer 120 is smaller than the width of a portion of the air gap 100 b opposite to the substrate 110 .

[0166] In one embodiment, the connection structure 200 includes a first conductive structure 210 and a second conductive structure 220 connected to each other. The insulation structure 300 includes a first insulation layer 310 and a second insulation layer 320. The first insulation layer 310 is located between the inner wall of the connection hole 100a and the first conductive structure 210. The second insulation layer 320 is located between the inner wall of the connection hole 100a and the second conductive structure 220. The first insulation layer 310, the second insulation layer 320, the inner wall of the connection hole 100a and the connection structure 200 are surrounded to form an air gap.

[0167] The second insulating layer 320 closes the air gap 100b (see Fig.16 ), or the second insulating layer 320 and the second conductive structure 220 together close the air gap 100b (see Figures 13 to 15 ).

[0168] In one embodiment, the first conductive structure 210 includes a first barrier layer 211 . The first barrier layer 211 is connected to the first insulating layer 310 . The second conductive structure 220 includes a second barrier layer 221 . The second barrier layer 221 is connected to the second insulating layer 320 and the first barrier layer 211 .

[0169] In one embodiment, the thickness of the second barrier layer 221 is greater than the thickness of the first barrier layer 211 .

[0170] In one embodiment, see Fig.13 The second conductive structure 220 further includes a second conductive layer 222 filling the connecting hole 100 a . The second conductive layer 222 is connected to the second barrier layer 221 , and is separated from the first conductive structure 210 by the second barrier layer 221 .

[0171] In one embodiment, see Fig.14 or Fig.15 The second conductive structure 220 further includes a second conductive layer 222 filling the connecting hole 100 a , and the second conductive layer 222 connects the second barrier layer 221 and the first conductive structure 210 .

[0172] At this time, there may be no second barrier layer 221 between the first conductive structure 210 and the second conductive layer 222. Fig.14 , and may also have a portion of the second barrier layer 222. For example, the edge of the second conductive layer 222 may also have a second barrier layer 221 between the first conductive structures 210, see Fig.15 .

[0173] For the specific limitations and technical effects of the semiconductor structure, please refer to the limitations on the method for forming the semiconductor structure in the above text, which will not be repeated here.

[0174] Of course, it is understandable that the semiconductor structure of the present application is not limited to being formed by the semiconductor structure forming method in the above embodiment.

[0175] In one embodiment, a stacked structure is further provided, wherein the stacked structure is formed based on any one of the above semiconductor structures.

[0176] Specifically, when forming a stacked structure, the above-mentioned semiconductor structure needs to undergo processing techniques such as etching or planarization to expose the connecting structure 200 in the dielectric layer 120 (not shown), so that when it is stacked with an adjacent semiconductor structure, the connecting structure 200 in the connecting hole 100a can be conductively connected to perform signal transmission.

[0177] More specifically, in some embodiments, when the connecting structure 200 includes the first conductive structure 210 and the second conductive structure 220 , the first conductive layer 212 of the first conductive structure 210 needs to be exposed to perform signal transmission.

[0178] In the description of this specification, the description with reference to the terms "one embodiment", "ideal embodiment", etc. means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0179] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0180] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A semiconductor structure, characterized in that: include: The substrate comprises a substrate and a dielectric layer, wherein the substrate has a front side and a back side which are arranged opposite to each other, and the dielectric layer is formed on the front side; A communication hole, penetrating the substrate and extending to the dielectric layer; A communication structure, located in the communication hole and spaced apart from the inner wall of the communication hole; An insulating structure, located between the connecting structure and the inner wall of the connecting hole; The insulating structure, the inner wall of the connecting hole and the connecting structure are surrounded to form an air gap; the connecting structure includes a first conductive structure and a second conductive structure connected to each other, the insulating structure includes a first insulating layer and a second insulating layer, the first insulating layer is located between the inner wall of the connecting hole and the first conductive structure, the second insulating layer is located between the inner wall of the connecting hole and the second conductive structure, and the first insulating layer, the second insulating layer, the inner wall of the connecting hole and the connecting structure are surrounded to form an air gap; The second insulating layer closes the air gap, or the second insulating layer and the second conductive structure close the air gap together.

2. The semiconductor structure according to claim 1, characterized in that: The air gap penetrates the interface between the substrate and the dielectric layer.

3. The semiconductor structure according to claim 2, characterized in that: A width of a portion of the air gap facing the dielectric layer is smaller than a width of a portion of the air gap facing the substrate.

4. The semiconductor structure according to claim 1, characterized in that: The first conductive structure includes a first barrier layer connected to the first insulating layer, and the second conductive structure includes a second barrier layer connected to the second insulating layer and the first barrier layer.

5. The semiconductor structure according to claim 4, characterized in that: The second conductive structure further includes a second conductive layer filling up the connecting hole. The second conductive layer is connected to the second barrier layer and is separated from the first conductive structure by the second barrier layer.

6. The semiconductor structure according to claim 4, characterized in that: The second conductive structure further includes a second conductive layer filling the connecting hole, and the second conductive layer connects the second barrier layer and the first conductive structure.

7. The semiconductor structure according to claim 5 or 6, characterized in that: The thickness of the second barrier layer is greater than that of the first barrier layer.

8. A method for forming a semiconductor structure, characterized in that: include: Providing a substrate, the substrate comprising a substrate and a dielectric layer, the substrate having a front side and a back side arranged opposite to each other, the dielectric layer being formed on the front side; forming a connecting hole in the substrate, wherein the connecting hole passes through the substrate and extends to the dielectric layer; A communication structure is formed in the communication hole, wherein the communication structure is spaced apart from the inner wall of the communication hole; forming an insulating structure between the connecting structure and the inner wall of the connecting hole; Wherein, the insulating structure, the inner wall of the connecting hole and the connecting structure are arranged to form an air gap; The forming of a communication structure in the communication hole comprises: A first conductive structure is formed in the communicating hole, wherein the first conductive structure is spaced apart from an inner wall of the communicating hole, and a distance exists between the first conductive structure and an opening of the communicating hole; The forming of the insulating structure between the connecting structure and the inner wall of the connecting hole comprises: forming a first insulating layer between the inner wall of the communicating hole and the first conductive structure, wherein the distance between the surface of the first insulating layer and the opening of the communicating hole is greater than the distance between the surface of the first conductive structure and the opening of the communicating hole; A second insulating layer is formed on the inner wall of the connecting hole, the first insulating layer and the second insulating layer constitute the insulating structure, and the first insulating layer, the second insulating layer, the inner wall of the connecting hole and the connecting structure are surrounded to form an air gap; The forming of the communication structure in the communication hole further comprises: forming a second conductive structure on the surface of the second insulating layer and the surface of the first conductive structure, wherein the first conductive structure and the second conductive structure constitute the connecting structure; The second insulating layer closes the air gap, or the second insulating layer and the second conductive structure close the air gap together.

9. The method for forming a semiconductor structure according to claim 8, characterized in that: The forming of the connecting hole in the substrate comprises: The base is etched from the back side of the substrate to form the communication hole.

10. The method for forming a semiconductor structure according to claim 8, wherein: The air gap penetrates the interface between the substrate and the dielectric layer.

11. The method for forming a semiconductor structure according to claim 10, characterized in that: A width of a portion of the air gap facing the dielectric layer is smaller than a width of a portion of the air gap facing the substrate.

12. The method for forming a semiconductor structure according to claim 8, wherein: The insulating structure formed between the connecting structure and the inner wall of the connecting hole further comprises: Before forming the first conductive structure in the communicating hole, forming a primary insulating layer on the inner wall of the communicating hole, the primary insulating layer comprising a first side wall portion located on the side wall of the communicating hole; The forming of the first conductive structure in the connecting hole comprises: forming a primary barrier layer on the surface of the primary insulating layer; forming a primary conductive layer on the surface of the primary barrier layer; removing a portion of the primary conductive layer and the primary barrier layer to expose a portion of the first sidewall portion, wherein the remaining primary barrier layer constitutes a first barrier layer, the remaining primary conductive layer constitutes a first conductive layer, and the first barrier layer and the first conductive layer constitute a first conductive structure; The forming of a first insulating layer between the inner wall of the connecting hole and the first conductive structure comprises: A portion of the primary insulating layer is removed, and the remaining primary insulating layer constitutes a first insulating layer.

13. The method for forming a semiconductor structure according to claim 12, wherein: The forming of the second conductive structure on the surface of the second insulating layer and the surface of the first conductive structure comprises: forming a second barrier layer on the surface of the second insulating layer, the surface of the first barrier layer and the surface of the first conductive layer; A second conductive layer is formed, wherein the second conductive layer is connected to the second barrier layer.

14. The method for forming a semiconductor structure according to claim 13, wherein: The second barrier base layer serves as the second barrier layer, and the forming of the second conductive layer comprises: The second conductive layer is formed on the surface of the second barrier layer, and the second conductive layer and the second barrier layer constitute the second conductive structure.

15. The method for forming a semiconductor structure according to claim 13, wherein: The forming of the second conductive layer comprises: removing at least a portion of the second barrier layer on the surface of the first conductive structure, and the remaining second barrier layer constitutes the second barrier layer; The second conductive layer is formed on the surface of the second barrier layer and the exposed surface of the first conductive structure. The second conductive layer and the second barrier layer constitute the second conductive structure.

16. The method for forming a semiconductor structure according to claim 14 or 15, characterized in that: The thickness of the second barrier layer is greater than that of the first barrier layer.

17. A stacking structure, characterized in that: The semiconductor structure is formed by processing based on any one of claims 1 to 7.

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