Method for preparing adjustable PN-type SiC and graphene heterojunction device

Abstract

The invention relates to the technical field of optical sensors, and particularly discloses a method for preparing an adjustable PN-type SiC and graphene heterojunction device, which comprises the following steps: preparing a graphene material through mechanical transfer, performing PN-type adjustment on the surface of SiC through high-temperature ion implantation, and performing thermal oxidation and NO annealing treatment to eliminate the rough condition of wafer surface oxidation. The graphene material is prepared in a mechanical transfer mode, the preparation process is simplified, and the preparation efficiency and quality are improved; a high-temperature ion implantation technology is introduced to carry out PN-type adjustment on the surface of SiC, so that the function and the application range of the device are expanded; the roughness condition of wafer surface oxidation is eliminated through thermal oxidation and NO annealing treatment, the interface quality and bonding strength of the SiC and graphene heterojunction device are improved, and the performance and stability of the device are improved.

Description

Technical Field

[0001] The invention belongs to the technical field of optical sensors, and in particular relates to a method for preparing an adjustable PN-type SiC and graphene heterojunction device. Background Art

[0002] As a new type of optoelectronic device, SiC and graphene heterojunction devices combine the excellent optical properties of SiC and the unique electrical properties of graphene, showing a wide range of application potential.

[0003] SiC is a wide bandgap semiconductor material with excellent optical properties such as high refractive index, dispersion characteristics and optical transparency. Due to its good optical properties in a wide wavelength range, SiC has become one of the important materials for preparing optical devices. At the same time, graphene is a two-dimensional thin film material with excellent electrical properties, such as high carrier mobility and wide optical transparency, which is suitable for electrical control and modulation of optical devices.

[0004] SiC and graphene heterojunction devices combine SiC and two-dimensional material graphene, making full use of the advantages of both materials to achieve multifunctionality and high performance of optical devices.

[0005] By introducing a graphene layer into the SiC photonic crystal structure, the optical properties of the SiC photonic crystal can be adjusted to achieve light modulation and control. At the same time, by utilizing the electrically adjustable properties of graphene, electrical modulation and electro-optical modulation of light can also be achieved, improving the flexibility and adjustability of optical devices.

[0006] In the field of optical communications, heterojunction devices of SiC and graphene have important application value. By utilizing the fast carrier response of graphene and the high quality factor resonant cavity of SiC photonic crystal, high-speed optical modulators and optical detectors can be realized, thus improving the transmission rate and bandwidth of optical communication systems.

[0007] In summary, SiC and graphene heterojunction devices represent the latest progress in the fields of optoelectronics and nanotechnology and have broad application prospects.

[0008] At present, the preparation process of SiC and graphene heterojunction devices is relatively complicated, and it is necessary to control the growth and bonding process of the two materials, including the preparation method of graphene, the surface treatment of the SiC substrate, and the interface bonding between the two.

[0009] These processes require a high level of technical skills and equipment support, and the preparation costs are relatively high.

[0010] Material compatibility: SiC and graphene have different lattice structures and physical and chemical properties, which may lead to material compatibility issues, such as insufficient interface bonding strength and lattice mismatch, which may affect the stability and performance of the device. Summary of the invention

[0011] The object of the present invention is to provide a method for preparing a heterojunction device of SiC and graphene with adjustable PN type, so as to solve the problems raised in the above background technology.

[0012] To achieve the above object, the present invention provides the following technical solutions:

[0013] A method for preparing a PN-type adjustable SiC and graphene heterojunction device comprises the following steps:

[0014] S1. Mask layer growth and conductivity type adjustment:

[0015] First, a 2-micron-thick SiO2 mask layer was grown on an N-type SiC substrate using vertical low-pressure chemical vapor deposition (LPCVD) technology;

[0016] S2. Photolithography process and formation of the area to be etched:

[0017] A photoresist is coated on the SiC substrate with the SiO2 mask layer grown thereon, and exposure and development treatment are performed. Through this photolithography process step, the area to be etched is obtained;

[0018] S3. Electron beam etching, cleaning and injection window formation:

[0019] Selectively etching the SiO2 mask layer not blocked by the photoresist by electron beam etching;

[0020] After etching is completed, an acid wash step is performed to completely remove the residual photoresist on the surface;

[0021] Finally, a clear injection window is left and the desired pattern is obtained;

[0022] S4. Use an implanter to perform high-temperature ion implantation of Al ions to invert the N-type SiC and perform high-temperature activation. Set a recipe through pre-set implantation process parameters to achieve PN-type conversion.

[0023] S5. Remove the deposited mask layer SiO by dry etching and BOE wet soaking 2；

[0024] S6. Optimize the surface amorphous area and the original surface roughness caused by production or placement in the air by dry oxygen thermal oxidation at a temperature of 1350 degrees and NO atmosphere annealing;

[0025] S7. Removing the thermally oxidized sacrificial layer SiO2 by BOE wet soaking;

[0026] S8. Obtain a predetermined photolithographic pattern by vertical exposure technology and perform electron beam evaporation to deposit a metal electrode Ti / Al on the prepared SiC substrate to form a Hall electrode;

[0027] S9. Use a tape with suitable viscosity to first take a portion of the graphene single crystal on the tape, take a silicon wafer and dry it at 50 degrees for 5 minutes, then transfer the graphene on the tape to the silicon wafer to obtain graphene; actually drop the configured PMMA onto the cut PDMS and dry it at 50 degrees for 8 minutes to prepare a viscous transfer material, cover the transfer material on the graphene and perform mechanical pressing, and then transfer the obtained preferred graphene to the predetermined area on the SiC substrate where the electrode is prepared.

[0028] Compared with the prior art, the present invention has the following beneficial effects:

[0029] 1. Mechanical transfer to prepare graphene materials: The present invention uses mechanical transfer to skip the graphene material growth step and directly prepares graphene materials from the prepared graphene growth substrate by mechanical peeling. This method can not only quickly and massively prepare high-performance graphene materials, but also avoid the complexity and uncertainty in the graphene growth process, thereby improving preparation efficiency and material quality.

[0030] 2. High-temperature ion implantation to adjust the PN type of SiC surface: In order to solve the problem of single structure of existing SiC and graphene devices, the present invention introduces high-temperature ion implantation technology to adjust the PN type of SiC material surface. Through high-temperature ion implantation, a PN junction can be formed on the surface of SiC material, thereby providing the possibility for subsequent complex large-scale device preparation and expanding the function and application range of the device.

[0031] 3. Thermal oxidation and NO annealing treatment to eliminate the roughness of wafer surface oxidation: In view of the material compatibility problem between SiC and graphene, the present invention specifically performs thermal oxidation and NO annealing treatment on SiC to eliminate the roughness of wafer surface oxidation during storage. Through this treatment, the interface quality and bonding strength of SiC and graphene heterojunction devices can be improved, and the device performance and stability can be improved.

[0032] In summary, the present invention solves the key technical difficulties in the preparation of SiC and graphene heterojunction devices by introducing key innovations such as mechanical transfer to prepare graphene materials, high-temperature ion implantation to adjust the PN type of the SiC surface, thermal oxidation and NO annealing treatment, and provides important technical support for its application in the fields of optoelectronics and nanotechnology. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of the process of forming an implantation window on a SiC substrate according to the present invention;

[0034] Figure 2 Schematic diagram of doping concentration distribution and potential change after Al ion implantation for PN type conversion in an embodiment of the present invention;

[0035] Figure 3 Schematic diagram of graphene being transferred to a predetermined area on a SiC substrate on which an electrode is prepared according to the present invention;

[0036] Figure 4 Schematic diagram of the photoelectric performance of the graphene heterojunction on SiC of the present invention. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] Example:

[0039] See also Figure 1 - Figure 4 As shown, a method for preparing a PN-type adjustable SiC and graphene heterojunction device comprises the following steps:

[0040] S1. Mask layer growth and conductivity type adjustment:

[0041] First, a 2-micron-thick SiO2 mask layer was grown on an N-type SiC substrate using vertical low-pressure chemical vapor deposition (LPCVD) technology;

[0042] S2. Photolithography process and formation of the area to be etched:

[0043] A photoresist is coated on the SiC substrate with the SiO2 mask layer grown thereon, and exposure and development treatment are performed. Through this photolithography process step, the area to be etched is obtained;

[0044] S3. Electron beam etching, cleaning and injection window formation:

[0045] Selectively etching the SiO2 mask layer not blocked by the photoresist by electron beam etching;

[0046] After etching is completed, an acid wash step is performed to completely remove the residual photoresist on the surface;

[0047] Finally, a clear injection window is left and the desired pattern is obtained;

[0048] S4. Using an implanter to perform high-temperature ion implantation of Al ions to invert the N-type SiC and perform high-temperature activation, and setting a recipe by pre-set implantation process parameters to achieve PN-type conversion;

[0049] S5. Remove the deposited mask layer SiO by dry etching and BOE wet soaking 2；

[0050] S6. Optimize the surface amorphous area and the original surface roughness caused by production or placement in the air by dry oxygen thermal oxidation at a temperature of 1350 degrees and NO atmosphere annealing;

[0051] S7. Removing the thermally oxidized sacrificial layer SiO2 by BOE wet soaking;

[0052] S8. Obtain a predetermined photolithographic pattern by vertical exposure technology and perform electron beam evaporation to deposit a metal electrode Ti / Al on the prepared SiC substrate to form a Hall electrode;

[0053] S9. Use a tape with appropriate viscosity to first take a portion of the graphene single crystal on the tape A, take a silicon wafer and dry it at 50 degrees for 5 minutes. Then transfer the graphene on the tape A to the silicon wafer to obtain graphene A.

[0054] The prepared PMMA is actually dropped onto the cut PDMS and dried at 50 degrees for 8 minutes to prepare the viscous transfer material A. The transfer material A is covered on the graphene A and mechanically pressed, and then the obtained preferred graphene B is transferred to the predetermined area on the SiC substrate where the electrode is prepared, such as Figure 3 shown.

[0055] Figure 4 Shown is a schematic diagram of the optoelectronic performance of graphene heterojunction on SiC.

[0056] Among them, dry etching, also known as plasma-assisted etching, is a method of etching solid surfaces using plasma generated by low-voltage discharge. When the gas exists in the form of plasma, its chemical activity is much stronger than under normal conditions, and it can react chemically with the etched material or achieve the purpose of etching and removal through the physical bombardment of high-energy ions. Therefore, dry etching is the result of a balance between physical and chemical processes on the wafer surface.

[0057] The parameters of the etcher in dry etching are as follows: Pressure: 3 mTorr; Helium Pressure: 4 Torr; PN2 (nitrogen flow): 200 sccm; CHF3 (trifluoromethane flow): 50 sccm.

[0058] BOE wet process, that is, wet etching process using buffered oxide etch (BOE) solution, is widely used in semiconductor manufacturing and micro-nano processing. Vertical exposure technology mainly uses advanced optical imaging technology to accurately transfer patterns to photosensitive materials to achieve high-precision and high-resolution pattern production. Electron beam evaporation is an advanced physical vapor deposition (PVD) technology that bombards the coating material with high-energy electron beams to heat and evaporate the material and deposit it on the substrate surface in a high vacuum environment to form a thin film.

[0059] The SiC substrate in S1 is P-type or N-type, and the N-type is adjusted to P-type and the P-type is adjusted to N-type in S1.

[0060] The use of mechanical transfer to prepare graphene materials simplifies the preparation process and improves preparation efficiency and quality; the introduction of high-temperature ion implantation technology to adjust the PN type of SiC surface expands the function and application range of the device; thermal oxidation and NO annealing treatment eliminate the roughness of wafer surface oxidation, improve the interface quality and bonding strength of SiC and graphene heterojunction devices, and improve the performance and stability of the device. These innovations have accelerated the development and application of devices and promoted the development of optoelectronics and nanotechnology.

[0061] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for preparing a PN-type adjustable SiC and graphene heterojunction device, characterized in that: The following steps are involved: S1. Mask layer growth and conductivity type adjustment: First, a 2-micron-thick SiO2 mask layer was grown on an N-type SiC substrate using vertical low-pressure chemical vapor deposition (LPCVD) technology; S2. Photolithography process and formation of the area to be etched: A photoresist is coated on the SiC substrate with the SiO2 mask layer grown thereon, and exposure and development treatment are performed. Through this photolithography process step, the area to be etched is obtained; S3. Electron beam etching, cleaning and injection window formation: Selectively etching the SiO2 mask layer not blocked by the photoresist by electron beam etching; After etching is completed, an acid wash step is performed to completely remove the residual photoresist on the surface; Finally, a clear injection window is left and the desired pattern is obtained; S4. Using an implanter to perform high-temperature ion implantation of Al ions to invert the N-type SiC and perform high-temperature activation, and setting a recipe by pre-set implantation process parameters to achieve PN-type conversion; S5. The deposited mask layer SiO2 is removed by dry etching and BOE wet immersion; the etching machine parameters in the dry etching are as follows: Pressure: 3mTorr Helium Pressure: 4 Torr PN2 (nitrogen flow): 200sccm CHF3 (trifluoromethane flow): 50sccm Duration: 2200s; S6. Optimize the surface amorphous area and the original surface roughness caused by production or placement in the air by dry oxygen thermal oxidation at a temperature of 1350 degrees and NO atmosphere annealing; S7. Removing the thermally oxidized sacrificial layer SiO2 by BOE wet soaking; S8. Obtain a predetermined photolithographic pattern by vertical exposure technology and perform electron beam evaporation to deposit a metal electrode Ti / Al on the prepared SiC substrate to form a Hall electrode; S9. Use a tape with suitable viscosity to first take a portion of the graphene single crystal on the tape, take a silicon wafer and dry it at 50 degrees for 5 minutes, and then transfer the graphene on the tape to the silicon wafer to obtain graphene; The configured PMMA is actually dropped onto the cut PDMS and dried at 50 degrees for 8 minutes to prepare a viscous transfer material. The transfer material is covered on the graphene and mechanically pressed. The obtained preferred graphene is then transferred to a predetermined area on the SiC substrate where the electrode is prepared.

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