Circuit board packaging structure and manufacturing method of circuit board packaging structure
By using a combined structure of multiple circuit boards and dielectric layers in the circuit board packaging structure, electrical connection is achieved using a conductive paste sintered body, and press-fitting is performed at a preset temperature, the circuit board packaging structure in the prior art is solved. The poor reliability problem during hot and cold shock and reflow soldering has improved the stability and working performance of the circuit board.
Patent Information
- Application Number
- CN202411656287.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2025-01-03
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing multi-BGA circuit board packaging structure has poor reliability during hot and cold shock and reflow soldering, and is prone to misalignment or disengagement problems, affecting the stability and working performance of the circuit board.
Using a combined structure of multiple circuit boards and dielectric layers, electrical connection is achieved by setting a conductive paste sintered body in the dielectric layer, and pressing and fixing is performed at a preset temperature, and bonding is performed using an insulating dielectric layer to ensure the circuit board's stable connection between.
It improves the reliability and stability of the circuit board packaging structure, avoids misalignment or disengagement problems during the packaging process, ensures that the circuit board works normally, and can withstand repeated hot and cold shocks and reflow soldering.
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Figure CN119255476A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a circuit board packaging structure and a method for manufacturing the circuit board packaging structure. Background Art
[0002] With the continuous development of semiconductor technology, the packaging process of circuit boards is also constantly improving. A good circuit board packaging structure can improve the reliability and stability of the circuit board. A good manufacturing method of the circuit board packaging structure can prevent or reduce the damage to the circuit board during the packaging process and ensure the good working performance of the circuit board.
[0003] In the related technology, the multi-BGA circuit board packaging structure combines mature mounting and packaging technologies to form an integrated PCBA board, which can be used for PCBA connections within a board, between boards, and between racks. Among them, the BGA is fixed to the PCB substrate through solder paste and welding materials. Such a manufacturing method will make the reliability of the packaging board poor and cannot withstand repeated hot and cold shocks and reflow soldering. Summary of the invention
[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one purpose of the present invention is to provide a circuit board packaging structure, which can effectively improve the stability and reliability of the circuit board and ensure the normal operation of the circuit board packaging structure.
[0005] The present invention further provides a method for manufacturing a circuit board packaging structure.
[0006] According to the circuit board packaging structure of the present invention, it comprises: a plurality of circuit boards, each of which is provided with interconnection pads, the plurality of circuit boards comprising: a first circuit board, the first circuit board having a first main surface and a second main surface on the opposite side of the first main surface, the first main surface and the second main surface being arranged at intervals in a first direction, the interconnection pads comprising a first pad, the first pad being arranged on the second main surface of the first circuit board; a second circuit board, the second circuit board having a third main surface and a fourth main surface on the opposite side of the third main surface, the third main surface of the second circuit board being close to the second main surface of the first circuit board, the interconnection pads comprising a second pad and a third pad, the second pad being arranged on the first main surface of the first circuit board, and the third pad being arranged on the third main surface of the second circuit board; a dielectric layer, the dielectric layer being arranged between the first circuit board and the second circuit board, the dielectric layer being provided with a conductive paste sintered body electrically connected to the first pad of the first circuit board and the third pad of the second circuit board; the first circuit board, the dielectric layer and the second circuit board being pressed, connected and fixed at a preset temperature; the dielectric layer is an insulating material, and can realize the bonding of the first circuit board and the second circuit board at a preset temperature.
[0007] Therefore, by arranging a conductive paste sintered body electrically connected to the first solder pad of the first circuit board and the third solder pad of the second circuit board in the dielectric layer, and the dielectric layer is an insulating material, the dielectric layer can achieve bonding of the first circuit board and the second circuit board at a preset temperature, and by pressing and connecting the first circuit board, the dielectric layer and the second circuit board at a preset temperature, electrical connection is achieved between the first circuit board and the second circuit board, which can improve the reliability of the circuit board packaging structure, avoid problems such as misalignment or disengagement of the circuit board during the packaging process, and ensure the normal operation of the circuit on the circuit board packaging structure and the stability of the circuit during operation.
[0008] In some examples of the present invention, the first conductive member is a solidified conductive paste, and the conductive paste sintered body penetrates two side surfaces of the dielectric layer in the first direction.
[0009] In some examples of the present invention, a via hole is disposed between the second pad and the first pad, and the via hole extends in a first direction and is electrically connected to the first pad and the second pad, respectively.
[0010] In some examples of the present invention, the first circuit board is provided with a first positioning hole, the dielectric layer is provided with a second positioning hole, and the second circuit board is provided with a third positioning hole. The first positioning hole, the second positioning hole and the third positioning hole are positioned and matched with each other in a first direction.
[0011] In some examples of the present invention, there are multiple first positioning holes, multiple second positioning holes, and multiple third positioning holes, and the multiple first positioning holes, multiple second positioning holes, and multiple third positioning holes are positioned and matched one by one.
[0012] In some examples of the present invention, the projections of the first positioning hole, the second positioning hole and the third positioning hole in the first direction overlap correspondingly, and the projections of the first positioning hole, the second positioning hole and the third positioning hole in the first direction are set as positioning hole projections; the projections of the first solder pad, the second solder pad and the third solder pad in the first direction overlap correspondingly, and the projections of the first solder pad, the second solder pad and the third solder pad in the first direction are set as solder pad projections; the positioning hole projections are arranged at circumferential intervals on the outer side of the solder pad projections.
[0013] The manufacturing method of the circuit board packaging structure according to the embodiment of the present invention is applicable to manufacturing the circuit board packaging structure described above, and is characterized in that it includes the following steps: processing a first circuit board and a second circuit board, etching a first pad on the surface of the second main surface of the first circuit board, etching a second pad on the surface of the first main surface of the first circuit board, and etching a third pad on the surface of the third main surface of the second circuit board. Laying and pressing a first dielectric layer on the second main surface of the first circuit board, and curing at high temperature, wherein the thickness of the first dielectric layer is higher than the height of the first pad; laying and pressing a second dielectric layer on the first dielectric layer, wherein the second dielectric layer is formed by low-temperature pressing, the second dielectric layer is in a semi-cured state, and can be further cured and bonded at high temperature. A release film is formed on the second dielectric layer; at the position corresponding to the first pad of the first circuit board, the release film, the first dielectric layer and the second dielectric layer are subjected to CO2 laser window processing to expose the first pad and form a blind hole; a conductive paste is filled in the blind hole located on the first pad side of the first circuit board by screen printing, and the conductive paste is pre-cured in an oven; a third dielectric layer is laid and pressed on the third main surface of the second circuit board to form a third dielectric layer, and cured at high temperature, wherein the thickness of the third dielectric layer is higher than the height of the third pad; at the position corresponding to the third pad of the second circuit board, the third pad is exposed by CO2 laser window processing on the third dielectric layer. The release film located above the second dielectric layer of the first circuit board is removed, and the third dielectric layer of the second circuit board is arranged opposite to the second dielectric layer of the first circuit board; the first circuit board and the second circuit board containing the dielectric layer are stacked in the first direction through the positioning holes on the first circuit board and pressed at high temperature, and the packaging is pressed and packaged into an integrally formed structural member at a preset temperature.
[0014] In some examples of the present invention, the step of laying and pressing a third dielectric layer on the third main surface of the second circuit board and curing it at a high temperature, wherein the thickness of the third dielectric layer is higher than the height of the third solder pad, further comprises: etching a fourth solder pad on the surface of the fourth main surface of the second circuit board; laying and pressing a fourth dielectric layer on the fourth main surface of the second circuit board and curing it at a high temperature, wherein the thickness of the fourth dielectric layer is higher than the height of the fourth solder pad; and exposing the fourth solder pad by performing CO2 laser window opening processing on the third dielectric layer at a position corresponding to the fourth solder pad of the second circuit board.
[0015] In some examples of the present invention, after the step of exposing the fourth solder pad by performing CO2 laser window opening processing on the third dielectric layer at the position corresponding to the fourth solder pad of the second circuit board, the step also includes: removing the release film above the second dielectric layer of the first circuit board, and arranging the first circuit board on both sides of the first direction of the second circuit board, and making the second dielectric layer of the first circuit board on both sides be arranged opposite to the third dielectric layer and the fourth dielectric layer of the second circuit board respectively; stacking the first circuit board and the second circuit board containing the dielectric layer through the positioning holes on the first circuit board and the second circuit board and pressing them at high temperature, and packaging them into an integrally formed structure by pressing and sealing at a preset temperature.
[0016] In some examples of the present invention, the step of removing the release film above the second dielectric layer of the first circuit board and arranging the third dielectric layer of the second circuit board relative to the second dielectric layer of the first circuit board also includes: there are multiple first circuit boards, and the multiple first circuit boards are stacked in a first direction, wherein the first main surface of one of two adjacent first circuit boards and the second main surface of the other are adjacent to each other; the second circuit board is arranged on the first circuit board located at the end of the first direction among the multiple first circuit boards, and the third dielectric layer of the second circuit board is arranged relative to the second dielectric layer of the first circuit board located at the end of the first direction among the multiple first circuit boards in the first direction; the multiple first circuit boards and the second circuit boards containing the dielectric layers are stacked and pressed at high temperature through the positioning holes on the multiple first circuit boards and the second circuit boards, and are packaged into an integrally formed structural member by pressing and sealing at a preset temperature.
[0017] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 is a cross-sectional view of a circuit board packaging structure according to an embodiment of the present invention; Figure 2 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Figure 3 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Figure 4 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Figure 5 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Figure 6 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Figure 7 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Figure 8 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Fig. 9 is a schematic diagram of a first circuit board packaging process according to an embodiment of the present invention; Fig.10 is a schematic diagram of a second circuit board packaging process according to an embodiment of the present invention; Fig.11 is a schematic diagram of a second circuit board packaging process according to an embodiment of the present invention; Fig.12 is a schematic diagram of a second circuit board packaging process according to an embodiment of the present invention; Fig.13 is a schematic diagram of a circuit board packaging process according to a first embodiment of the present invention; Fig.14 is a schematic diagram of a circuit board packaging structure according to a first embodiment of the present invention; Fig.15 is a schematic diagram of a second circuit board packaging process according to a second embodiment of the present invention; Fig.16 is a schematic diagram of a second circuit board packaging process according to a second embodiment of the present invention; Fig.17 is a schematic diagram of a second circuit board packaging process according to a second embodiment of the present invention; Fig.18 is a schematic diagram of a circuit board packaging process according to a second embodiment of the present invention; Fig.19is a schematic diagram of a circuit board packaging structure according to a second embodiment of the present invention; Fig. 20 is a schematic diagram of a circuit board packaging process according to a third embodiment of the present invention; Fig.21 is a schematic diagram of a circuit board packaging structure according to a third embodiment of the present invention; Fig. 22 is a schematic diagram of a circuit board packaging structure according to an embodiment of the present invention; Fig.23 is a cross-sectional view of a circuit board packaging structure according to an embodiment of the present invention; Fig.24 It is a schematic flow chart of a method for manufacturing a circuit board packaging structure according to an embodiment of the present invention.
[0019] Reference numerals: 100. Circuit board packaging structure; 10. first circuit board; 101. first main surface; 102. second main surface; 104. via hole; 105. first positioning hole; 20, dielectric layer; 203, first conductive member; 204, second positioning hole; 205, first dielectric layer; 206, second dielectric layer; 207, third dielectric layer; 208, release film; 209, blind hole groove; 210, fourth dielectric layer; 30. second circuit board; 301. third positioning hole; 302. third main surface; 303. fourth main surface; 40, interconnect pad; 401, first pad; 402, second pad; 403, third pad; 404, fourth pad. DETAILED DESCRIPTION
[0020] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.
[0021] Reference below Figure 1-Figure 24 A circuit board package structure 100 according to an embodiment of the present invention is described. The circuit board package structure 100 of the present invention is configured with a method for manufacturing the circuit board package structure 100 .
[0022] Combination Figure 1-Figure 24As shown, the circuit board packaging structure 100 according to the present invention may mainly include: a plurality of circuit boards, each of which is provided with an interconnection pad 40. Among them, the interconnection pad 40 can provide an electrical connection, connecting the pins of the electronic components with the conductive tracks on the circuit board to ensure the smooth transmission of current and signals, so that the various components on the circuit board can work together to achieve the overall function of the circuit board packaging structure 100. In addition, the interconnection pad 40 can also play a role in mechanical fixing, and the pins of the electronic components can be firmly connected and fixed with the pads to form a stable mechanical connection, which can prevent the electronic components from moving or falling off on the circuit board, and can ensure the stability of current and signal transmission, thereby improving the stability and reliability of the circuit board packaging structure 100.
[0023] Furthermore, packaging multiple circuit boards together can not only realize the integration of multiple functions, but also optimize the electrical connection lines between different circuit boards, which can not only help improve the working performance and stability of related electronic equipment, but also reduce the size of related electronic equipment.
[0024] Further, the plurality of circuit boards may mainly include: a first circuit board 10 , a second circuit board 30 and a dielectric layer 20 .
[0025] Among them, the first circuit board 10 has a first main surface 101 and a second main surface 102 on the opposite side of the first main surface 101. The first main surface 101 and the second main surface 102 are arranged at intervals in the first direction. Both the first main surface 101 and the second main surface 102 can be used for the layout of electronic components and circuits, which can provide more layout space, thereby not only improving the space utilization of the first circuit board 10, but also realizing more complex circuits on the first circuit board 10, which can improve the integration of the first circuit board 10.
[0026] Furthermore, the interconnect pad 40 includes a first pad 401, which is disposed on the second main surface 102 of the first circuit board 10. The first pad 401 can not only provide electrical connection and ensure the reliability of the electrical connection, but also firmly fix the electronic component on the pad, thereby preventing the electronic component on the second main surface 102 of the first circuit board from loosening or falling off during use. In addition, when an electronic component fails, it can be easily disassembled through the first pad 401 and replaced with a new electronic component, which can simplify the production process and improve production efficiency and yield rate.
[0027] Furthermore, the second circuit board 30 has a third main surface 302 and a fourth main surface 303 on the opposite side of the third main surface 302. The third main surface 302 of the second circuit board 30 is close to the second main surface 102 of the first circuit board 10, which can facilitate the press-fit connection and fixation of the third main surface 302 of the second circuit board and the second main surface 102 of the first circuit board. After the third main surface 302 of the second circuit board 30 and the second main surface 102 of the first circuit board 10 are connected and fixed, it will be inconvenient to place electronic components, but the fourth main surface 303 of the second circuit board 30 can still provide layout space to ensure the complete layout and complete function of the circuit board packaging structure 100.
[0028] Further, the interconnect pad 40 includes a second pad 402 and a third pad 403, wherein the second pad 402 is disposed on the first main surface 101 of the first circuit board 10, and the third pad 403 is disposed on the third main surface 302 of the second circuit board 30. Specifically, the electrical connection between the second main surface 102 of the first circuit board and the third main surface 302 of the second circuit board can be achieved through the third pad 403 and the first pad 401, and in addition, other components or conductive materials can be electrically connected on the first main surface 101 of the first circuit board 10 through the second pad 402, so that the reliability of the circuit board structure can be ensured.
[0029] Furthermore, the dielectric layer 20 is arranged between the first circuit board 10 and the second circuit board 30, and a conductive paste sintered body electrically connected to the first solder pad 401 of the first circuit board 10 and the third solder pad 403 of the second circuit board 30 is arranged in the dielectric layer 20. The conductive paste can serve as a conductive channel between different circuit boards. This not only helps to achieve electrical connection between multi-layer circuit boards to complete specific circuit functions, but also optimizes the conductive performance, effectively reduces the signal transmission delay between multi-layer circuit boards, improves circuit performance, and ensures the reliability of the circuit board packaging structure 100.
[0030] Furthermore, establishing a conductive channel between the first circuit board 10 and the second circuit board 30 can enable sharing of the same power supply when the power supply conditions required by the first circuit board 10 and the second circuit board 30 are the same, thereby avoiding adding unnecessary power supply equipment and unnecessary production costs.
[0031] Furthermore, the first circuit board 10, the dielectric layer 20, and the second circuit board 30 are pressed and connected at a preset temperature. Specifically, by controlling the temperature during pressing, it is possible to prevent the normal working performance of the circuit board from being affected by excessively high or low temperatures. At the same time, the first circuit board 10, the dielectric layer 20, and the second circuit board 30 are tightly pressed together, which can not only ensure the pressing effect of the circuit board packaging structure 100, but also play a certain protective role on the circuit board packaging structure 100, thereby improving the stability and reliability of the circuit board packaging structure 100.
[0032] Furthermore, the dielectric layer 20 is an insulating material, and the bonding of the first circuit board 10 and the second circuit board 30 can be achieved at a preset temperature. In this way, the dielectric layer 20 can be used to electrically isolate the first circuit board 10 and the second circuit board 30, so that the circuits of each part of the first circuit board 10 and the second circuit board 30 can work independently without interfering with each other, and the short circuit between the first circuit board 10 and the second circuit board 30 due to accidental contact can be prevented, thereby preventing the circuit function of the circuit board from being abnormal, and the stability and reliability of the circuit board can be improved. In addition, by controlling the temperature when the first circuit board 10 and the second circuit board 30 are bonded, it is possible to prevent the normal working performance of the circuit board from being affected by excessively high or low temperatures.
[0033] Therefore, by providing a conductive paste sintered body electrically connected to the first solder pad 401 of the first circuit board 10 and the third solder pad 403 of the second circuit board 30 in the dielectric layer 20, and the dielectric layer 20 is an insulating material, the dielectric layer 20 can achieve the bonding of the first circuit board 10 and the second circuit board 30 at a preset temperature, and by pressing and connecting the first circuit board 10, the dielectric layer 20 and the second circuit board 30 at a preset temperature, the first circuit board 10 and the second circuit board 30 are electrically connected. This can not only prevent the circuit board packaging structure 100 from having poor contact, but also enable the circuit board packaging structure 100 to withstand repeated hot and cold shocks and reflow soldering, and prevent the circuit board packaging structure 100 from having tin seepage short circuit problems. Further, the reliability of the circuit board packaging structure 100 can be improved, and the problems of dislocation or disengagement of the circuit board during the packaging process can be avoided, and the normal operation of the circuit on the circuit board packaging structure 100 and the stability of the circuit during operation can be guaranteed.
[0034] In some embodiments of the present invention, the dielectric layer 20 has certain high temperature resistance and insulation properties.
[0035] In some embodiments of the present invention, the length and width of the first circuit board 10 and the second circuit board 30 are the same, and the thickness settings of the first circuit board 10 and the second circuit board 30 can be the same or different. The length, width and thickness of the first circuit board 10 and the second circuit board 30 can be set according to specific circumstances and requirements.
[0036] Combination Figure 1 , Fig.14 , Fig.19 and Fig.21 As shown, the first conductive member 203 is a solidified conductive paste, and the conductive paste sintered body penetrates the two side surfaces of the dielectric layer 20 in the first direction.
[0037] Specifically, a first conductive member 203 is disposed in the dielectric layer 20, and the first conductive member 203 passes through two side surfaces of the dielectric layer 20 in the first direction, so that an electrical connection between the first solder pad 401 and the third solder pad 403 can be achieved, so that a conductive path between the first circuit board 10 and the second circuit board 30 can be established in the dielectric layer 20, signal transmission between the first circuit board 10 and the second circuit board 30 can be achieved, and the stability and reliability of the circuit board packaging structure 100 can be improved.
[0038] Furthermore, curing of the conductive paste can form good contact between the conductive particles, thereby improving the conductivity. Therefore, the first conductive member 203 is a cured conductive paste, which can form a reliable conductive path between the first pad 401 and the third pad 403, and ensure that the circuit signal is reliably transmitted between the first pad 401 and the third pad 403. In addition, the use of the cured conductive paste to establish the conductive path does not require soldering operations, which can prevent the problem of tin seepage and short circuits on both sides of the dielectric layer 20.
[0039] Combination Figure 1 , Fig.14 , Fig.19 and Fig.21 As shown, a via hole 104 is provided between the second pad 402 and the first pad 401, and the via hole 104 is extended in the first direction and is respectively electrically connected to the first pad 401 and the second pad 402. Specifically, the electrical connection between the first pad 401 and the second pad 402 is achieved by providing the via hole 104 between the second pad 402 and the first pad 401, so that a conductive path between the first pad 401 and the second pad 402 can be established on the first circuit board 10, which can ensure that the circuit signal is reliably transmitted between the first pad 401 and the second pad 402, which can improve the circuit performance on the circuit board packaging structure 100, and improve the stability and reliability of the circuit board packaging structure 100.
[0040] Combination Figure 1 , Fig. 22 and Fig.23 As shown, the first circuit board 10 is provided with a first positioning hole 105, the dielectric layer 20 is provided with a second positioning hole 204, and the second circuit board 30 is provided with a third positioning hole 301. The first positioning hole 105, the second positioning hole 204 and the third positioning hole 301 are positioned and matched with each other in the first direction.
[0041] Specifically, positioning holes are auxiliary holes used in the process of circuit board manufacturing and assembly to accurately position and fix the circuit board. Positioning holes are usually located at the edge or specific position of the circuit board to ensure that the circuit board can be accurately aligned and fixed during manufacturing, testing and assembly.
[0042] Furthermore, by setting the first positioning hole 105, the second positioning hole 204 and the third positioning hole 301 to correspond to each other in the first direction, it can help to position and fix the first circuit board 10, the dielectric layer 20 and the second circuit board 30, prevent the first circuit board 10, the dielectric layer 20 and the second circuit board 30 from being offset or misaligned during pressing, and ensure the accuracy of the circuit board packaging structure 100 during assembly, thereby improving the reliability of the circuit board packaging structure 100 and ensuring the normal operation of the circuit board packaging structure 100.
[0043] Combination Figure 1 , Fig. 22 and Fig.23 As shown, there are multiple first positioning holes 105, multiple second positioning holes 204 and multiple third positioning holes 301, and the multiple first positioning holes 105, multiple second positioning holes 204 and multiple third positioning holes 301 are positioned and matched one by one. Specifically, each first positioning hole 105 has a corresponding second positioning hole 204 and a third positioning hole 301. By positioning and matching the multiple first positioning holes 105, multiple second positioning holes 204 and multiple third positioning holes 301 one by one, it can effectively prevent the first circuit board 10, the dielectric layer 20 and the second circuit board 30 from being offset or misaligned during assembly and pressing, and can further ensure the accuracy and stability of the circuit board packaging structure 100 during assembly and pressing, and can improve the reliability of the circuit board packaging structure 100.
[0044] In some embodiments of the present invention, the second circuit board 30, the dielectric layer 20, and the first circuit board 10 can be accurately positioned relative to each other by sequentially passing a positioning pin through the third positioning hole 301, the second positioning hole 204, and the first positioning hole 105. Specifically, the first positioning hole 105, the second positioning hole 204, and the third positioning hole 301 can serve as mechanical and visual reference points to ensure that the first circuit board 10, the dielectric layer 20, and the second circuit board 30 can be quickly placed in the correct position. Furthermore, after the processed first circuit board 10, dielectric layer 20 and second circuit board 30 are stacked and placed in sequence, a positioning pin is passed through the third positioning hole 301, the second positioning hole 204 and the first positioning hole 105 in sequence, so that the relative positions of the second circuit board 30, the dielectric layer 20 and the first circuit board 10 are accurate, thereby not only achieving precise positioning and assembly of the first circuit board 10, the dielectric layer 20 and the second circuit board 30, and preventing misalignment or disengagement during assembly, but also the first circuit board 10, the dielectric layer 20 and the second circuit board 30 can be firmly fixed together, further, the stability and reliability of the circuit board packaging structure 100 can be improved.
[0045] In addition, the use of positioning pins can not only achieve positioning but also simplify the process of circuit board packaging, thereby improving the manufacturing efficiency of the circuit board packaging structure 100.
[0046] Combination Figure 1 , Fig. 22 and Fig.23 As shown, the projections of the first positioning hole 105, the second positioning hole 204 and the third positioning hole 301 in the first direction correspond to overlap, and the projections of the first positioning hole 105, the second positioning hole 204 and the third positioning hole 301 in the first direction are set as positioning hole projections, the projections of the first solder pad 401, the second solder pad 402 and the third solder pad 403 in the first direction correspond to overlap, and the projections of the first solder pad 401, the second solder pad 402 and the third solder pad 403 in the first direction are set as solder pad projections, and the positioning hole projections are arranged at circumferential intervals on the outer side of the solder pad projections.
[0047] Specifically, the projections of the first positioning hole 105, the second positioning hole 204 and the third positioning hole 301 in the first direction are correspondingly overlapped, which can improve the alignment accuracy between the first circuit board 10, the dielectric layer 20 and the second circuit board 30, avoid the misalignment or offset between the first circuit board 10, the dielectric layer 20 and the second circuit board 30, and help ensure the accurate connection and installation between the first circuit board 10 and the second circuit board 30. In addition, during maintenance and testing, the positioning holes can not only help maintenance personnel quickly determine the relevant layout of the circuit board and facilitate the detection of fault points, but also assist in the installation of the test fixture to ensure the accuracy of the test results.
[0048] Furthermore, the projections of the first solder pad 401, the second solder pad 402 and the third solder pad 403 in the first direction overlap with each other, which helps to achieve the electrical connection between the first circuit board 10 and the second circuit board 30, thereby not only optimizing the circuit layout of the circuit board packaging structure 100 in a limited space, but also allowing the interconnection pad 40 to be used as a test point to facilitate the debugging and detection of circuit signals.
[0049] Further, the projections of the first positioning hole 105, the second positioning hole 204 and the third positioning hole 301 in the first direction are set as positioning hole projections, and the projections of the first solder pad 401, the second solder pad 402 and the third solder pad 403 in the first direction are set as solder pad projections. The positioning hole projections are arranged at intervals in the circumferential direction outside the solder pad projections. This can not only provide a more uniform support force during the circuit board packaging process, but also prevent the relevant circuit board from being deformed or twisted, etc., and can also reduce the difficulty of processing the positioning holes, and can reduce the process complexity of the circuit board packaging structure 100. In addition, the positioning holes are projected at intervals in the circumferential direction outside the solder pad projections, which can also reduce the difficulty of arranging the electrical connection lines on the circuit board, and can avoid interference between the positioning holes and the internal electronic components and lines, thereby ensuring the compactness of the layout on the circuit board, and improving the stability and reliability of the circuit on the circuit board.
[0050] Combination Figure 1-Figure 14 and Fig.24As shown, the manufacturing method of the circuit board packaging structure 100 according to the present invention is suitable for manufacturing the circuit board packaging structure 100 described above, and is characterized in that it includes the following steps: processing the first circuit board 10 and the second circuit board 30, etching the first pad 401 on the surface of the second main surface 102 of the first circuit board 10, etching the second pad 402 on the surface of the first main surface 101 of the first circuit board 10, and etching the third pad 403 on the surface of the third main surface 302 of the second circuit board 30. Laying and pressing the first dielectric layer 205 on the second main surface 102 of the first circuit board 10, and curing at high temperature, wherein the thickness of the first dielectric layer 205 is higher than the height of the first pad 401; laying and pressing the second dielectric layer 206 on the first dielectric layer 205, wherein the second dielectric layer 206 is formed by low-temperature pressing, and the second dielectric layer 206 is in a semi-cured state, and can be further cured and bonded at high temperature. A release film 208 is formed on the second dielectric layer 206; at a position corresponding to the first pad 401 of the first circuit board 10, the first pad 401 is exposed by performing CO2 laser window opening processing on the release film 208, the first dielectric layer 205 and the second dielectric layer 206 to form a blind hole groove 209; a conductive paste is filled in the blind hole groove 209 on the side of the first pad 401 of the first circuit board 10 by screen printing, and the conductive paste is pre-cured in an oven; a third dielectric layer 207 is formed by laying and pressing on the third main surface 302 of the second circuit board 30, and cured at high temperature, wherein the thickness of the third dielectric layer 207 is higher than the height of the third pad 403; at a position corresponding to the third pad 403 of the second circuit board 30, the third pad 403 is exposed by performing CO2 laser window opening processing on the third dielectric layer 207. Remove the release film 208 located above the second dielectric layer 206 of the first circuit board 10, and set the third dielectric layer 207 of the second circuit board 30 opposite to the second dielectric layer 206 of the first circuit board 10; stack the first circuit board 10 and the second circuit board 30 containing the dielectric layer 20 in a first direction through the positioning holes on the first circuit board 10 and the second circuit board 30 and press them at high temperature, and press and package them into an integrally formed structural member at a preset temperature.
[0051] First, the first circuit board 10 and the second circuit board 30 are processed, the first solder pad 401 is etched on the surface of the second main surface 102 of the first circuit board 10, the second solder pad 402 is etched on the surface pattern of the first main surface 101 of the first circuit board 10, and the third solder pad 403 is etched on the surface of the third main surface 302 of the second circuit board 30. This can facilitate the placement of electronic components on the first circuit board 10 and the second circuit board 30, and can facilitate the subsequent construction of electrical connection lines of the circuit board packaging structure 100, and can prevent the problem of difficulty in line connection after the first circuit board 10 and the second circuit board 30 are pressed together.
[0052] Furthermore, a first dielectric layer 205 is laid and pressed on the second main surface 102 of the first circuit board 10 and cured at high temperature, wherein the thickness of the first dielectric layer 205 is higher than the height of the first soldering pad 401, so that the first dielectric layer 205 with insulating properties can wrap the first soldering pad 401, thereby blocking the electrical connection between the first soldering pad 401 and the outside of the first circuit board 10.
[0053] Furthermore, a second dielectric layer 206 is formed by laying and laminating on the first dielectric layer 205, wherein the second dielectric layer 206 is formed by laminating at low temperature and is in a semi-cured state, and can be further cured and bonded at high temperature, thereby enhancing the insulation performance of the dielectric layer 20, preventing the problem that the first dielectric layer 205 cannot completely avoid signal interference and leakage, optimizing circuit performance, and ensuring the safety and stability of the circuit.
[0054] Furthermore, a release film 208 is formed on the second dielectric layer 206 to protect the first circuit board 10 and the electronic components on the first circuit board 10 from being scratched or contaminated, thereby reducing or avoiding damage during the circuit board packaging process.
[0055] Furthermore, at the position corresponding to the first pad 401 of the first circuit board 10, the release film 208, the first dielectric layer 205 and the second dielectric layer 206 are subjected to CO2 laser window processing to expose the first pad 401 and form a blind hole groove 209. This can not only accurately remove the insulating layer covering the first pad 401 and ensure the size and position accuracy of the first pad 401, but also establish an electrical connection channel between the first pad 401 and other circuit boards or external devices. In addition, the laser processing process is fast, which can improve the manufacturing efficiency of the circuit board packaging structure 100.
[0056] Furthermore, the conductive paste is filled in the blind hole groove 209 located on the side of the first solder pad 401 of the first circuit board 10 by silk screen printing, and the conductive paste is pre-cured in an oven. In this way, a conductive circuit can be formed by the conductive paste, thereby ensuring the reliability of the electrical connection between the first solder pad 401 and other circuit boards or external devices.
[0057] Furthermore, a third dielectric layer 207 is laid and pressed on the third main surface 302 of the second circuit board 30 and cured at high temperature, wherein the thickness of the third dielectric layer 207 is higher than the height of the third soldering pad 403, so that the third dielectric layer 207 with insulating properties can wrap the third soldering pad 403, thereby blocking the electrical connection between the third soldering pad 403 and the outside of the second circuit board 30.
[0058] Furthermore, at the position of the third solder pad 403 corresponding to the second circuit board 30, the third solder pad 403 is exposed by performing CO2 laser window opening processing on the third dielectric layer 207. This not only can accurately remove the insulating layer covering the third solder pad 403 and ensure the exposed size and position accuracy of the third solder pad 403, but also can establish an electrical connection channel between the third solder pad 403 and other circuit boards or external devices.
[0059] Furthermore, the release film 208 located above the second dielectric layer 206 of the first circuit board 10 is removed, and the third dielectric layer 207 of the second circuit board 30 is arranged opposite to the second dielectric layer 206 of the first circuit board 10. This not only exposes the second dielectric layer 206 of the first circuit board 10 to facilitate subsequent operations, but also ensures the accuracy and rationality of the placement of the first circuit board 10 and the second circuit board 30.
[0060] Further, the first circuit board 10 and the second circuit board 30 containing the dielectric layer 20 are stacked in the first direction and pressed at high temperature through the positioning holes on the first circuit board 10 and the second circuit board 30, and are pressed and packaged into an integrally formed structural member by a preset temperature. Specifically, the relative position of the first circuit board 10 and the second circuit board 30 can be accurately determined by the positioning holes, so that not only can the offset between the circuit boards be effectively prevented, but also the internal circuits and pads and other structures can be accurately aligned, and the reliability and accuracy of the electrical connection circuits in the circuit board packaging structure 100 can be ensured. In addition, the first circuit board 10 and the second circuit board 30 containing the dielectric layer 20 are stacked in the first direction and pressed at high temperature, and are pressed and packaged into an integrally formed structural member by a preset temperature, so that the first circuit board 10 and the second circuit board 30 can be tightly combined into a whole, which can not only enhance the mechanical strength of the circuit board packaging structure 100, avoid looseness or displacement, etc., to ensure the stability and firmness of the circuit board packaging structure 100, but also optimize the working performance of the circuit board packaging structure 100, and ensure the complete function of the circuit board packaging structure 100. In addition, the integrally formed structure can also simplify the production process of the circuit board packaging structure 100 and improve production efficiency.
[0061] Therefore, by operating according to the manufacturing method of the circuit board packaging structure 100, the first circuit board 10, the dielectric layer 20, the second circuit board 30 and other structures are finally packaged into an integrally formed structural part. In this way, not only can part of the circuit of the circuit board packaging structure 100 be encapsulated inside the structure, thereby reducing the interference of the external electromagnetic field on the signal and improving the signal integrity and transmission quality, but also the layout of the circuit board packaging structure 100 can be made more compact, the size of the circuit board can be reduced, and the integration of the circuit board can be improved. Furthermore, the working performance of the circuit board packaging structure 100 can be optimized, and the stability and reliability of the circuit board can be improved.
[0062] Combination Figure 1-Figure 19 and Fig.24 As shown, the steps of laying and pressing a third dielectric layer 207 on the third main surface 302 of the second circuit board 30, and curing at high temperature, wherein the thickness of the third dielectric layer 207 is higher than the height of the third pad 403, further include: etching a fourth pad 404 on the surface of the fourth main surface 303 of the second circuit board 30; laying and pressing a fourth dielectric layer 210 on the fourth main surface 303 of the second circuit board 30, and curing at high temperature, wherein the thickness of the fourth dielectric layer 210 is higher than the height of the fourth pad 404; and exposing the fourth pad 404 by performing CO2 laser windowing processing on the third dielectric layer 207 at a position corresponding to the fourth pad 404 of the second circuit board 30.
[0063] Specifically, a fourth solder pad 404 is etched on the surface of the fourth main surface 303 of the second circuit board 30 , which can facilitate adding electronic components or increasing the number of circuit board stacking layers on the fourth main surface 303 of the second circuit board 30 , and can facilitate the improvement or perfection of the circuit board packaging structure 100 .
[0064] Furthermore, a fourth dielectric layer 210 is laid and pressed on the fourth main surface 303 of the second circuit board 30 and cured at high temperature, wherein the thickness of the fourth dielectric layer 210 is higher than the height of the fourth soldering pad 404, so that the fourth dielectric layer 210 with insulating properties can wrap the fourth soldering pad 404, thereby blocking the electrical connection between the fourth soldering pad 404 and the outside of the second circuit board 30.
[0065] Furthermore, at the position corresponding to the fourth pad 404 of the second circuit board 30, the third dielectric layer 207 is processed by CO2 laser window opening to expose the fourth pad 404, which can not only accurately remove the insulating layer covering the fourth pad 404 and ensure the size and position accuracy of the fourth pad 404, but also establish an electrical connection channel between the fourth pad 404 and other circuit boards or external devices. In addition, the laser processing process is fast, which can improve the manufacturing efficiency of the circuit board packaging structure 100.
[0066] Combination Figure 1-Figure 19 and Fig.24As shown, at the position corresponding to the fourth solder pad 404 of the second circuit board 30, after the step of exposing the fourth solder pad 404 by performing CO2 laser window opening processing on the third dielectric layer 207, it also includes: removing the release film 208 located above the second dielectric layer 206 of the first circuit board 10, and arranging the first circuit board 10 on both sides of the first direction of the second circuit board 30, and making the second dielectric layer 206 of the first circuit board 10 on both sides respectively arranged opposite to the third dielectric layer 207 and the fourth dielectric layer 210 of the second circuit board 30; stacking the first circuit board 10 and the second circuit board 30 containing the dielectric layer 20 through the positioning holes on the first circuit board 10 and the second circuit board 30 and pressing them at high temperature, and packaging them into an integrally formed structure by pressing and sealing at a preset temperature.
[0067] Specifically, the release film 208 located above the second dielectric layer 206 of the first circuit board 10 is removed, and the first circuit boards 10 are respectively arranged on both sides of the first direction of the second circuit board 30, and the second dielectric layers 206 of the first circuit boards 10 on both sides are respectively arranged opposite to the third dielectric layer 207 and the fourth dielectric layer 210 of the second circuit board 30. In this way, not only the second dielectric layer 206 of the first circuit board 10 can be exposed to facilitate subsequent operations, but also the accuracy and rationality of the placement of the first circuit board 10 and the second circuit board 30 can be ensured.
[0068] Further, the first circuit board 10 and the second circuit board 30 containing the dielectric layer 20 are stacked and pressed at high temperature through the positioning holes on the first circuit board 10 and the second circuit board 30, and are pressed and packaged into an integrally formed structural member by a preset temperature. Specifically, the relative position of the first circuit board 10 and the second circuit board 30 can be accurately determined by the positioning holes, so that not only can the offset between the circuit boards be effectively prevented, but also the internal circuits and pads and other structures can be accurately aligned, and the reliability and accuracy of the electrical connection circuits in the circuit board packaging structure 100 can be ensured. In addition, the first circuit board 10 and the second circuit board 30 containing the dielectric layer 20 are stacked in the first direction and pressed at high temperature, and are pressed and packaged into an integrally formed structural member by a preset temperature, so that the first circuit board 10 and the second circuit board 30 can be tightly combined into a whole, which can not only enhance the mechanical strength of the circuit board packaging structure 100, avoid looseness or displacement, etc., to ensure the stability and firmness of the circuit board packaging structure 100, but also optimize the working performance of the circuit board packaging structure 100, and ensure the complete function of the circuit board packaging structure 100. In addition, the integrally formed structure can also simplify the production process of the circuit board packaging structure 100 and improve production efficiency.
[0069] With such an arrangement, a dielectric layer 20 can be formed on both sides of the second circuit board 30, and windows can be opened to expose the pads covered by the dielectric layer 20. Furthermore, the second circuit board 30 structure can be stacked and laminated with multiple first circuit boards 10 to form a circuit board packaging structure 100, which can facilitate the improvement or perfection of the circuit board packaging structure 100 and make the layout of the circuit board packaging structure 100 more compact and flexible.
[0070] In some embodiments of the present invention, a via hole is disposed between the third pad 403 and the fourth pad 404 , and the via hole is extended in the first direction and is electrically connected to the third pad 403 and the fourth pad 404 , respectively.
[0071] Combination Figure 1-Figure 21 and Fig.24 As shown, the step of removing the release film 208 located above the second dielectric layer 206 of the first circuit board 10 and arranging the third dielectric layer 207 of the second circuit board 30 relative to the second dielectric layer 206 of the first circuit board 10 also includes: there are multiple first circuit boards 10, and the multiple first circuit boards 10 are stacked in the first direction, wherein the first main surface 101 of one of two adjacent first circuit boards 10 and the second main surface 102 of the other are adjacent to each other; the second circuit board 30 is arranged on the first circuit board 10 located at the end of the first direction among the multiple first circuit boards 10, and the third dielectric layer 207 of the second circuit board 30 is arranged relative to the second dielectric layer 206 of the first circuit board 10 located at the end of the first direction among the multiple first circuit boards 10; the multiple first circuit boards 10 and the second circuit boards 30 containing the dielectric layer 20 are stacked and pressed at high temperature through the positioning holes on the multiple first circuit boards 10 and the second circuit boards 30, and are pressed and packaged into an integrally formed structural member at a preset temperature.
[0072] Specifically, there are multiple first circuit boards 10, and the multiple first circuit boards 10 are stacked in a first direction, wherein the first main surface 101 of one of two adjacent first circuit boards 10 and the second main surface 102 of the other are adjacent to each other, so that the accuracy of the placement positions of the multiple first circuit boards 10 can be ensured, and the reliability and accuracy of the circuit board packaging process can be ensured.
[0073] Furthermore, the second circuit board 30 is arranged on the first circuit board 10 located at the end of the first direction among the multiple first circuit boards 10, and the third dielectric layer 207 of the second circuit board 30 and the second dielectric layer 206 of the first circuit board 10 located at the end of the first direction among the multiple first circuit boards 10 are arranged relative to each other in the first direction. This can facilitate the subsequent stacking of the first circuit boards 10, ensure the flexibility of the circuit board packaging structure 100, and facilitate the subsequent functional improvement of the circuit board packaging structure 100.
[0074] Furthermore, the plurality of first circuit boards 10 and second circuit boards 30 containing the dielectric layer 20 are stacked and pressed at high temperature through the positioning holes on the plurality of first circuit boards 10 and second circuit boards 30, and are pressed and packaged into an integrally formed structural component by pressing and packaging at a preset temperature. Specifically, the relative position of the first circuit board 10 and the second circuit board 30 can be accurately determined by the positioning holes, so that it can not only effectively prevent the displacement of the plurality of circuit boards when stacked, but also ensure the precise alignment of the circuit boards' internal circuits and pads and other structures, and ensure the reliability and accuracy of the electrical connection circuits in the circuit board packaging structure 100. In addition, the first circuit board 10 and the second circuit board 30 containing the dielectric layer 20 are stacked in the first direction and pressed at high temperature, and are pressed and packaged into an integrally formed structural component by pressing and packaging at a preset temperature, so that the first circuit board 10 and the second circuit board 30 can be tightly combined into a whole, which can not only enhance the mechanical strength of the circuit board packaging structure 100, avoid looseness or displacement, etc., to ensure the stability and firmness of the circuit board packaging structure 100, but also optimize the working performance of the circuit board packaging structure 100, and ensure the complete function of the circuit board packaging structure 100. In addition, the one-piece structure can also simplify the production process of the circuit board packaging structure 100 and improve production efficiency.
[0075] With such a configuration, a plurality of first circuit boards 10 can be stacked with the second circuit board 30 as the base board, and then the whole is formed into a circuit board packaging structure 100 through a high-temperature pressing process. This can optimize the structure of the circuit board packaging, facilitate the improvement or perfection of the circuit board packaging structure 100, and make the layout of the circuit board packaging structure 100 more compact and flexible.
[0076] In some embodiments of the present invention, an oven can be used to provide a certain temperature for the printed conductive paste, so that some unnecessary substances in the conductive paste can be removed during the drying process. At the same time, the paste is squeezed into a bundle under continuous external pressure through a pressing process, thereby obtaining a flat and optimized conductive structure.
[0077] The circuit board packaging structure 100 according to the present invention has good stability and reliability. The circuit board packaging structure 100 is manufactured by the manufacturing method of the circuit board packaging structure 100 in the present invention, which can not only ensure the normal working performance of the circuit on the circuit board packaging structure 100, improve the reliability of the circuit board packaging structure 100, and extend the service life of the circuit board packaging structure 100, but also simplify the circuit board packaging structure 100 and improve the manufacturing efficiency of the circuit board packaging structure 100.
[0078] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.
[0079] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.
[0080] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.
Claims
1. A circuit board packaging structure, characterized in that: include: A plurality of circuit boards, each circuit board being provided with an interconnection pad (40), the plurality of circuit boards comprising: A first circuit board (10), the first circuit board (10) comprising a first main surface (101) and a second main surface (102) opposite to the first main surface (101), the first main surface (101) and the second main surface (102) being arranged at intervals in a first direction, the interconnect pad (40) comprising a first pad (401), the first pad (401) being arranged on the second main surface (102) of the first circuit board (10); A second circuit board (30), the second circuit board (30) having a third main surface (302) and a fourth main surface (303) on the opposite side of the third main surface (302), the third main surface (302) of the second circuit board (30) being close to the second main surface (102) of the first circuit board (10), the interconnection pad (40) comprising a second pad (402) and a third pad (403), the second pad (402) being arranged on the first main surface (101) of the first circuit board (10), and the third pad (403) being arranged on the third main surface (302) of the second circuit board (30); A dielectric layer (20), the dielectric layer (20) being arranged between the first circuit board (10) and the second circuit board (30), wherein a conductive paste sintered body electrically connected to a first soldering pad (401) of the first circuit board (10) and a third soldering pad (403) of the second circuit board (30) is arranged in the dielectric layer (20); The first circuit board (10), the dielectric layer (20) and the second circuit board (30) are pressed, connected and fixed at a preset temperature; The dielectric layer (20) is an insulating material and can achieve bonding of the first circuit board (10) and the second circuit board (30) at a preset temperature.
2. The circuit board packaging structure according to claim 1, characterized in that: The first conductive member (203) is a solidified conductive paste, and the conductive paste sintered body penetrates the two side surfaces of the dielectric layer (20) in the first direction.
3. The circuit board packaging structure according to claim 1, characterized in that: A conducting hole (104) is provided between the second soldering pad (402) and the first soldering pad (401), and the conducting hole (104) is extended in a first direction and is electrically connected to the first soldering pad (401) and the second soldering pad (402) respectively.
4. The circuit board packaging structure according to claim 1, characterized in that: The first circuit board (10) is provided with a first positioning hole (105), the dielectric layer (20) is provided with a second positioning hole (204), and the second circuit board (30) is provided with a third positioning hole (301); the first positioning hole (105), the second positioning hole (204) and the third positioning hole (301) are positioned and matched with each other in a first direction.
5. The circuit board packaging structure according to claim 4, characterized in that: The first positioning hole (105), the second positioning hole (204) and the third positioning hole (301) are all multiple, and the multiple first positioning holes (105), the multiple second positioning holes (204) and the multiple third positioning holes (301) are positioned and matched one by one.
6. The circuit board packaging structure according to claim 5, characterized in that: The projections of the first positioning hole (105), the second positioning hole (204) and the third positioning hole (301) in the first direction overlap with each other, and the projections of the first positioning hole (105), the second positioning hole (204) and the third positioning hole (301) in the first direction are set as positioning hole projections; the projections of the first soldering pad (401), the second soldering pad (402) and the third soldering pad (403) in the first direction overlap with each other, and the projections of the first soldering pad (401), the second soldering pad (402) and the third soldering pad (403) in the first direction are set as soldering pad projections; and the positioning hole projections are arranged at intervals in the circumferential direction outside the soldering pad projections.
7. A method for manufacturing a circuit board packaging structure, suitable for manufacturing the circuit board packaging structure (100) according to any one of claims 1 to 6, characterized in that: The following steps are involved: Processing a first circuit board (10) and a second circuit board (30), etching a first solder pad (401) on the surface of the second main surface (102) of the first circuit board (10), etching a second solder pad (402) on the surface pattern of the first main surface (101) of the first circuit board (10), and etching a third solder pad (403) on the surface of the third main surface (302) of the second circuit board (30); Laying and pressing a first dielectric layer (205) on the second main surface (102) of the first circuit board (10) and curing it at a high temperature, wherein the thickness of the first dielectric layer (205) is higher than the height of the first solder pad (401); Laying and pressing the second medium layer (206) on the first medium layer (205), wherein the second medium layer (206) is pressed and formed at a low temperature, and the second medium layer (206) is in a semi-cured state and can be further cured and bonded at a high temperature; Laminating a release film (208) on the second dielectric layer (206); At a position corresponding to the first solder pad (401) of the first circuit board (10), the release film (208), the first dielectric layer (205) and the second dielectric layer (206) are subjected to CO2 laser window opening processing to expose the first solder pad (401) and form a blind hole groove (209); Filling the blind hole groove (209) located on the first pad (401) side of the first circuit board (10) with conductive paste by silk-screen printing, and pre-curing the conductive paste in an oven; Laying and pressing a third dielectric layer (207) on the third main surface (302) of the second circuit board (30), and curing it at a high temperature, wherein the thickness of the third dielectric layer (207) is higher than the height of the third solder pad (403); At a position corresponding to the third solder pad (403) of the second circuit board (30), the third solder pad (403) is exposed by performing a CO2 laser window opening process on the third dielectric layer (207); removing the release film (208) located above the second dielectric layer (206) of the first circuit board (10), and arranging the third dielectric layer (207) of the second circuit board (30) and the second dielectric layer (206) of the first circuit board (10) opposite to each other; The first circuit board (10) and the second circuit board (30) containing the dielectric layer (20) are stacked in a first direction and pressed at high temperature through positioning holes on the first circuit board (10) and the second circuit board (30), and are pressed and packaged into an integrally formed structural component at a preset temperature.
8. The method for manufacturing a circuit board packaging structure according to claim 7, characterized in that: The step of laying and laminating a third dielectric layer (207) on the third main surface (302) of the second circuit board (30), and curing the layer at a high temperature, wherein the thickness of the third dielectric layer (207) is higher than the height of the third solder pad (403), further comprises: A fourth solder pad (404) is etched on the surface of the fourth main surface (303) of the second circuit board (30); Laying and pressing a fourth dielectric layer (210) on the fourth main surface (303) of the second circuit board (30), and curing it at a high temperature, wherein the thickness of the fourth dielectric layer (210) is higher than the height of the fourth solder pad (404); At a position corresponding to the fourth solder pad (404) of the second circuit board (30), the fourth solder pad (404) is exposed by performing CO2 laser window opening processing on the third dielectric layer (207).
9. The method for manufacturing a circuit board packaging structure according to claim 8, characterized in that: After the step of performing CO2 laser window processing on the third dielectric layer (207) at a position corresponding to the fourth solder pad (404) of the second circuit board (30) to expose the fourth solder pad (404), the step further includes: Remove the release film (208) located above the second dielectric layer (206) of the first circuit board (10), and respectively arrange the first circuit board (10) on both sides of the second circuit board (30) in the first direction, and arrange the second dielectric layer (206) of the first circuit board (10) on both sides to be opposite to the third dielectric layer (207) and the fourth dielectric layer (210) of the second circuit board (30); The first circuit board (10) and the second circuit board (30) containing the dielectric layer (20) are stacked and pressed at high temperature through positioning holes on the first circuit board (10) and the second circuit board (30), and are pressed and packaged at a preset temperature to form an integrally formed structural component.
10. The method for manufacturing a circuit board packaging structure according to claim 7, characterized in that: The step of removing the release film (208) located above the second dielectric layer (206) of the first circuit board (10) and arranging the third dielectric layer (207) of the second circuit board (30) relative to the second dielectric layer (206) of the first circuit board (10) further comprises: There are a plurality of first circuit boards (10), and the plurality of first circuit boards (10) are stacked in a first direction, wherein a first main surface (101) of one of two adjacent first circuit boards (10) and a second main surface (102) of the other are adjacent to each other; The second circuit board (30) is arranged on the first circuit board (10) located at the end of the first direction among the plurality of first circuit boards (10), and the third dielectric layer (207) of the second circuit board (30) and the second dielectric layer (206) of the first circuit board (10) located at the end of the first direction among the plurality of first circuit boards (10) are arranged relative to each other in the first direction; A plurality of the first circuit boards (10) and the second circuit boards (30) containing the dielectric layer (20) are stacked and pressed at high temperature through positioning holes on the plurality of the first circuit boards (10) and the second circuit boards (30), and are pressed and packaged at a preset temperature into an integrally formed structural component.
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