Active device three-dimensional package of circuit board
By adopting a three-dimensional packaging structure with active devices on the circuit board, combined with the design of the adhesive layer and the annular packaging wall, the problems of limited base layer area and unsatisfactory mounting effect in the prior art are solved, and the problem of unsatisfactory mounting effect is achieved. More efficient active device package and better operating performance.
Patent Information
- Application Number
- CN202411436850.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-15
- Publication Date
- 2025-02-07
AI Technical Summary
The three-dimensional package base layer area of the active devices of existing circuit boards is limited, making it difficult to integrate more functions, and the mounting effect is not ideal, which can easily lead to poor power acquisition or easy disengagement of active devices in high temperature scenarios, and the basic layer is simple to set. , no stress protection is provided.
A three-dimensional packaging structure with active devices on both sides is adopted, and the active device is fixedly connected to the base layer through an adhesive layer, and a fluid seal is formed using an annular packaging wall and a sealing cover to increase stress protection and heat dissipation capabilities.
Packaging more active devices on the base layer with a limited area improves the three-dimensional packaging performance and working performance, and enhances product reliability and performance in high-temperature, high-pressure, corrosive gas environments.
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Figure CN119403030A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of electrical components, and in particular relates to a three-dimensional package of active components of a circuit board. Background Art
[0002] At present, sensors used in some special working conditions are usually required to have higher environmental adaptability. For example, in chemical or crude oil mining scenarios, sensors are usually required to be resistant to high temperature, high pressure and gas corrosion. As an important component of the sensor, the three-dimensional packaging of active devices on the circuit board is particularly important.
[0003] First, since the area of the base layer for setting active devices is limited, and in actual application scenarios, people hope that the active device three-dimensional packaging of the circuit board integrates more functions, the existing three-dimensional packaging of active devices on the circuit board generally adopts the form of setting active devices on one side of the base layer and packaging, which is difficult to meet the actual application needs. In addition, the mounting effect of the existing active devices and the base layer is not ideal, which may easily lead to poor power supply effect of the active devices or easy separation of the active devices from the base layer in high temperature scenarios; finally, the base layer of the existing three-dimensional packaging of active devices on the circuit board is relatively simple, and it cannot form stress protection for the active devices set on the base layer.
[0004] Therefore, it is urgent to propose a three-dimensional packaging of active devices on a circuit board to solve the technical problems existing in the above-mentioned prior art. Summary of the invention
[0005] In view of the limited area of the base layer for setting active devices in the prior art, and the fact that people hope that the three-dimensional packaging of active devices on circuit boards integrates more functions in actual application scenarios, the existing three-dimensional packaging of active devices on circuit boards generally adopts the form of setting active devices on one side of the base layer, which is difficult to meet the actual application needs. The existing mounting effect of active devices on the base layer is not ideal, which can easily lead to poor power supply effect of the active devices or easy detachment of the active devices from the base layer in high temperature scenarios. In addition, the base layer of the existing three-dimensional packaging of active devices on circuit boards is relatively simple and cannot form stress protection for the active devices set on the base layer. Now, an LED driver chip integrated with a memristor is provided to solve at least one of the above-mentioned technical problems.
[0006] In a preferred embodiment of the present invention, a three-dimensional package of active devices of a circuit board is provided, and the hybrid integrated circuit package module comprises:
[0007] a base layer having an upper side and a lower side;
[0008] Active devices, wherein the number of the active devices is plural, at least one of the active devices is disposed on the upper side of the base layer, and at least one of the active devices is disposed on the lower side of the base layer;
[0009] An adhesive layer, the adhesive layer is disposed between the active device and the base layer to fix the plurality of active devices to the base layer;
[0010] A wiring extending from the active device and connected to an upper side or a lower side of the base layer adjacent to the active device;
[0011] A first packaging wall, wherein the first packaging wall is a closed annular wall, the first packaging wall extends from the upper side of the base layer toward a direction away from the base layer, the first packaging wall is spatially perpendicular to the upper side of the base layer, and the active device disposed on the upper side of the base layer is surrounded by the first packaging wall;
[0012] A second packaging wall, the second packaging wall is a closed annular wall, the second packaging wall extends from the lower side of the base layer toward a direction away from the base layer, the second packaging wall is spatially perpendicular to the lower side of the base layer, and the active device arranged on the lower side of the base layer is surrounded by the second packaging wall;
[0013] A first sealing cover, wherein the first sealing cover is a fluid sealing cover disposed at one end of the first packaging wall away from the upper side of the base layer to form a first sealing cavity;
[0014] The second sealing cover is a fluid-tight cover disposed at one end of the second packaging wall away from the upper side of the base layer to form a second sealing cavity.
[0015] Preferably, the base layer includes a low-temperature co-fired ceramic layer, a first ceramic copper-clad layer located on an upper side of the low-temperature co-fired ceramic layer, and a second ceramic copper-clad layer located on a lower side of the low-temperature co-fired ceramic layer.
[0016] Preferably, the active device is selected from one or more of a diode, a triode, a field effect transistor, a thyristor, a semiconductor integrated circuit, and a hybrid integrated circuit.
[0017] Preferably, the adhesive layer includes bisphenol E cyanate and bisphenol A diglycidyl ether.
[0018] Preferably, the adhesive layer also includes epoxy resin and conductive powder.
[0019] Preferably, the first packaging wall is cylindrical, and the first sealing cover and the first packaging wall are sealed by any one of snap connection, thread connection, gluing or welding.
[0020] Preferably, the second packaging wall is cylindrical, and the second sealing cover and the second packaging wall are sealed by any one of snap connection, thread connection, gluing or welding.
[0021] Preferably, outer sides of the first encapsulation wall and the second encapsulation wall are aligned with edges of the base layer.
[0022] Preferably, the number of active devices disposed on the upper side of the base layer is plural, and the number of active devices disposed on the lower side of the base layer is plural.
[0023] Preferably, a connecting hole is provided between the upper side and the lower side of the base layer, the first sealed cavity and the second sealed cavity are connected through the connecting hole, and the first sealed cavity and the second sealed cavity are filled with active device protection gas.
[0024] Preferably, the protective gas is argon.
[0025] Compared with the prior art, the present invention can bring at least one of the following beneficial effects:
[0026] 1. The upper side and lower side of the base layer of the three-dimensional package of active devices of the circuit board of the present application are bonded with active devices through an adhesive layer, which can package more active devices on a limited area of the base layer, thereby improving the three-dimensional packaging performance and working performance of the active devices, such as shortening the transmission path between chips (reducing signal delay); at the same time, by shortening the interconnection size between active devices, the product reliability is improved; and when achieving the same function, the area is reduced compared with the traditional single-sided package;
[0027] In addition, the first sealing cover and the second sealing cover form a fluid seal with the first packaging wall and the second packaging wall respectively, thereby protecting the active devices located in the first sealing cavity and the second sealing cavity, so that the three-dimensional packaging of the active device of the present application still maintains excellent working performance in high temperature, high pressure and corrosive gas environment.
[0028] 2. The three-dimensional packaging of active devices in the circuit board of the present application introduces a low-temperature co-fired ceramic layer and a first ceramic copper clad layer and a second ceramic copper clad layer, which not only provides sufficient strength to protect the active devices from high mechanical stress, but also enhances the heat dissipation capacity on the upper and lower sides of the low-temperature co-fired ceramic layer, so that the three-dimensional packaging of active devices in the circuit board of the present application can maintain excellent working performance.
[0029] 3. The adhesive layer of the active device three-dimensional packaging of the circuit board of the present application includes bisphenol E cyanate and bisphenol A diglycidyl ether components. It should be noted that the combination of bisphenol A diglycidyl ether and bisphenol E cyanate helps to maintain the high temperature resistance of bisphenol E cyanate, so that the active device three-dimensional packaging of the present application can be used in high temperature environments. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The preferred implementation scheme will be described below in a clear and understandable manner with reference to the accompanying drawings to further illustrate the above-mentioned characteristics, technical features, advantages and their implementation methods.
[0031] Figure 1 The active device three-dimensional packaging of the circuit board in one embodiment of the present invention is shown;
[0032] Figure 2 The active device three-dimensional packaging of the circuit board in another embodiment of the present invention is shown;
[0033] Figure 3 The figure shows the basic layer structure of three-dimensional packaging of active devices on a circuit board in one embodiment of the present invention. DETAILED DESCRIPTION
[0034] Various aspects of the present invention are described in further detail below.
[0035] Unless otherwise defined or indicated, all professional and scientific terms used herein have the same meanings as those familiar to those skilled in the art. In addition, any methods and materials similar or equivalent to those described herein can be applied to the method of the present invention.
[0036] Unless otherwise clearly specified and limited, the "or" mentioned in the present invention includes the relationship of "and". The "and" is equivalent to the Boolean logic operator "AND", the "or" is equivalent to the Boolean logic operator "OR", and "AND" is a subset of "OR".
[0037] It is to be understood that although the terms "first", "second", etc. may be used herein to describe different elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Therefore, the first element may be referred to as the second element without departing from the teachings of the present invention.
[0038] In the present invention, the terms "consisting mainly of" and "consisting of" are included in the terms "containing", "including" or "comprising".
[0039] Unless otherwise clearly specified and limited, the terms "connected", "connected" and "connection" in the present invention should be understood in a broad sense, for example, it can be a fixed connection, or it can be connected through an intermediary medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0040] For example, if an element (or component) is referred to as being on, coupled to, or connected to another element, the element may be directly formed on, coupled to, or connected to the other element, or there may be one or more intervening elements between them. In contrast, if the expressions "directly on," "directly coupled to," and "directly connected to" are used herein, then no intervening elements are indicated. Other words used to describe the relationship between elements should be similarly interpreted, such as "between" and "directly between," "attached" and "directly attached," "adjacent" and "directly adjacent," and the like.
[0041] It should also be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to directions in the drawings. The words "inner" and "outer" used refer to directions toward or away from the geometric center of a particular component, respectively. It can be understood that these terms are used here to describe the relationship of one element, layer or region relative to another element, layer or region as shown in the drawings. In addition to the orientations described in the drawings, these terms should also include other orientations of the device.
[0042] Other aspects of the present invention will be apparent to those skilled in the art in view of the disclosure herein.
[0043] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings and other implementation methods can be obtained based on these drawings without creative work.
[0044] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The drawings only show the components related to the present application and are not drawn according to the number, shape and size of the components in actual implementation. The type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the component layout may also be more complicated. For example, the thickness of the components in the drawings may be exaggerated for the sake of clarity.
[0045] Example 1
[0046] As attached Figure 1 , Attachment Figure 3 As shown, the present invention realizes a three-dimensional packaging of active devices of a circuit board, and the hybrid integrated circuit packaging module includes:
[0047] A base layer 1, the base layer 1 having an upper side and a lower side;
[0048] Active devices 2, wherein the number of the active devices 2 is plural, at least one of the active devices 2 is disposed on the upper side of the base layer 1, and at least one of the active devices 2 is disposed on the lower side of the base layer 1;
[0049] An adhesive layer 3, wherein the adhesive layer 3 is disposed between the active device 2 and the base layer 1 to fix the plurality of active devices 2 to the base layer 1;
[0050] A wiring 4 extending from the active device 2 and connected to an upper side or a lower side of the base layer 1 adjacent to the active device 2;
[0051] a first packaging wall 5, wherein the first packaging wall 5 is a closed annular wall, and the first packaging wall 5 extends from the upper side of the base layer 1 toward a direction away from the base layer 1, and the first packaging wall 5 is vertical to the upper side of the base layer 1 in space, and the active device 2 disposed on the upper side of the base layer 1 is surrounded by the first packaging wall 5;
[0052] a second packaging wall 6, which is a closed annular wall, and extends from the lower side of the base layer 1 toward a direction away from the base layer 1, and the second packaging wall 6 is vertical to the lower side of the base layer 1 in space, and the active device 2 disposed on the lower side of the base layer 1 is surrounded by the second packaging wall 6;
[0053] A first sealing cover 7, wherein the first sealing cover 7 is a fluid-tight cover and is disposed at one end of the first packaging wall 5 away from the upper side of the base layer to form a first sealing cavity;
[0054] The second sealing cover 8 is a fluid-tight cover and is disposed at one end of the second packaging wall 6 away from the upper side of the base layer 1 to form a second sealed cavity.
[0055] It should be noted that the upper and lower sides of the base layer of the present application are bonded to active devices through an adhesive layer, which can package more active devices on a base layer of limited area, thereby improving the three-dimensional packaging performance of active devices, such as shortening the transmission path between chips (reducing signal delay); at the same time, by shortening the interconnection size between active devices, product reliability is improved; and the area is reduced compared to traditional single-sided packaging when achieving the same function.
[0056] As a preferred embodiment, the base layer 1 includes a low temperature co-fired ceramic layer. It should be noted that low temperature co-fired ceramic (LTCC) is a raw ceramic tape with precise thickness and density made by low temperature sintering ceramic powder. As a circuit substrate material, the required circuit pattern is made on the raw ceramic tape by laser drilling, micropore grouting, precision conductor paste printing and other processes. Multiple passive components can be buried in it, and then stacked together and sintered at 900°C to make a passive integrated component of a three-dimensional circuit network. It can also be made into a three-dimensional circuit substrate with built-in passive components. ICs and active devices can be mounted on its surface to make a functional module without active components (Active Components) integration.
[0057] Furthermore, the base layer 1 further includes a first ceramic copper clad layer 10 located on the upper side of the low temperature co-fired ceramic layer and a second ceramic copper clad layer 11 located on the lower side of the low temperature co-fired ceramic layer. It should be noted that the introduction of the low temperature co-fired ceramic layer and the first ceramic copper clad layer 10 and the second ceramic copper clad layer 11 not only provides sufficient strength to protect the active device from high mechanical stress, but also strengthens the heat dissipation capacity of the upper and lower sides of the low temperature co-fired ceramic layer, so that the three-dimensional package of the active device of the circuit board of the present application can maintain excellent working performance.
[0058] As a preferred embodiment, the active device 2 is selected from one or more of a diode, a triode, a field effect transistor, a thyristor, a semiconductor integrated circuit, and a hybrid integrated circuit. It should be noted that active devices are the main components of electronic circuits, which can be divided into discrete devices and integrated circuits. Among them, discrete devices include bipolar transistors (BipolarTransistor), field effect transistors (Field Effective Transistor), thyristors (Thyristor), etc., and integrated circuits include comparators (Comparator), reference sources (Reference Source), power amplifiers (PowerAmplifier), etc.
[0059] As a preferred embodiment, the adhesive layer 3 includes bisphenol E cyanate and bisphenol A diglycidyl ether components. It should be noted that the combination of bisphenol A diglycidyl ether and bisphenol E cyanate helps to maintain the high temperature resistance of bisphenol E cyanate, so that the active device three-dimensional packaging of the present application can be applied in high temperature environments.
[0060] As a preferred embodiment, the adhesive layer 3 further includes epoxy resin and conductive powder, and the conductive powder is nano silver particles. It should be noted that the copolymerization reaction pathway of cyanate ester and epoxy resin is that cyanate ester undergoes self-polymerization reaction to form a triazine ring structure, so that the adhesive has a low dielectric constant and excellent bonding performance.
[0061] As a preferred embodiment, the first packaging wall 5 is cylindrical, and the first sealing cover 7 is sealed and connected to the first packaging wall 5 by any one of snap connection, thread connection, gluing or welding.
[0062] As a preferred embodiment, the second packaging wall 6 is cylindrical, and the second sealing cover 8 and the second packaging wall 6 are sealed by any one of snap connection, thread connection, gluing or welding.
[0063] It should be noted that the first sealing cover 7 and the second sealing cover 8 form a fluid seal with the first packaging wall 5 and the second packaging wall 6 respectively, thereby protecting the active device 2 located in the first sealing cavity and the second sealing cavity, so that the three-dimensional packaging of the active device 2 of the present application still maintains excellent working performance in a high temperature, high pressure and corrosive gas environment.
[0064] As a preferred embodiment, the outer sides of the first encapsulation wall 5 and the second encapsulation wall 6 are aligned with the edge of the base layer.
[0065] As a preferred embodiment, the number of active devices 2 disposed on the upper side of the base layer 1 is plural, and the number of active devices 2 disposed on the lower side of the base layer 1 is plural.
[0066] As a preferred embodiment, the first sealed cavity and the second sealed cavity are filled with active device 2 protective gas. It should be noted that the first sealed cavity and the second sealed cavity are filled with active device protective gas, such as argon, which can make the active device work more stable and have a longer service life.
[0067] Example 2
[0068] As attached Figure 2 As shown, the present invention realizes a three-dimensional packaging of active devices of a circuit board, and the hybrid integrated circuit packaging module includes:
[0069] A base layer 1, the base layer 1 having an upper side and a lower side;
[0070] Active devices 2, wherein the number of the active devices 2 is plural, at least one of the active devices 2 is disposed on the upper side of the base layer 1, and at least one of the active devices 2 is disposed on the lower side of the base layer 1;
[0071] An adhesive layer 3, wherein the adhesive layer 3 is disposed between the active device 2 and the base layer 1 to fix the plurality of active devices 2 to the base layer 1;
[0072] A wiring 4 extending from the active device 2 and connected to an upper side or a lower side of the base layer 1 adjacent to the active device 2;
[0073] a first packaging wall 5, wherein the first packaging wall 5 is a closed annular wall, and the first packaging wall 5 extends from the upper side of the base layer 1 toward a direction away from the base layer 1, and the first packaging wall 5 is vertical to the upper side of the base layer 1 in space, and the active device 2 disposed on the upper side of the base layer 1 is surrounded by the first packaging wall 5;
[0074] a second packaging wall 6, which is a closed annular wall, and extends from the lower side of the base layer 1 toward a direction away from the base layer 1, and the second packaging wall 6 is vertical to the lower side of the base layer 1 in space, and the active device 2 disposed on the lower side of the base layer 1 is surrounded by the second packaging wall 6;
[0075] A first sealing cover 7, wherein the first sealing cover 7 is a fluid-tight cover and is disposed at one end of the first packaging wall 5 away from the upper side of the base layer 1 to form a first sealing cavity;
[0076] The second sealing cover 8 is a fluid-tight cover disposed at one end of the second packaging wall 6 away from the upper side of the base layer 1 to form a second sealing cavity; wherein,
[0077] A communication hole 9 is provided between the upper side and the lower side of the base layer 1 , and the first sealed cavity is communicated with the second sealed cavity through the communication hole 9 .
[0078] It should be noted that a connecting hole 9 is provided between the upper side and the lower side of the base layer 1. The first sealed cavity and the second sealed cavity are connected through the connecting hole 9, so that the active devices mounted on the upper side and the lower side of the base layer 1 are respectively placed in the same protective gas atmosphere, which is conducive to more consistent service life of the active devices.
[0079] Based on this application, it should be understood by those skilled in the art that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspect described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.
[0080] It should be noted that the above embodiments can be freely combined as needed. The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the present invention, and these improvements and modifications should also be regarded as the protection scope of the present invention.
[0081] All documents mentioned in the present invention are cited as references in this application, just as each document is cited as reference separately. In addition, it should be understood that after reading the above content of the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms also fall within the scope defined by the claims attached to this application.
Claims
1. A three-dimensional package of active devices on a circuit board, characterized in that: The hybrid integrated circuit packaging module comprises: a base layer having an upper side and a lower side; Active devices, wherein the number of the active devices is plural, at least one of the active devices is disposed on the upper side of the base layer, and at least one of the active devices is disposed on the lower side of the base layer; An adhesive layer, the adhesive layer is disposed between the active device and the base layer to fix the plurality of active devices to the base layer; A wiring extending from the active device and connected to an upper side or a lower side of the base layer adjacent to the active device; A first packaging wall, wherein the first packaging wall is a closed annular wall, the first packaging wall extends from the upper side of the base layer toward a direction away from the base layer, the first packaging wall is spatially perpendicular to the upper side of the base layer, and the active device disposed on the upper side of the base layer is surrounded by the first packaging wall; A second packaging wall, the second packaging wall is a closed annular wall, the second packaging wall extends from the lower side of the base layer toward a direction away from the base layer, the second packaging wall is vertical to the lower side of the base layer, and the active device arranged on the lower side of the base layer is surrounded by the second packaging wall; A first sealing cover, wherein the first sealing cover is a fluid sealing cover disposed at one end of the first packaging wall away from the upper side of the base layer to form a first sealing cavity; The second sealing cover is a fluid-tight cover disposed at one end of the second packaging wall away from the upper side of the base layer to form a second sealing cavity.
2. The three-dimensional active device packaging of a circuit board as claimed in claim 1, characterized in that: The base layer includes a low-temperature co-fired ceramic layer, a first ceramic copper-clad layer located on an upper side of the low-temperature co-fired ceramic layer, and a second ceramic copper-clad layer located on a lower side of the low-temperature co-fired ceramic layer.
3. The three-dimensional active device packaging of a circuit board as claimed in claim 1, characterized in that: The active device is selected from one or more of a diode, a triode, a field effect transistor, a thyristor, a semiconductor integrated circuit, and a hybrid integrated circuit.
4. The three-dimensional active device packaging of a circuit board as claimed in claim 1, characterized in that: The adhesive layer includes bisphenol E cyanate and bisphenol A diglycidyl ether.
5. The three-dimensional active device packaging of a circuit board as claimed in claim 4, characterized in that: The adhesive layer also includes epoxy resin and conductive powder.
6. The three-dimensional active device packaging of a circuit board as claimed in claim 1, characterized in that: The first packaging wall is cylindrical, and the first sealing cover is sealed and connected to the first packaging wall by any one of snap connection, thread connection, gluing or welding.
7. The three-dimensional active device packaging of a circuit board as claimed in claim 6, characterized in that: The second packaging wall is cylindrical, and the second sealing cover is sealed and connected to the second packaging wall by any one of snap connection, thread connection, gluing or welding.
8. The three-dimensional active device packaging of a circuit board as claimed in claim 7, characterized in that: The outer sides of the first packaging wall and the second packaging wall are aligned with the edge of the base layer.
9. The three-dimensional active device packaging of a circuit board as claimed in claim 8, characterized in that: The number of active devices disposed on the upper side of the base layer is plural, and the number of active devices disposed on the lower side of the base layer is plural.
10. The three-dimensional active device packaging of a circuit board as claimed in claim 9, characterized in that: A connecting hole is provided between the upper side and the lower side of the base layer, the first sealed cavity is connected with the second sealed cavity through the connecting hole, and the first sealed cavity and the second sealed cavity are filled with active device protection gas.
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