Wafer appearance detection method and device and computer equipment

By annotating defect samples of the wafer appearance and generating a detection model, the existing detection solutions are solved, efficient and accurate defect detection and repair are achieved, and the quality and reliability of the wafer are improved.

CN119540222APending Publication Date: 2025-02-28CHONGQING ZHONGKE SAILBOAT INFORMATION TECH CO LTD
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Patent Information

Application Number
CN202411915634.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-24
Publication Date
2025-02-28

AI Technical Summary

Technical Problem

The existing wafer appearance detection scheme is inefficient and inaccurate, especially for defects such as small scratches and are prone to missed inspection.

Method used

By annotating defect samples of the wafer appearance, a defect detection model is generated, and training is used to identify and locate defect locations and types using the deep learning framework and object detection model architecture.

Benefits of technology

It significantly improves the efficiency and accuracy of wafer appearance defect detection, can quickly identify complex defects, ensure the integrity and cleanliness of wafer surface, thereby improving the quality and reliability of wafers.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a wafer appearance detection method and device and computer equipment. The method comprises the following steps: labeling defect categories of defect samples of various wafer appearances to obtain a sample set with defect labeling categories of various wafer appearances, and training the sample set with defect labeling categories of various wafer appearances to generate a defect detection model of wafer appearances, and detecting wafer appearance defects according to the defect detection model of the wafer appearance. By means of the mode, the detection efficiency and accuracy of wafer appearance defect detection can be improved.
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Description

Technical Field

[0001] The present invention relates to the field of wafer technology, and in particular to a wafer appearance detection method, device and computer equipment. Background Art

[0002] With the development of display technology of smart devices, the resolution of LED display screens is getting higher and higher. Wafers are the core part of LEDs, and their quality seriously affects various optoelectronic parameters of LED display screens. At the same time, as the resolution of LED display screens becomes higher and higher and the process becomes more complicated, the corresponding requirements for wafer appearance quality inspection will be further improved.

[0003] However, existing wafer appearance inspection solutions generally detect wafer appearance defects through manual visual inspection or random sampling, resulting in low defect detection efficiency and easy omission of defects such as small scratches on the wafer, resulting in inaccurate defect detection results. Summary of the invention

[0004] In view of this, an object of the present invention is to provide a wafer appearance inspection method, device and computer equipment, which can improve the inspection efficiency and accuracy of wafer appearance defect inspection.

[0005] According to one aspect of the present invention, a wafer appearance inspection method is provided, comprising: labeling defect samples of various types of wafer appearances with defect categories to obtain sample sets with labeled defect categories of various types of wafer appearances; training the sample sets with labeled defect categories of various types of wafer appearances to generate a wafer appearance defect detection model; and detecting wafer appearance defects based on the wafer appearance defect detection model.

[0006] Among them, the defect samples of various types of wafer appearance are labeled with defect categories to obtain sample sets with labeled defect categories of various types of wafer appearance, including: obtaining a preset number of wafer appearance images from a production line or a test environment, the wafer appearance images including various types of appearance defects, cleaning the wafer appearance images by removing noise, blur or repeated parts in the images, normalizing the cleaned wafer appearance images to have a uniform size and pixel value range, enhancing the diversity of the normalized wafer appearance images by rotation, scaling and flipping operations, and labeling the same group of defect samples of various types of wafer appearance with defect categories respectively by multiple rounds of cross-labeling, and comparing the consistency of the defect category labels to obtain sample sets with labeled defect categories of various types of wafer appearance.

[0007] Among them, the training of the sample set with defect annotation categories of various wafer appearances to generate a defect detection model for wafer appearance includes: inputting the sample set with defect annotation categories of various wafer appearances into a deep learning framework and a target detection model architecture for training, the deep learning framework and the target detection model architecture being able to process the sample set image data and identify the positions and types of various wafer appearance defects, training to obtain the positions and types of various wafer appearance defects in the sample set, and calculating the loss function of the positions and types of various wafer appearance defects in the sample set through forward propagation, that is, the differences between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects, and based on the loss function, adjusting the differences to the positions and types of actual defects through a back propagation algorithm until the loss function reaches stability, and generating a defect detection model for wafer appearance associated with the stable loss function.

[0008] Wherein, after detecting the wafer appearance defects according to the defect detection model of the wafer appearance, it also includes: repairing the wafer appearance defects according to the detection result of the wafer appearance defects.

[0009] Among them, the repairing of the wafer appearance defects according to the detection results of the wafer appearance defects includes: according to the detection results of the wafer appearance defects detection, the defect positions and defect types in the detection results are classified according to the defect types to locate the positions of each defect, and different repair strategies are adopted for different types of defects to simultaneously repair the wafer appearance defects.

[0010] According to another aspect of the present invention, there is provided a wafer appearance inspection device, comprising: a labeling module, a training module and a detection module; the labeling module is used to label defect samples of various types of wafer appearances with defect categories to obtain sample sets with labeled defect categories of various types of wafer appearances; the training module is used to train the sample sets with labeled defect categories of various types of wafer appearances to generate a defect detection model for wafer appearance; the detection module is used to detect wafer appearance defects according to the wafer appearance defect detection model.

[0011] Among them, the labeling module is specifically used to: obtain a preset number of wafer appearance images from a production line or a test environment, the wafer appearance images include various types of appearance defects, clean the wafer appearance images by removing noise, blur or repeated parts in the images, normalize the wafer appearance images after image cleaning so that they have a uniform size and pixel value range, enhance the diversity of the normalized wafer appearance images through rotation, scaling and flipping operations, and label the defect categories of the same group of samples of defect samples of various types of wafer appearances by multiple rounds of cross-labeling, and compare the consistency of the defect category labels to obtain a sample set with defect labeling categories of various types of wafer appearances.

[0012] Among them, the training module is specifically used to: input the sample set with defect annotation categories of various types of wafer appearance into the deep learning framework and target detection model architecture for training, the deep learning framework and target detection model architecture can process the sample set image data and identify the positions and types of various types of wafer appearance defects, train to obtain the positions and types of various types of wafer appearance defects in the sample set, and calculate the loss function of the positions and types of various types of wafer appearance defects in the sample set through forward propagation, that is, train to obtain the differences between the positions and types of various types of wafer appearance defects in the sample set and the positions and types of actual defects, and based on the loss function, adjust the differences to the positions and types of actual defects through a back propagation algorithm until the loss function reaches stability, and generate a defect detection model of wafer appearance associated with the stable loss function.

[0013] The wafer appearance inspection device further includes a repair module for repairing the wafer appearance defects according to the inspection result of the wafer appearance defects.

[0014] Among them, the repair module is specifically used to: according to the detection results of the wafer appearance defects, classify the defect positions and defect types in the detection results according to the defect types, locate the positions of each defect, and adopt different repair strategies for different types of defects to simultaneously repair the wafer appearance defects.

[0015] According to another aspect of the present invention, there is provided a computer device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute a wafer appearance inspection method as described in any one of the above.

[0016] According to another aspect of the present invention, there is provided a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, the wafer appearance inspection method as described in any one of the above is implemented.

[0017] It can be found that the above scheme can label the defect categories of defect samples of various types of wafer appearances to obtain sample sets with defect labeling categories of various types of wafer appearances, and the sample sets with defect labeling categories of various types of wafer appearances can be trained to generate a wafer appearance defect detection model, and wafer appearance defects can be detected based on the wafer appearance defect detection model, which can improve the detection efficiency and accuracy of wafer appearance defect detection.

[0018] Furthermore, the above scheme can obtain a preset number of wafer appearance images from a production line or a test environment, wherein the wafer appearance images include various types of appearance defects, and perform image cleaning on the wafer appearance images by removing noise, blur or repeated parts in the images, and perform normalization on the cleaned wafer appearance images so that they have a uniform size and pixel value range, and enhance the diversity of the normalized wafer appearance images by operations such as rotation, scaling, and flipping, and perform defect category labeling on the same group of samples of defect samples of various types of wafer appearances by using a multi-round cross-labeling method, and compare the consistency of the defect category labeling to obtain defect samples with various types of wafer appearances. The advantage of the sample set with labeled categories is that a preset number of wafer appearance images can be obtained from a production line or test environment to ensure sufficient diversity, including wafer appearance images of different sizes, different process nodes, and different lighting conditions, and the quality of wafer appearance images can be ensured through image cleaning, and the wafer appearance images are normalized to have a uniform size and pixel value range. Data enhancement of wafer appearance images helps to better generalize various types of wafer appearance images, and defect categories are labeled for the same group of defect samples of various types of wafer appearance through multiple rounds of cross-labeling, which effectively improves the accuracy of the defect labeling categories of various types of wafer appearance.

[0019] Furthermore, the above scheme can input the sample set with the defect labeling categories of various wafer appearances into the deep learning framework and target detection model architecture for training. The deep learning framework and target detection model architecture can process the sample set image data and identify the positions and types of various wafer appearance defects, and obtain the positions and types of various wafer appearance defects in the sample set through training, and calculate the loss function of the positions and types of various wafer appearance defects in the sample set through forward propagation, that is, the difference between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects, and adjust the difference to the position of the actual defect through the back propagation algorithm based on the loss function. The location and type of defects are determined until the loss function reaches stability, and a defect detection model of the wafer appearance under the stable loss function is generated. The advantage of this is that by inputting the sample set with various wafer appearance defect annotations into the deep learning framework and target detection model architecture for training, the efficiency and accuracy of wafer appearance defect detection can be significantly improved, and by accurately identifying the location and type of defects, and performing back propagation optimization based on the loss function until the loss function is stable, the generated wafer appearance defect detection model not only has a strong generalization ability, but also can quickly identify various complex defect situations in practical applications, providing quality assurance for wafer appearance defect detection, and helping to improve the detection efficiency and accuracy of wafer appearance defect detection.

[0020] Furthermore, the above scheme can repair the wafer appearance defects according to the detection results of the wafer appearance defects. The advantage of this is that by repairing these defects, the integrity and cleanliness of the wafer surface can be ensured, thereby improving the quality and reliability of the wafer.

[0021] Furthermore, the above scheme can classify the defect positions and defect types in the detection results according to the detection results of the wafer appearance defects, locate the positions of each defect, and adopt different repair strategies for different types of defects to simultaneously repair the wafer appearance defects. The advantage of this is that by adopting different repair strategies and simultaneously repairing the wafer appearance defects, the efficiency of repairing the wafer appearance defects can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 It is a schematic diagram of a process of an embodiment of a wafer appearance inspection method of the present invention;

[0024] Figure 2 It is a flow chart of another embodiment of the wafer appearance inspection method of the present invention;

[0025] Figure 3 It is a structural schematic diagram of an embodiment of a wafer appearance inspection device of the present invention;

[0026] Figure 4 It is a structural schematic diagram of another embodiment of the wafer appearance inspection device of the present invention;

[0027] Figure 5 It is a structural schematic diagram of an embodiment of a computer device of the present invention. DETAILED DESCRIPTION

[0028] The present invention will be further described in detail below in conjunction with the accompanying drawings and examples. It is particularly noted that the following examples are only used to illustrate the present invention, but are not intended to limit the scope of the present invention. Similarly, the following examples are only partial embodiments of the present invention rather than all embodiments, and all other embodiments obtained by those of ordinary skill in the art without creative work are within the scope of protection of the present invention.

[0029] The present invention provides a wafer appearance inspection method, which can improve the inspection efficiency and accuracy of wafer appearance defect inspection.

[0030] See also Figure 1 , Figure 1 FIG. 1 is a flow chart of an embodiment of a wafer appearance inspection method of the present invention. It should be noted that if there are substantially the same results, the method of the present invention is not limited to Figure 1 The process sequence shown is limited. Figure 1 As shown, the method comprises the following steps:

[0031] S101: labeling defect samples of various wafer appearances with defect categories to obtain sample sets with defect labeling categories of various wafer appearances.

[0032] The defect samples of various wafer appearances are labeled with defect categories to obtain sample sets with defect labeled categories of various wafer appearances, which may include:

[0033] A preset number of wafer appearance images are obtained from a production line or a test environment, the wafer appearance images include various types of appearance defects, the wafer appearance images are cleaned by removing noise, blur or repeated parts in the images, the wafer appearance images after image cleaning are normalized to have a uniform size and pixel value range, the diversity of the normalized wafer appearance images is enhanced by operations such as rotation, scaling, and flipping, and the same group of samples of defect samples of various types of wafer appearances are respectively labeled with defect categories by using a multi-round cross-labeling method, and the consistency of the defect category labels is compared to obtain samples with defect labeling categories of various types of wafer appearances. In this episode, the advantage is that obtaining a preset number of wafer appearance images from a production line or test environment can ensure sufficient diversity, including wafer appearance images of different sizes, different process nodes, and different lighting conditions, and ensuring the quality of wafer appearance images through image cleaning, and normalizing the wafer appearance images to have a uniform size and pixel value range. Data enhancement of wafer appearance images helps to better generalize various types of wafer appearance images, and through multiple rounds of cross-labeling, the same group of samples of defect samples of various types of wafer appearance are labeled with defect categories separately, which effectively improves the accuracy of the defect labeling categories of various types of wafer appearances.

[0034] S102: training the sample set with defect annotation categories of various wafer appearances to generate a defect detection model for wafer appearances.

[0035] The step of training the sample set with defect annotation categories of various wafer appearances to generate a defect detection model for wafer appearances may include:

[0036] The sample set with the defect labeling categories of various wafer appearances is input into the deep learning framework and target detection model architecture for training. The deep learning framework and target detection model architecture can process the sample set image data and identify the positions and types of various wafer appearance defects. The positions and types of various wafer appearance defects in the sample set are obtained through training, and the loss function of the positions and types of various wafer appearance defects in the sample set is calculated through forward propagation, that is, the difference between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects is obtained. Based on the loss function, the difference is adjusted to the positions and types of actual defects through a back propagation algorithm. The loss function is trained until it is stable, and a defect detection model of the wafer appearance under the stable loss function is generated. The advantage of this is that by inputting the sample set with various wafer appearance defect annotations into the deep learning framework and the target detection model architecture for training, the efficiency and accuracy of wafer appearance defect detection can be significantly improved, and by accurately identifying the location and type of defects, and performing back propagation optimization based on the loss function until the loss function is stable, the generated wafer appearance defect detection model not only has a strong generalization ability, but also can quickly identify various complex defect situations in practical applications, providing quality assurance for wafer appearance defect detection, and helping to improve the detection efficiency and accuracy of wafer appearance defect detection.

[0037] S103: Detecting wafer appearance defects according to the wafer appearance defect detection model.

[0038] After detecting the wafer appearance defects according to the defect detection model of the wafer appearance, the method may further include:

[0039] Based on the detection result of the wafer appearance defects, the wafer appearance defects are repaired. The benefit of this is that by repairing these defects, the integrity and cleanliness of the wafer surface can be ensured, thereby improving the quality and reliability of the wafer.

[0040] It can be found that in this embodiment, defect samples of various types of wafer appearance can be labeled with defect categories to obtain sample sets with labeled defect categories of various types of wafer appearance, and the sample sets with labeled defect categories of various types of wafer appearance can be trained to generate a wafer appearance defect detection model, and wafer appearance defects can be detected based on the wafer appearance defect detection model, which can improve the detection efficiency and accuracy of wafer appearance defect detection.

[0041] Furthermore, in the present embodiment, a preset number of wafer appearance images can be obtained from a production line or a test environment, the wafer appearance images including various types of appearance defects, and the wafer appearance images are cleaned by removing noise, blur or repeated parts in the images, and the wafer appearance images after image cleaning are normalized to have a uniform size and pixel value range, and the diversity of the normalized wafer appearance images is enhanced by operations such as rotation, scaling, and flipping, and the same group of samples of defect samples of various types of wafer appearances are respectively labeled with defect categories by using a multi-round cross-labeling method, and the consistency of the defect category labels is compared to obtain defect samples of various types of wafer appearances. The advantage of this is that a preset number of wafer appearance images can be obtained from a production line or test environment to ensure sufficient diversity, including wafer appearance images of different sizes, different process nodes, and different lighting conditions, and the quality of wafer appearance images can be ensured through image cleaning, and the wafer appearance images are normalized to have a uniform size and pixel value range. Data enhancement of wafer appearance images helps to better generalize various types of wafer appearance images, and defect categories are labeled for the same group of samples of defect samples of various types of wafer appearance through multiple rounds of cross-labeling, which effectively improves the accuracy of defect labeling categories for various types of wafer appearance.

[0042] Furthermore, in the present embodiment, the sample set with the defect labeling categories of various wafer appearances can be input into a deep learning framework and a target detection model architecture for training. The deep learning framework and the target detection model architecture can process the sample set image data and identify the positions and types of various wafer appearance defects. The positions and types of various wafer appearance defects in the sample set are obtained through training, and a loss function for calculating the positions and types of various wafer appearance defects in the sample set through forward propagation is used, that is, the differences between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects are obtained through the loss function. Based on the loss function, the differences are adjusted through a back propagation algorithm to become the actual defects. The position and type of defects are determined until the loss function reaches stability, and a defect detection model for the wafer appearance under the stable loss function is generated. The advantage of this is that by inputting the sample set with various wafer appearance defect annotations into the deep learning framework and target detection model architecture for training, the efficiency and accuracy of wafer appearance defect detection can be significantly improved, and by accurately identifying the position and type of defects, and performing back propagation optimization based on the loss function until the loss function is stable, the generated wafer appearance defect detection model not only has strong generalization capabilities, but also can quickly identify various complex defect situations in practical applications, providing quality assurance for wafer appearance defect detection, and helping to improve the detection efficiency and accuracy of wafer appearance defect detection.

[0043] See also Figure 2 , Figure 2 It is a flow chart of another embodiment of the wafer appearance inspection method of the present invention.

[0044] In this embodiment, the method includes the following steps:

[0045] S201: labeling defect samples of various wafer appearances with defect categories to obtain sample sets with labeled defect categories of various wafer appearances.

[0046] This can be as described in S101 above and will not be elaborated here.

[0047] S202: training the sample set with defect annotation categories of various wafer appearances to generate a defect detection model for wafer appearances.

[0048] This can be as described in S102 above, and will not be elaborated here.

[0049] S203: Detecting wafer appearance defects according to the wafer appearance defect detection model.

[0050] This can be as described in S103 above, and will not be elaborated here.

[0051] S204: repairing the wafer appearance defects according to the detection result of the wafer appearance defects.

[0052] Among them, repairing the wafer appearance defects according to the detection result of the wafer appearance defects may include:

[0053] According to the detection results of the wafer appearance defects, the defect positions and defect types in the detection results are classified according to the defect type to locate the position of each defect, and different repair strategies are adopted for different types of defects to simultaneously repair the wafer appearance defects. The advantage of this is that by adopting different repair strategies and simultaneously repairing the wafer appearance defects, the efficiency of repairing the wafer appearance defects can be improved.

[0054] It can be found that in this embodiment, the appearance defects of the wafer can be repaired according to the detection results of the appearance defects of the wafer. The advantage of this is that by repairing these defects, the integrity and cleanliness of the wafer surface can be ensured, thereby improving the quality and reliability of the wafer.

[0055] Furthermore, in the present embodiment, based on the detection result of the wafer appearance defect detection, the defect position and defect type in the detection result can be classified by defect type to locate each defect position, and different repair strategies can be adopted for different types of defects to simultaneously repair the wafer appearance defects. The advantage of this is that by adopting different repair strategies and simultaneously repairing the wafer appearance defects, the efficiency of repairing the wafer appearance defects can be improved.

[0056] The present invention also provides a wafer appearance inspection device, which can improve the inspection efficiency and accuracy of wafer appearance defect inspection.

[0057] See also Figure 3 , Figure 3 3 is a schematic diagram of the structure of an embodiment of a wafer appearance inspection device of the present invention. In this embodiment, the wafer appearance inspection device 30 includes a marking module 31 , a training module 32 and a detection module 33 .

[0058] The labeling module 31 is used to label defect samples of various types of wafer appearances with defect categories, and obtain a sample set with labeled defect categories of various types of wafer appearances.

[0059] The training module 32 is used to train the sample set with defect annotation categories of various wafer appearances to generate a defect detection model for wafer appearances.

[0060] The detection module 33 is used to detect wafer appearance defects according to the wafer appearance defect detection model.

[0061] Optionally, the marking module 31 may be specifically used for:

[0062] A preset number of wafer appearance images are obtained from a production line or a test environment, the wafer appearance images include various types of appearance defects, the wafer appearance images are cleaned by removing noise, blur or repeated parts in the images, the cleaned wafer appearance images are normalized to have a uniform size and pixel value range, the diversity of the normalized wafer appearance images is enhanced by operations such as rotation, scaling, and flipping, and defect categories are labeled for the same group of samples of defect samples of various types of wafer appearances by multiple rounds of cross-labeling, and the consistency of the defect category labels is compared to obtain a sample set with defect labeling categories of various types of wafer appearances.

[0063] Optionally, the training module 32 may be specifically used for:

[0064] The sample set with defect labeling categories of various wafer appearances is input into a deep learning framework and a target detection model architecture for training. The deep learning framework and the target detection model architecture are capable of processing the sample set image data and identifying the positions and types of various wafer appearance defects. The positions and types of various wafer appearance defects in the sample set are obtained through training, and a loss function for calculating the positions and types of various wafer appearance defects in the sample set through forward propagation is used, i.e., the differences between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects are obtained. Based on the loss function, the difference is adjusted to the positions and types of actual defects through a back propagation algorithm until the loss function reaches stability, thereby generating a defect detection model for wafer appearance associated with the stable loss function.

[0065] See also Figure 4 , Figure 4 4 is a schematic diagram of the structure of another embodiment of the wafer appearance inspection device of the present invention. Different from the previous embodiment, the wafer appearance inspection device 40 of this embodiment further includes a repair module 41.

[0066] The repair module 41 is used to repair the wafer appearance defects according to the detection result of the wafer appearance defects.

[0067] Optionally, the repair module 41 may be specifically used for:

[0068] According to the detection result of the wafer appearance defect detection, the defect position and defect type in the detection result are classified by defect type to locate the position of each defect, and different repair strategies are adopted for different types of defects to simultaneously repair the wafer appearance defects.

[0069] Each unit module of the wafer appearance inspection device 30 / 40 can respectively execute the corresponding steps in the above method embodiment, so each unit module will not be described in detail here. Please refer to the description of the above corresponding steps for details.

[0070] The present invention further provides a computer device, such as Figure 5 As shown, it includes: at least one processor 51; and a memory 52 that is communicatively connected to the at least one processor 51; wherein the memory 52 stores instructions that can be executed by the at least one processor 51, and the instructions are executed by the at least one processor 51 so that the at least one processor 51 can execute the above-mentioned wafer appearance inspection method.

[0071] The memory 52 and the processor 51 are connected in a bus manner, and the bus may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors 51 and the memory 52 together. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium. The data processed by the processor 51 is transmitted on a wireless medium via an antenna, and further, the antenna also receives data and transmits the data to the processor 51.

[0072] The processor 51 is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management and other control functions. The memory 52 can be used to store data used by the processor 51 when performing operations.

[0073] The present invention further provides a computer-readable storage medium storing a computer program, which implements the above method embodiment when executed by a processor.

[0074] It can be found that the above scheme can label the defect categories of defect samples of various types of wafer appearances to obtain sample sets with defect labeling categories of various types of wafer appearances, and the sample sets with defect labeling categories of various types of wafer appearances can be trained to generate a wafer appearance defect detection model, and wafer appearance defects can be detected based on the wafer appearance defect detection model, which can improve the detection efficiency and accuracy of wafer appearance defect detection.

[0075] Furthermore, the above scheme can obtain a preset number of wafer appearance images from a production line or a test environment, wherein the wafer appearance images include various types of appearance defects, and perform image cleaning on the wafer appearance images by removing noise, blur or repeated parts in the images, and perform normalization on the cleaned wafer appearance images so that they have a uniform size and pixel value range, and enhance the diversity of the normalized wafer appearance images by operations such as rotation, scaling, and flipping, and perform defect category labeling on the same group of samples of defect samples of various types of wafer appearances by using a multi-round cross-labeling method, and compare the consistency of the defect category labeling to obtain defect samples with various types of wafer appearances. The advantage of the sample set with labeled categories is that a preset number of wafer appearance images can be obtained from a production line or test environment to ensure sufficient diversity, including wafer appearance images of different sizes, different process nodes, and different lighting conditions, and the quality of wafer appearance images can be ensured through image cleaning, and the wafer appearance images are normalized to have a uniform size and pixel value range. Data enhancement of wafer appearance images helps to better generalize various types of wafer appearance images, and defect categories are labeled for the same group of defect samples of various types of wafer appearance through multiple rounds of cross-labeling, which effectively improves the accuracy of the defect labeling categories of various types of wafer appearance.

[0076] Furthermore, the above scheme can input the sample set with the defect labeling categories of various wafer appearances into the deep learning framework and target detection model architecture for training. The deep learning framework and target detection model architecture can process the sample set image data and identify the positions and types of various wafer appearance defects, and obtain the positions and types of various wafer appearance defects in the sample set through training, and calculate the loss function of the positions and types of various wafer appearance defects in the sample set through forward propagation, that is, the difference between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects, and adjust the difference to the position of the actual defect through the back propagation algorithm based on the loss function. The location and type of defects are determined until the loss function reaches stability, and a defect detection model of the wafer appearance under the stable loss function is generated. The advantage of this is that by inputting the sample set with various wafer appearance defect annotations into the deep learning framework and target detection model architecture for training, the efficiency and accuracy of wafer appearance defect detection can be significantly improved, and by accurately identifying the location and type of defects, and performing back propagation optimization based on the loss function until the loss function is stable, the generated wafer appearance defect detection model not only has a strong generalization ability, but also can quickly identify various complex defect situations in practical applications, providing quality assurance for wafer appearance defect detection, and helping to improve the detection efficiency and accuracy of wafer appearance defect detection.

[0077] Furthermore, the above scheme can repair the wafer appearance defects according to the detection results of the wafer appearance defects. The advantage of this is that by repairing these defects, the integrity and cleanliness of the wafer surface can be ensured, thereby improving the quality and reliability of the wafer.

[0078] Furthermore, the above scheme can classify the defect positions and defect types in the detection results according to the detection results of the wafer appearance defects, locate the positions of each defect, and adopt different repair strategies for different types of defects to simultaneously repair the wafer appearance defects. The advantage of this is that by adopting different repair strategies and simultaneously repairing the wafer appearance defects, the efficiency of repairing the wafer appearance defects can be improved.

[0079] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device implementation described above is only schematic, for example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0080] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0081] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0082] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0083] The above descriptions are only some embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Any equivalent device or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A wafer appearance inspection method, characterized in that: include: Labeling defect samples of various wafer appearances with defect categories to obtain sample sets with defect labeling categories of various wafer appearances; Training the sample set with defect annotation categories of various wafer appearances to generate a defect detection model for wafer appearance; According to the wafer appearance defect detection model, wafer appearance defects are detected.

2. The wafer appearance inspection method according to claim 1, characterized in that: The defect samples of various wafer appearances are labeled with defect categories to obtain a sample set with defect labeling categories of various wafer appearances, including: A preset number of wafer appearance images are obtained from a production line or a test environment, wherein the wafer appearance images include various types of appearance defects, and the wafer appearance images are cleaned by removing noise, blur or repeated parts in the images, and the wafer appearance images after image cleaning are normalized to have a uniform size and pixel value range, and the diversity of the normalized wafer appearance images is enhanced by rotation, scaling and flipping operations, and the same group of samples of defect samples of various types of wafer appearance are respectively labeled with defect categories by using a multi-round cross-labeling method, and the consistency of the defect category labels is compared to obtain a sample set with defect labeling categories of various types of wafer appearances.

3. The wafer appearance inspection method according to claim 1, characterized in that: The training of the sample set with defect labeling categories of various wafer appearances to generate a defect detection model for wafer appearances includes: The sample set with defect labeling categories of various wafer appearances is input into a deep learning framework and a target detection model architecture for training. The deep learning framework and the target detection model architecture are capable of processing the sample set image data and identifying the positions and types of various wafer appearance defects. The positions and types of various wafer appearance defects in the sample set are obtained through training, and a loss function for calculating the positions and types of various wafer appearance defects in the sample set through forward propagation is used, i.e., the differences between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects are obtained. Based on the loss function, the differences are adjusted to the positions and types of actual defects through a back propagation algorithm until the loss function reaches stability, thereby generating a defect detection model for wafer appearance associated with the stable loss function.

4. The wafer appearance inspection method according to claim 1, characterized in that: After detecting the wafer appearance defects according to the defect detection model of the wafer appearance, the method further includes: The wafer appearance defects are repaired according to the detection result of the wafer appearance defects.

5. The wafer appearance inspection method according to claim 1, characterized in that: The method of repairing the wafer appearance defects according to the detection result of the wafer appearance defects includes: According to the detection results of the wafer appearance defects, the defect positions and defect types in the detection results are classified into defect types to locate the positions of each defect, and different repair strategies are adopted for different types of defects to simultaneously repair the wafer appearance defects.

6. A wafer appearance inspection device, characterized in that: include: Labeling module, training module and detection module; The labeling module is used to label defect samples of various wafer appearances with defect categories to obtain a sample set with defect labeling categories of various wafer appearances; The training module is used to train the sample set with defect annotation categories of various wafer appearances to generate a defect detection model for wafer appearance; The detection module is used to detect wafer appearance defects according to the wafer appearance defect detection model.

7. The wafer appearance inspection device according to claim 6, characterized in that: The annotation module is specifically used for: A preset number of wafer appearance images are obtained from a production line or a test environment, wherein the wafer appearance images include various types of appearance defects, and the wafer appearance images are cleaned by removing noise, blur or repeated parts in the images, and the wafer appearance images after image cleaning are normalized to have a uniform size and pixel value range, and the diversity of the normalized wafer appearance images is enhanced by rotation, scaling and flipping operations, and the same group of samples of defect samples of various types of wafer appearance are respectively labeled with defect categories by using a multi-round cross-labeling method, and the consistency of the defect category labels is compared to obtain a sample set with defect labeling categories of various types of wafer appearances.

8. The wafer appearance inspection device according to claim 6, characterized in that: The training module is specifically used for: The sample set with defect labeling categories of various wafer appearances is input into a deep learning framework and a target detection model architecture for training. The deep learning framework and the target detection model architecture are capable of processing the sample set image data and identifying the positions and types of various wafer appearance defects. The positions and types of various wafer appearance defects in the sample set are obtained through training, and a loss function for calculating the positions and types of various wafer appearance defects in the sample set through forward propagation is used, i.e., the differences between the positions and types of various wafer appearance defects in the sample set obtained through training and the positions and types of actual defects are obtained. Based on the loss function, the differences are adjusted to the positions and types of actual defects through a back propagation algorithm until the loss function reaches stability, thereby generating a defect detection model for wafer appearance associated with the stable loss function.

9. A computer device, characterized in that: include: at least one processor; And, a memory communicatively connected to at least one processor; wherein the memory stores instructions executable by at least one processor, and the instructions are executed by at least one processor so that at least one processor can execute the wafer appearance inspection method as described in any one of claims 1 to 5.

10. A computer-readable storage medium, characterized in that: A computer program is stored, and when the computer program is executed by a processor, the wafer appearance inspection method according to any one of claims 1 to 5 is implemented.

Citation Information

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