The interconnection structure and production method of high -depth and width ratio

A technology of interconnection structure and fabrication method, applied in semiconductor/solid-state device manufacturing, electrical components, electric-solid-state devices, etc., can solve the problems of inability to effectively adapt to the three-dimensional packaging interconnection structure, difficult aspect ratio of the interconnection structure, etc. The effect of reducing processing costs, simple process steps, and simple and compact structure

Active Publication Date: 2015-10-14
NAT CENT FOR ADVANCED PACKAGING CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the aspect ratio of the existing interconnect structure is difficult to meet the requirements of practical applications, and cannot effectively adapt to the interconnect structure of three-dimensional packaging.

Method used

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  • The interconnection structure and production method of high -depth and width ratio
  • The interconnection structure and production method of high -depth and width ratio
  • The interconnection structure and production method of high -depth and width ratio

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Embodiment Construction

[0059] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0060] Such as figure 1 and Figure 16 Shown: in order to obtain a higher aspect ratio and improve the adaptability of the interconnection structure, the present invention includes a substrate 1, the substrate 1 has a first main surface and a second main surface corresponding to the first main surface ; The substrate 1 is provided with a number of through holes; a first barrier layer 8 is deposited on the first main surface of the substrate 1, and a second barrier layer is deposited on the second main surface of the substrate 1 18: The first barrier layer 8 covers the first main surface of the substrate 1 and covers the sidewall of the upper part of the through hole, and the second barrier layer 18 covers the second main surface of the substrate 1 and covers the lower part of the through hole sidewall, the first barrier layer 8 is in contact with the second b...

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Abstract

The invention relates to high-depth-to-width-ratio via interconnecting structure and a production method. The high-depth-to-width-ratio via interconnecting structure comprises a substrate. A plurality of vias are arranged in the substrate. A first barrier layer is deposited on the first main surface of the substrate. A second barrier layer is deposited on the second main surface of the substrate. The first barrier layer and the second barrier layer are in contact with each other. The first barrier layer partitions the vias into upper filling grooves and lower filling grooves corresponding to the upper filling grooves. The upper filling grooves are isolated from the lower filling grooves through the first barrier layer. First metal filling bodies are filled in the upper filling grooves. Second metal filling bodies are filled in the lower filling grooves. The first metal filling bodies are electrically connected with the second metal filling bodies through the first barrier layer and the second barrier layer. The first metal filling bodies, the second metal filling bodies, the first barrier layer and the second barrier layer are connected with the substrate in an insulated way. The high-depth-to-width-ratio via interconnecting structure and the production method have the advantages that the structure is simple and compact, the depth-to-width ratio of the vias of the interconnecting structure is improved, the cost is reduced, the process steps are simple and the safety and the reliability are high.

Description

technical field [0001] The invention relates to an interconnection structure and a manufacturing method, in particular to an interconnection structure and a manufacturing method of through holes with a high aspect ratio, and belongs to the technical field of microelectronic packaging. Background technique [0002] With the development of people's requirements for electronic products in the direction of miniaturization, multi-function, and environmental protection, people strive to make electronic systems smaller and smaller, with higher integration and more functions. , resulting in many new technologies, new materials and new designs, among which stacked chip packaging technology and system-in-package (System-in-Package, SiP) technology are typical representatives of these technologies. [0003] Three-dimensional packaging technology refers to the packaging technology that stacks more than two chips in the same package in the vertical direction without changing the size of ...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H01L23/48H01L21/768
Inventor于大全姜峰
OwnerNAT CENT FOR ADVANCED PACKAGING CO LTD