A 2/3 dual-mode prescaler with high speed and low power consumption

A dual-mode prescaler and low power consumption technology, which is applied in the direction of automatic power control, pulse counter, counting chain pulse counter, etc., can solve the problems of high power consumption and low working speed, and avoid the action of charging and discharging , Improve the working speed and save the power consumption of the circuit

Active Publication Date: 2018-06-01
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Purpose of the invention: In order to overcome the deficiencies in the prior art, the present invention provides a high-speed and low-power 2 / 3 dual-mode prescaler to solve the problems of low operating speed and high power consumption of traditional dual-mode prescalers

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  • A 2/3 dual-mode prescaler with high speed and low power consumption
  • A 2/3 dual-mode prescaler with high speed and low power consumption
  • A 2/3 dual-mode prescaler with high speed and low power consumption

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Embodiment Construction

[0037] The present invention will be further described below in conjunction with the accompanying drawings.

[0038] Such as figure 1 Shown is a high-speed low-power 2 / 3 dual-mode prescaler, including two D flip-flops, respectively marked as flip-flop DFF1 and flip-flop DFF2, the working state of flip-flop DFF1 is controlled by the frequency division mode control signal MC control, the first stage of the flip-flop DFF2 adopts the E-TSPC circuit with dynamic floating input to increase the circuit speed, and the second and third stages adopt the dynamic D latch of the TSPC structure to further reduce power consumption; when MC=1 When MC=0, flip-flop DFF1 does not work, flip-flop DFF2 works normally, and the 2 / 3 dual-mode prescaler works in 2-frequency division mode; when MC=0, flip-flop DFF1 works normally, flip-flop DFF2 works normally, 2 / 3 3 The dual-mode prescaler works in divide-by-three mode. The present invention embeds logic circuits (such as NOR gates) outside the orig...

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Abstract

The invention discloses a 2 / 3 dual-mode prescaler with high speed and low power consumption, which includes two D flip-flops, which are respectively marked as flip-flop DFF1 and flip-flop DFF2, and the working state of flip-flop DFF1 is controlled by the frequency division mode Signal MC control, the first stage of flip-flop DFF2 adopts E-TSPC circuit with dynamic floating input to improve circuit speed, and the second and third stages adopt dynamic D latch with TSPC structure to further reduce power consumption; when MC= When 1, flip-flop DFF1 does not work, flip-flop DFF2 works normally, and the 2 / 3 dual-mode prescaler works in 2 frequency division mode; when MC=0, flip-flop DFF1 works normally, flip-flop DFF2 works normally, 2 The / 3 dual-mode prescaler operates in divide-by-three mode. The invention has simple circuit structure, small jitter of the output frequency division signal, high working frequency and wide frequency division range.

Description

technical field [0001] The invention relates to integrated circuit technology, in particular to the design technology of a high-speed and low-power frequency divider, specifically a high-speed and low-power 2 / 3 dual-mode prescaler. Background technique [0002] The frequency divider is located in the feedback loop of the phase-locked loop. Its function is to divide the high-frequency signal output by the oscillator to a lower frequency with a specified frequency division multiple, and compare it with the reference clock. The programmable frequency divider is the most widely used frequency division circuit, which consists of a dual-mode prescaler, a programmable counter, a swallow counter and a control logic circuit. The dual-mode prescaler selects N or N+1 frequency division according to the frequency division mode control signal. Since the prescaler is the circuit with the highest operating frequency in the phase-locked loop, it is also one of the sub-circuits with the larg...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03L7/18H03K23/64
Inventor 吴建辉程康张文通陈超黄成李红
Owner SOUTHEAST UNIV
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