Multistage scheduling method and device, network chip and storage medium

A technology of a network chip and a scheduling method, applied in the directions of multi-programming devices, program startup/switching, etc., can solve problems such as inability to realize and difficult

Active Publication Date: 2019-06-04
SUZHOU CENTEC COMM CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In the case of a large number of scheduling levels, it may become very difficult or impossible to complete the preselection within a predetermined number of clock cycles

Method used

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  • Multistage scheduling method and device, network chip and storage medium
  • Multistage scheduling method and device, network chip and storage medium
  • Multistage scheduling method and device, network chip and storage medium

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Embodiment Construction

[0017] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the specific technical solutions of the present application will be further described in detail below in conjunction with the drawings in the embodiments of the present application. The following examples are used to illustrate the present application, but not to limit the scope of the present application.

[0018] figure 1 It is a schematic diagram of the three-level scheduling QoS mapping relationship in related technologies, such as figure 1 As shown, the number of members of the first-level scheduling 11 is N, the number of members of the second-level scheduling 12 is M, and the number of members of the third-level scheduling 13 is L, and each member of each level of scheduling will have X priorities Child nodes (subordinate nodes). The number of data streams in the device is K. There is a certain mapping relationship between data streams and ad...

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Abstract

The embodiment of the invention discloses a multi-level scheduling method and device, a network chip and a storage medium. The method is applied to a network chip, the network chip comprises at leasttwo dispatchers of different levels, each dispatcher of different levels corresponds to at least one node used for data transmission, and the method comprises the steps of obtaining a dequeue dispatching request, and analyzing the number of the node of the level from the dequeue dispatching request; According to the dequeue scheduling request or the serial number of the node of the current level,determining the serial number of the node of the upper level and the priority serial number of the node of the upper level; Determining enqueue information needing to be scheduled from a preset firstmemory according to the number of the node of the current level; And according to the enqueue information needing to be scheduled, the number of the upper-level node and the priority number of the upper-level node, generating dequeue information.

Description

technical field [0001] The embodiment of the present application relates to computer network communication technology, and relates to but not limited to a multi-level scheduling method, device, network chip and storage medium. Background technique [0002] In high-density network chips, in order to provide better services for specified network communications or specific services, it is necessary to introduce a Quality of Service (QoS) mechanism. Microprocessor for data logic (including sound and video). [0003] When network congestion occurs, all data flows may be discarded, and devices supporting QoS can assign different levels of transmission priority to certain types of data flows to identify their relative importance. It can provide corresponding transmission services for data streams in combination with the forwarding strategy of the QoS mechanism, congestion avoidance and other mechanisms. [0004] Since the network chip has certain requirements on the port bandwidt...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48
CPCG06F9/48
Inventor 徐子轩夏杰龚源泉
Owner SUZHOU CENTEC COMM CO LTD
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