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pcie path configuration method, device, terminal and medium

A technology of access and storage media, applied in the computer field, can solve the problems that PCIE graphics cards cannot be used in the system, reduce maintenance difficulty and cost, reduce the number of firmware, and improve the success rate

Active Publication Date: 2022-04-15
CHANGSHA JINGJIA MICROELECTRONICS +1
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Problems solved by technology

[0005] In the embodiment of the present application, a PCIE channel configuration method, device, terminal and medium are provided, which are used to overcome the problem that some types of PCIE graphics cards cannot be connected in the corresponding PCIE slot due to the fixed configuration of a class of corresponding PCIE slot lanes in the related art. Lower slots and corresponding system usage issues

Method used

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  • pcie path configuration method, device, terminal and medium
  • pcie path configuration method, device, terminal and medium
  • pcie path configuration method, device, terminal and medium

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Embodiment Construction

[0023] In order to make the technical solutions and advantages in the embodiments of the present application clearer, the exemplary embodiments of the present application will be further described in detail below in conjunction with the accompanying drawings. Apparently, the described embodiments are only part of the embodiments of the present application, and Not an exhaustive list of all embodiments. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0024] In related technologies, PCIE graphics cards and PCIE slots are upwardly compatible; for example, x1 PCIE graphics cards can be used on all PCIE slots, and x2 PCIE graphics cards can be used on PCIE slots corresponding to x1. And so on. On the contrary, the PCIE slot and the graphics card firmware are backward compatible; for example, the x1 PCIE slot can only use the x1 version of the graphics card firmwar...

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Abstract

The embodiment of the present application provides a PCIE path configuration method, device, terminal, and medium, which relate to computer technology and are used to overcome the related art that a type of graphics card firmware only fixedly configures a type of lane corresponding to a type of PCIE slot, resulting in some types of PCIE The graphics card cannot be used in the lower slot and the corresponding system. The method includes: configuring the PCIE path of the current PCIE slot as the first type of path by the graphics card firmware; when determining that the PCIE graphics card installed in the current PCIE slot is unsuccessfully connected, controlling the PCIE control by the graphics card firmware The device is reset and the PCIE path is configured as a second type of path; wherein, the number of channels of the second type of path is smaller than the number of channels of the first type of path.

Description

technical field [0001] The present application relates to computer technology, in particular to a PCIE channel configuration method, device, terminal and medium. Background technique [0002] PCIE (peripheral component interconnect express, high-speed serial computer expansion bus) graphics cards are suitable for PCIE slots on embedded and desktop system platforms. Since there are different types of PCIE slots, there are also different types of PCIE graphics cards. PCIE slots are divided into x1, x2, x4, x8 and other types according to the number of lanes; corresponding PCIE graphics cards are also divided into x1, x2, x4, x8, and the types of graphics card firmware of PCIE graphics cards are also divided into x1, x2, x4, x8 version. [0003] In related technologies, PCIE graphics cards and PCIE slots are upwardly compatible; for example, x1 PCIE graphics cards can be used on all PCIE slots, and x2 PCIE graphics cards can be used on PCIE slots corresponding to x1. And so ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/40G06F13/42
CPCG06F13/4068G06F13/4282G06F2213/0026
Inventor 谢新立
Owner CHANGSHA JINGJIA MICROELECTRONICS
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