Integrated circuit with DMA module for loading portions of code to a code memory for execution by a host processor that controls a video decoder
a technology of code memory and integrated circuit, which is applied in the direction of program control, computation using denominational number representation, instruments, etc., can solve the problems of increasing the size increasing the cost of the code memory of the processor, and inefficient use of chip real esta
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[0017]Referring now to FIG. 1, there is illustrated a flow diagram for executing a program in accordance with an embodiment of the present invention. The program is a sequence of instructions that can be divided into two or more portions. Initially, the first portion of the program is available for execution.
[0018]Execution of the program is commenced at 105 by reading instructions from the first portion of the program until the next portion of the program (not present in the code memory) is required. When the next portion of the program to be executed is not in the code memory, processor instructs the DMA to fetch that portion and a WAIT instruction is executed at 115 which halts reading of instructions in the program until the another portion of the program is available for execution at 120. When the another portion of the program is available for execution at 120, the processor begins executing the another portion of the program by repeating 105-120.
[0019]Referring now to FIG. 2,...
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