Vertical semiconductor device, dram device including the same

Abstract

A vertical semiconductor device, a DRAM device, and associated methods, the vertical semiconductor device including single crystalline active bodies vertically disposed on an upper surface of a single crystalline substrate, each of the single crystalline active bodies having a first active portion on the substrate and a second active portion on the first active portion, and the first active portion having a first width smaller than a second width of the second active portion, a gate insulating layer on a sidewall of the first active portion and the upper surface of the substrate, a gate electrode on the gate insulating layer, the gate electrode having a linear shape surrounding the active bodies, a first impurity region in the upper surface of the substrate under the active bodies, and a second impurity region in the second active portion.

Description

BACKGROUND[0001]1. Field[0002]Embodiments relate to a vertical semiconductor device, a DRAM device including the same, and associated methods.[0003]2. Description of the Related Art[0004]As semiconductor devices have become highly integrated, a gate length of a MOS transistor in the semiconductor device may gradually decrease. Thus, it may be desirable that the MOS transistor have a three-dimensional structure.[0005]For example, in order to increase an integration degree of a semiconductor device, cell transistors of a unit chip may include vertical pillar transistors having a channel direction extending substantially vertically from an upper surface of a semiconductor substrate. The vertical pillar transistor may have a relatively smaller horizontal area and a relatively longer channel length when compared to those of a planar transistor. However, because the vertical pillar transistor may require complicated manufacturing processes, it may be difficult to produce the vertical pill...

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