Charge recycling a 1 of n ndl gate with a time varying power supply

a technology of time-varying power supply and charge recycling, which is applied in the direction of pulse technique, logic circuit, instruments, etc., can solve the problems of no more efficient adiabatic discharging process than the conventional discharging method, and ordinary power supplies are incapable of dealing with the charge returned

Inactive Publication Date: 2013-06-06
APPLE INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

Significantly reduces energy dissipation by recycling energy during adiabatic discharging, maintaining low power consumption and efficient energy use in subsequent cycles.

Problems solved by technology

Ordinary power supplies are incapable of dealing with the charge returned during an adiabatic discharge as it is usually dissipated to ground through a shunt impedance.
This limitation renders the adiabatic discharging process no more efficient than the conventional discharging method.

Method used

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  • Charge recycling a 1 of n ndl gate with a time varying power supply
  • Charge recycling a 1 of n ndl gate with a time varying power supply
  • Charge recycling a 1 of n ndl gate with a time varying power supply

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Embodiment Construction

[0039]This disclosure describes a method and apparatus for charge recycling a 1 of N NDL gate with a time varying power supply. This disclosure describes numerous specific details in order to provide a thorough understanding of the present disclosure. One skilled in the art will appreciate that one may practice aspects of the present disclosure without these specific details. Additionally, to facilitate exposition, this disclosure does not describe some well known items in detail.

[0040]The Basic Charge Recycling NDL Gate

[0041]In order to take advantage of the adiabatic charging and discharging processes described above, two circuit technologies are necessary. The first of these technologies is the logic gate itself.

[0042]Several different logic families have been developed to enable the charging and discharging processes described above. Each of these families have drawbacks ranging from requiring complete differential logic to low noise margin. A new logic family derived from a 1-o...

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Abstract

This disclosure describes a time varying power supply that may include a resonator circuit comprising an inductor having first and second terminals, a first capacitor coupled to the first terminal, and a second capacitor coupled to the second terminal, where the first capacitor produces a first time varying power supply output and wherein the second capacitor produces a second time varying power supply output. The time varying power supply may further include an exciter circuit comprising a first PFET and a first NFET coupled to the first terminal and a second PFET and a second NFET coupled to the second terminal. The first and second PFETs and the first and second NFETs may be coupled to a corresponding one of four non-overlapping clock phases.

Description

PRIORITY CLAIM[0001]This application is a continuation of U.S. patent application Ser. No. 12 / 743,689, entitled “Charge Recycling a 1 of N NDL Gate with a Time Varying Power Supply,” filed May 19 2010, which is a National Stage application of International Application number PCT / US08 / 83962, filed Nov. 19, 2008, which claims priority to U.S. Provisional Application Ser. No. 60 / 989,009, filed Nov. 19, 2007, each of which is hereby incorporated by reference in its entirety as though fully and completely set forth herein.TECHNICAL FIELD[0002]This disclosure relates to charge recycling with power supplies. More specifically, this disclosure relates to charge recycling a 1 of N NDL gate with a time varying power supply.BACKGROUND ART[0003]Charge recycling and adiabatic charging are two circuit technologies that can be employed to reduce the energy dissipated by an integrated circuit. These techniques are particularly useful in charging and discharging large capacitive loads or where the c...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): G05F3/02
CPCG05F3/02H03K19/0019H03K19/094H03K19/20
InventorRUNAS, MICHAEL E.SENINGEN, MICHAEL R.
OwnerAPPLE INC