Non-volatile memory (NVM) with dynamically adjusted reference current

a reference current and non-volatile memory technology, applied in static storage, digital storage, instruments, etc., can solve the problems of affecting the electrical operating characteristics of the nvm cell, making the program and erase state more difficult to achiev

Active Publication Date: 2015-03-26
NXP USA INC
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  • Summary
  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text discusses a system for programming and erasing non-volatile memories (NVMs) that can reduce the detrimental effects on the lifetime of the NVM caused by excessive programming and erase cycles. The system includes a bus, an NVM controller, voltage blocks, decoders, and an NVM cell array. The system also includes a reference current generator and a temperature sensor. The technical effect of the patent text is to provide a system that can program and erase NVMs with reduced effects on their lifetime.

Problems solved by technology

Further these operations tend to alter the electrical operating characteristics of the NVM cells.
The programmed and erased states become more difficult to achieve after excessive programming and erase cycles.

Method used

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  • Non-volatile memory (NVM) with dynamically adjusted reference current
  • Non-volatile memory (NVM) with dynamically adjusted reference current
  • Non-volatile memory (NVM) with dynamically adjusted reference current

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Embodiment Construction

[0013]A non-volatile memory (NVM) has circuitry that provides for altering a reference current used in determining if a program state has been achieved and a reference current used in determining if an erase state has been achieved. These two reference currents can be the same. An NVM array is typically partitioned into a number of blocks where an NVM block is the minimum unit for erase operation. The reference current may be adjusted for each NVM block since different NVM blocks may have different cycling performance and data retention requirement. The number of pulses required for the particular program / erase operation in term of each block is counted. If the count is excessive for a particular block, an adjustment to the reference current supplied to that block by a current reference, which is part of a sense amplifier, is made. The adjustment takes into account the temperature, while reference currents for other blocks will be kept unchanged. The adjustment is small enough to re...

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Abstract

A sense amplifier is configured to sense a current from a selected bit cell of a non-volatile memory array and compare the sensed current to a reference current to determine a logic state stored in the bit cell. A controller is configured to perform a program / erase operation on at least a portion of the memory array to change a logic state of at least one bit cell of the portion of the memory array; determine a number of program / erase pulses applied to the at least one bit cell during the program / erase operation to achieve the change in logic state; and when the number of program / erase pulses exceeds a pulse count threshold, adjust the reference current of the sense amplifier for a subsequent program / erase operation.

Description

BACKGROUND[0001]1. Field[0002]This disclosure relates generally to non-volatile memories (NVMs), and more specifically, to programming and erasing NVM cells.[0003]2. Related Art[0004]Non-volatile memories (NVMs) typically require operations for programming and erasing in NVM applications. Further these operations tend to alter the electrical operating characteristics of the NVM cells. The lifetime of an NVM is partially based on the number of these cycles that are performed. The change in operating characteristics is gradual but continuous depending on the number of cycles and operating temperature. The programmed and erased states become more difficult to achieve after excessive programming and erase cycles. The lifetime of the NVM is affected by the number of program / erase cycles. Much activity has been involved in attempting to improve on this situation.[0005]Accordingly there is a need to provide program / erase operations with reduced detrimental effects on lifetime of an NVM.BRI...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): G11C7/08
CPCG11C7/08G11C7/14G11C16/14G11C16/28G11C16/3459G11C16/349
InventorMU, FUCHENHE, CHENWANG, YANZHUO
OwnerNXP USA INC