Patterned structure of semiconductor device

a semiconductor device and pattern technology, applied in the direction of semiconductor devices, electrical devices, transistors, etc., can solve the problems of restricting the applicability of sit techniques, methods have limitations and drawbacks, etc., and achieve the effect of further improving the application of pattern transfer techniques

Inactive Publication Date: 2015-06-25
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The method allows for the creation of patterned structures with varying widths, enhancing the applicability of SIT and increasing the static noise margin (SNM) in SRAM by enabling the formation of spacers with sub-lithographic features, thereby improving the performance of semiconductor devices.

Problems solved by technology

However, this method has it limits and drawbacks, such as all of the spacers can only have the same width.
This phenomenon will restrict the applicability of the SIT technique.

Method used

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  • Patterned structure of semiconductor device
  • Patterned structure of semiconductor device
  • Patterned structure of semiconductor device

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Embodiment Construction

[0021]In the following description, numerous specific details are given to provide a thorough understanding of the invention. It will, however, be apparent to one skilled in the art that the invention may be practiced without these specific details. Furthermore, some well-known system configurations and process steps are not disclosed in detail, as these should be well-known to those skilled in the art.

[0022]Likewise, the drawings showing embodiments of the apparatus are not to scale and some dimensions are exaggerated for clarity of presentation. Also, where multiple embodiments are disclosed and described as having some features in common, like or similar features will usually be described with same reference numerals for ease of illustration and description thereof.

[0023]Please refer to FIGS. 1-6 accompanied with FIG. 11 (A). FIGS. 1-6 are schematic, top view and cross-sectional diagrams showing a method for fabricating a patterned structure of a semiconductor device according to...

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Abstract

A patterned structure of a semiconductor device includes a substrate, at least a first patterned structure, and at least a second patterned structure. The first patterned structure is a single-layered structure, and the second patterned structure is a multi-layered structure. The width of the second patterned structure is greater than the width of the first patterned structure.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]The application is a division of U.S. application Ser. No. 13 / 417,299, filed on Mar. 11, 2012, the disclosure of which is hereby incorporated herein by reference in its entirety.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates generally to the field of patterned structures of semiconductor devices, and more particularly, to a patterned structure with sub-lithographic features.[0004]2. Description of the Prior Art[0005]With the trend in the industry being towards scaling down the size of metal oxide semiconductor transistors (MOS), three-dimensional or non-planar transistor technology, such as fin field effect transistor technology (Fin FET) has been developed to replace planar MOS transistors. In current techniques, in order to meet the sub-lithographic features, a regular photolithography and an etching process accompanied with a pull back process are provided to form fin structures in the Fin...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L27/11H01L21/28H01L21/3213H10B10/00
CPCH01L27/11H01L21/28123H01L21/3213H01L21/0338H01L21/823431H01L21/845H01L21/0337H10B10/00
InventorWANG, CHIH-JUNGCHEN, TONG-YU
OwnerUNITED MICROELECTRONICS CORP