A signal generator and signal generating method for continuous long wave recording playback power source

Abstract

The present invention proposes a signal generator and a signal generation method for a continuous long wave recording and playback power source, including: a controller, a first segmented digital-to-analog conversion unit and a second segmented digital-to-analog conversion unit; the controller receives the analyzed wave recording data and stores the data in blocks according to a certain order, and at the same time sends the stored data to a data interface according to a certain order, and uses the data interface to output voltage and current output signals to the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit respectively; the controller continuously and cyclically transmits data to realize continuous wave recording and playback. The present invention can realize the generation of long-term, non-periodic signals, and the duration of wave recording and playback can be easily extended, and the theoretical duration is unlimited.

Description

Technical Field

[0001] The invention belongs to the technical field of signal generation and processing, and in particular relates to a signal generator for a continuous long-wave recording and playback power source and a signal generation method. Background Art

[0002] The statements in this section merely provide background information related to the present invention and do not necessarily constitute prior art.

[0003] With the development of electric power technology, electricity loads have become complex and diverse, requiring electricity meters to accurately measure the electricity of various commonly used electricity load waveforms.

[0004] At present, the electric energy comparison method is used for the measurement and detection of electric energy meters, which requires a high-precision standard power source. The standard power source can be used to achieve long-term and high-precision playback of the recorded waveform of the on-site load, and realize the electric energy metering verification and research under various household load waveforms. To achieve a long-term continuous and high-precision on-site recording and playback power source, first of all, a long-term and high-precision continuous recording signal generator is required. The second is a power amplifier with wide bandwidth and high precision.

[0005] At present, the signal generator for power source uses a single-chip microcomputer + single DA generator + filter. Due to the limited data processing capability of the single-chip microcomputer, the number of fitting signal points of the signal generator is relatively small, generally 3600 points at the industrial frequency, and the signal distortion is large. The DA used is generally a 16-bit DAC with low signal resolution. It needs to be matched with a corresponding filter, and it is difficult to output wide-frequency and fast-changing signals. It can only achieve the generation of periodic signals, and cannot complete the generation of long-term, non-periodic continuous recording signals.

[0006] In the prior art, there is also a mode of using DSP+dual DA. The dual DA expands the number of bits of the signal. The dual DA uses 16-bit DAC, which can theoretically achieve a signal resolution of 32 bits. However, in fact, the dual DA signal is generated in a way that one DAC controls the amplitude signal and the other DAC controls the waveform signal. The actual amplitude resolution of the signal is still up to 16 bits. It does not increase the highest resolution of the signal, and the problem of low signal amplitude resolution still exists. Compared with a single 16-bit DA, only another 16-bit waveform signal DAC is used to ensure the resolution of the waveform DAC when the amplitude of the output signal is adjusted over a wide range. However, it is necessary to add a DAC, and its volume and cost are increased. The dual DA uses two DAs in series to achieve DA expansion. When the DA is connected in series, it needs to pass through an op amp follower first, and cannot be directly connected in series.

[0007] Therefore, the nonlinearity of the two DAs and the nonlinearity of the operational amplifier will be superimposed, resulting in the deterioration of the linearity of the signal generator. At the same time, only the generation of periodic signals can be achieved, and the generation of long-term, non-periodic continuous recording signals cannot be completed. Summary of the invention

[0008] In order to overcome the deficiencies of the above-mentioned prior art, the present invention provides a signal generator for a continuous long recording and playback power source, which can realize the generation of long-term, non-periodic signals, and the recording and playback time can be easily extended, with no theoretical time limit.

[0009] To achieve the above objectives, one or more embodiments of the present invention provide the following technical solutions:

[0010] In a first aspect, a signal generator for a continuous long wave recording playback power source is disclosed, comprising:

[0011] A controller, a first segmented digital-to-analog conversion unit, and a second segmented digital-to-analog conversion unit;

[0012] The controller receives the analyzed recorded data and stores the data in blocks according to a certain order, and at the same time sends the stored data to the data interface according to a certain order, and uses the data interface to output the voltage and current output signals to the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit respectively;

[0013] The controller transmits data in a continuous cycle to achieve continuous recording and playback.

[0014] A further technical solution further includes a first operational amplifier follower, a second operational amplifier follower, a voltage signal terminal and a current signal terminal;

[0015] The first operational amplifier follower is connected to the first segmented digital-to-analog conversion unit, the second operational amplifier follower is connected to the second segmented digital-to-analog conversion unit, the voltage signal terminal is connected to the first operational amplifier follower, and the current signal terminal is connected to the second operational amplifier follower;

[0016] The output signal of the first segmented digital-to-analog conversion unit is buffered and outputted by the first operational amplifier follower, and then outputted from the voltage signal terminal;

[0017] The output signal of the second segmented digital-to-analog conversion unit is buffered and outputted by the second operational amplifier follower, and then outputted from the current signal terminal.

[0018] According to a further technical solution, the controller is a DSP controller, and the DSP controller is connected to an external device via an Ethernet port;

[0019] The DSP controller includes at least three data storage blocks, namely a first data storage block, a second data storage block and a third data storage block;

[0020] All data storage blocks are connected to the interface through transmission channels.

[0021] A further technical solution is that the Ethernet port adopts a 100M Ethernet port, and the 100M Ethernet port transmits the recorded data to the DSP controller with low latency, so as to meet the high fitting point requirement of the recorded playback from data transmission to data processing, and then to the output of the recorded data through the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit.

[0022] According to a further technical solution, the DSP controller uses a DMA transmission channel to transmit to the SPI interface, the SPI interface is capable of multi-channel output, and the voltage signal and current signal obtained after processing by the DSP controller are output from different SPI interfaces respectively.

[0023] According to a further technical solution, the positive and negative output modes of the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit support two modes:

[0024] One is to use a dual reference mode, that is, the positive output refers to the positive reference, and the negative output refers to the negative reference;

[0025] The second is a single-reference bipolar output mode, where both positive and negative outputs refer to the positive terminal reference;

[0026] Further preferably, the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit adopt a single-reference bipolar output mode, and adopt the digital-to-analog conversion of the single-reference bipolar output mode to eliminate the error of amplitude asymmetry during positive and negative edge output.

[0027] According to a further technical solution, the voltage signal terminal actually outputs an analog voltage signal of a voltage channel in the recorded data, which is provided to a power amplifier circuit and restored to an actual recorded voltage signal through V / V conversion.

[0028] According to a further technical solution, the actual output of the current signal terminal is an analog voltage signal of the current channel in the recorded data, which is provided to the power amplifier circuit and restored to the actual recorded current signal through I / V conversion.

[0029] In a second aspect, a method for generating a signal for a continuous long-wave recording playback power source is disclosed, comprising:

[0030] The recorded data is sequentially transmitted to the first data storage block. When the first data storage block is full, a DMA interrupt is triggered, and the recorded data is started to be stored in the second data storage block within the interrupt. The data of the first data storage block starts the SPI DMA channel and outputs the data.

[0031] When the output of the first data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the third data storage block, and the DMA channel of the second data storage block is started and the data is output;

[0032] When the output of the second data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the first data storage block, and the DMA channel of the third data storage block is started and the data is output;

[0033] When the output of the third data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the second data storage block, and the DMA channel of the first data storage block is started and the data is output;

[0034] The above steps are performed in a continuous loop to transmit data, thereby achieving continuous recording and playback.

[0035] One or more of the above technical solutions have the following beneficial effects:

[0036] The present invention adopts a 20-bit DAC based on a segmented structure, which can achieve a maximum amplitude resolution of 20 bits. Compared with the existing signal generator solution, the signal resolution is greatly improved, the structure is simple, and no other operational amplifiers and DAs need to be added, which greatly improves the linearity of the signal generator; with the help of the single-reference bipolar output mode of the DAC, the distortion error caused by the asymmetry of the positive and negative amplitudes of the signal generator is eliminated; a method for generating a continuous recording and playback signal is proposed, which can realize the generation of long-term, non-periodic signals, and the recording and playback time can be easily extended, and the theoretical time is unlimited.

[0037] Advantages of additional aspects of the present invention will be given in part in the following description, and in part will become obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The accompanying drawings in the specification, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0039] Figure 1 is a system block diagram of a signal generator according to an embodiment of the present invention;

[0040] Figure 2 This is a system block diagram of a DSP controller according to an embodiment of the present invention;

[0041] Figure 3 A block diagram of a method for long-recorded wave playback according to an embodiment of the present invention;

[0042] Figure 4 This is a block diagram of a data block storage method according to an embodiment of the present invention;

[0043] Figure 5 This is a functional block diagram of a DAC according to an embodiment of the present invention;

[0044] Figure 6 A block diagram of a single reference bipolar output mode of a DAC according to an embodiment of the present invention;

[0045] Figure 7 This is a block diagram of an op amp follower according to an embodiment of the present invention. DETAILED DESCRIPTION

[0046] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present invention belongs.

[0047] It should be noted that the terms used herein are for describing specific embodiments only and are not intended to be limiting of exemplary embodiments according to the present invention.

[0048] In the absence of conflict, the embodiments of the present invention and the features of the embodiments may be combined with each other.

[0049] Embodiment 1

[0050] This embodiment discloses a signal generator for a continuous long wave recording playback power source, see the attached Figure 1 As shown, the signal generator is composed of a DSP controller, a segmented DAC0, a segmented DAC1, an operational amplifier follower 0, an operational amplifier follower 1, a voltage signal terminal, and a current signal terminal.

[0051] The recorded data is connected to the DSP controller via the Ethernet port. The recorded data is generally stored in an external PC. The recorded data is generally in comtrade format. The parsed recorded data is transmitted to the DSP controller at high speed via the Ethernet port. After being processed by the DSP controller, the DAC output is controlled.

[0052] The DSP controller is connected to the segmented DAC0 through SPI_0. After the recording data is processed by the DSP controller, it is controlled to output DAC0 through SPI_0 through the DMA channel to complete the signal generation of the recording and playback waveform; the DSP controller is connected to the segmented DAC1 through SPI_1. After the recording data is processed by the DSP controller, it is controlled to output DAC0 through SPI_0 through the DMA channel to complete the signal generation of the recording and playback waveform; the segmented DAC0 is connected to the operational amplifier follower 0, and the output signal of DAC0 is output through the operational amplifier follower buffer; the segmented DAC1 is connected to the operational amplifier follower 1, and the output signal of DAC1 is output through the operational amplifier follower buffer; the operational amplifier follower 0 is connected to the voltage signal terminal, and the output of DAC is output from the voltage signal terminal through the follower; the operational amplifier follower 1 is connected to the voltage signal terminal, and the output of DAC is output from the current signal terminal through the follower.

[0053] The present invention has two signal paths, including voltage and current output signals. The system block diagrams of the two signal output paths are as follows: Figure 2 As shown, the system control block diagram of one signal is described in detail below. The DSP controller includes a communication network port, data storage block 0, data storage block 1, data storage block 2, DMA transmission channel, and SPI interface. The external recording data is transmitted to the DSP controller at high speed through the Ethernet port. The DSP transfers the data to the three data storage blocks in a certain order. At the same time, the data of the storage data block is transferred to the SPI interface through DMA according to a certain order requirement and output to the segmented DAC.

[0054] The recorded data of the present invention is converted into two analog signal outputs (voltage and current signals) by DAC. Here, only the voltage and current signals contained in the recorded data are distinguished. Figure 1 .

[0055] The present invention adopts a 100M Ethernet port to transmit the recorded wave data, and the signal generator adopts a high fitting point design of 25,000 points, does not require a subsequent filter, reduces the volume, improves the bandwidth, and reduces the distortion of the signal. Since the data communication volume is large, the general transmission interface cannot bear such a large data throughput, and the present invention adopts a 100M Ethernet port as a communication interface; according to the transmission rate of the Ethernet port of 100Mb / s, a 20-bit DAC needs to occupy about 3 bytes (24bit), and the maximum fitting point of the DAC is (100Mb / s) / 24bit≈4M / s, and it has two signal outputs of voltage and current, so the fitting point number is halved to 4M / 2=2M / s, and then the extra overhead of the data transmission protocol is removed, and the fitting point number of the DAC is set to 1.25M / s points, and the conversion point number of the power frequency cycle (50Hz) is 1.25M / s*0.02s=25,000 points.

[0056] The data of the present invention adopts data block storage technology, and the storage blocks are divided into three storage blocks: data storage block 0, data storage block 1, and data storage block 2. The purpose is to solve the problem of inconsistency between the digital-to-analog conversion rate of DAC and the network port transmission of recording data, and the DMA transmission configuration problem of DSP. The data rate of the network port transmission of recording data can be as high as 100Mb / S, while the rate of digital-to-analog conversion is 0.5M / S, which is converted to a data rate of 0.5M / S*4 bytes*8bit*2 signals=32Mb / S. Therefore, the converted data rate is lower than the network port transmission rate. If multiple data storage blocks are not used, there will be several problems: the recording waveform is transmitted through the network port, and the transmission rate of the recording waveform is not consistent. The problem of mismatch between the rate of transmission through the network port and the analog-to-digital conversion rate is that if there is only one data storage block, after the data storage block is full, the data will be overwritten by new data before it is output through digital-to-analog conversion, resulting in playback waveform errors; the problem of DSP's DMA transmission configuration is that if there are only two data storage blocks, when the transmission of the first data storage block is completed, the DMA of the data storage block should be started in the DMA data sending completion interrupt to receive the network port transmission data of the recording data, and the data receiving DMA transmission is enabled in the DMA interrupt of the data storage block. In actual application, the DMA configuration error will occur, resulting in transmission failure; therefore, the three-data storage block method is adopted.

[0057] See attached Figure 4 As shown, data segmentation is performed in the following steps:

[0058] Step 1: When the data of data storage block 0 is transmitted through SPI DMA, a DMA interrupt is triggered. Within the interrupt, data storage block 2 is started to receive the recorded data transmitted by the network port, and the DMA channel of data storage block 1 is started to output data to DAC;

[0059] Step 2: When the data of data storage block 1 is transmitted through SPI DMA, a DMA interrupt is triggered. Within the interrupt, data storage block 0 is started to receive the recorded data transmitted by the network port, and the DMA channel of data storage block 2 is started to output data to DAC;

[0060] Step 3: When the data of data storage block 2 is transmitted through SPI DMA, a DMA interrupt is triggered. In the interrupt, data storage block 1 is started to receive the recorded data transmitted by the network port, and the DMA channel of data storage block 0 is started to output data to DAC;

[0061] Step 4: After step 3, you can continue with step 1 to achieve continuous loop data transmission, thereby achieving continuous recording and playback.

[0062] Regarding the segmented DAC, the ADC of the present invention adopts ADI's DAC, with an effective resolution of 20 bits, an integral nonlinearity of 1ppm (one part per million), a resolution of 1ppm, a long-term linear stability of 0.19LSB (i.e., 0.19ppm), and an output settling time of less than 1uS, which fully meets the linearity and resolution requirements of the present invention. The segmented DAC0 and segmented DAC1 of the present invention are both AD5791, and the circuit principles are consistent.

[0063] High linearity and high resolution DA conversion technology based on segmented DAC, see the attached Figure 5 As shown in the figure, the DAC architecture of AD5791 consists of two matched DAC sections. Figure 5 A simplified circuit diagram is given. On the right is a 6-bit MSB resistor (63-bit matching resistor) network. The 6 MSBs of the 20-bit data word are decoded to drive 63 switches E0 to E62. Each switch connects one of the 63 matching resistors to the VREFP or VREFN voltage. The high 6 bits of the 20-bit DAC are determined by this network. On the left is a 14-bit R-2R ladder network. The remaining 14 bits of the data word drive the S0 to S13 switches of the 14-bit voltage mode R-2R ladder network. The low 14 bits of the 20-bit DAC are determined by this network. VREFPF and VREFPS are the positive reference inputs of the DAC, and VREFNF and VREFNS are the negative reference inputs of the DAC. The reference inputs are forced to detect using an external amplifier to ensure 20-bit performance and reduce the impact of the wiring impedance of the internal resistor network on performance. Vout is the voltage signal output of the DAC.

[0064] See again the attached Figure 5 The segmented type mainly refers to the architecture of DAC. The segmented DAC means that it is divided into a 14-bit R-2R resistor network and a 6-bit MSB resistor, and finally realizes a 20-bit DAC.

[0065] Signal generation technology based on DAC single reference bipolar output mode: Figure 6The figure shows the block diagram of the single reference bipolar output mode of the segmented DAC. The positive and negative output modes of the segmented DAC support two modes, one is to use a dual reference method, that is, the positive output is referenced to the positive reference, and the negative output is referenced to the negative reference. The other is to use a single reference bipolar output mode, and both positive and negative outputs are referenced to the positive reference. The present invention adopts a single-reference bipolar output mode, which can be used to generate a bipolar output range from a single-ended reference input (VREFN=0V) through software configuration. The reference reference only needs one reference. Through the software configuration of the internal DAC, a voltage output from the range of -VREF-+REF can be output. At the same time, no other external devices are required. The positive and negative outputs are both referenced to one reference input, and no calibration is required. By using the same calibration coefficient, the amplitudes of the positive and negative sides of the output can be output symmetrically with good linearity. At the same time, there is a zero-position calibration register inside the DAC, and the output zero-position value of the DAC can be calibrated in advance. At this time, the amplitudes of the positive and negative sides of the DAC output are almost completely symmetrical (the error is less than 1ppm). Therefore, the digital-to-analog conversion technology of the single-reference bipolar output mode of the DAC is adopted to eliminate the error of the asymmetric amplitude when the positive and negative sides are output, and the output linearity of the DAC is improved.

[0066] The principle block diagram of the op amp follower is as follows Figure 7 As shown, the operational amplifier of the op amp follower of the present invention adopts ADI's A8675, with a typical offset voltage of only 10μV, an offset drift of 0.2μV / ℃, and a noise of only 0.10μV peak-to-peak value (0.1Hz to 10Hz). It has the characteristics of wide bandwidth, low voltage noise, high precision, and low power consumption, and is suitable as an operational amplifier for follower output.

[0067] Voltage signal terminal: The actual output is the analog voltage signal of the voltage channel in the recorded data, which can be provided to the power amplifier circuit for V / V conversion and restored to the actual recorded voltage signal.

[0068] Current signal terminal: The actual output is the analog voltage signal of the current channel in the recorded data, which can be provided to the power amplifier circuit for I / V conversion and restored to the actual recorded current signal.

[0069] The present invention discloses a signal generator and a signal generation method for a continuous long wave recording and playback power source. The high linearity DA conversion technology based on segmented DAC is adopted, and a 20-bit DAC is adopted, which can achieve a maximum amplitude resolution of 20 bits. Compared with the existing signal generator solution, the signal resolution is greatly improved, the structure is simple, and no other operational amplifiers and DACs need to be added, thereby improving the linearity of the signal generator.

[0070] The digital-to-analog conversion technology based on the single-reference bipolar output mode of the DAC eliminates the distortion error caused by the asymmetry of the positive and negative amplitudes of the signal generator.

[0071] Embodiment 2

[0072] The purpose of this embodiment is to provide a method for generating a signal for a continuous long-wave recording playback power source. Figure 3 As shown, the implementation method of continuous long recording playback is to transmit the recording data to the DSP controller with low latency through a high-speed transmission interface, so as to meet the high fitting point requirement of recording playback from data transmission to data processing and then to the output of recording data through DAC. Here, the transmission rate of recording data to DSP controller is required to be fast, and 100M network port transmission is adopted here. The transmission rate from the inside of DSP controller to data storage is required to be fast, and DMA transmission inside DSP is adopted. The data storage adopts DDR2 memory with a memory size of 128MB and a transmission rate of >2GB / s. The transmission rate from data storage to SPI interface is required to be fast, and DMA transmission inside DSP is adopted here. MA transmission, combined with SPI multi-channel output mode, outputs voltage and current signals from different SPI interfaces, further reducing the pressure of data output rate and solving the delay problem of recording data through DSP controller; at the same time, through data block storage technology and the cooperation of three data storage blocks, the problem of DAC digital-to-analog conversion rate and recording data network port transmission inconsistency and DSP DMA transmission configuration problem are solved; through the implementation method of long recording playback, it can be analyzed that as long as the recording data can be continuously transmitted to the DSP controller, theoretically, unlimited long recording playback can be achieved, that is, the duration of recording playback is determined by the transmission data duration of the network port. After the signal playback is realized, a power amplifier is also required to achieve the complete reproduction of the final input signal.

[0073] Specific steps for long recording and playback:

[0074] Step 1: The recorded data is transmitted to the data storage block 0 of the DSP in sequence through the Ethernet port. When the data storage block 0 is full, the DMA interrupt is triggered, and the recorded data is started to be stored in the data storage block 1 in the interrupt. The data of the data storage block 0 starts the SPI DMA channel transmission and outputs to the DAC;

[0075] First, the recording data is transferred to the data storage block connected to the DSP controller through high-speed transmission via the network port. For the definition of the storage size of the data storage block, the delay time of the waveform startup should not be too long, and it is convenient for calculation. It is defined as the size of the waveform data of 2S clock. In order to facilitate transmission and memory data byte alignment, 4-byte integer data is used to store the 20-bit data of the DAC of the recording waveform. The number of fitting points of the DAC is 1M / s point, so the size of the waveform data of 1s clock recording is 0.5M / s

[0076] *4B*1S=2MB, so the data storage block size of the DSP controller is defined as 2MB / s*2S=4MB, and the sizes of data storage block 0, data storage block 1, and data storage block 2 are all the same, which are 4MB.

[0077] Step 2: When the output of data storage block 0 is completed, the DMA interrupt is triggered, the recorded data is started to continue to be stored in data storage block 2, and the DMA channel of data storage block 1 is started to output data to DAC;

[0078] When data storage block 0 is full, the DMA interrupt of DSP will be triggered. In the interrupt: the first step is to start the SPI DMA transmission to transfer the data of data storage block 1 to the corresponding SPI interface, and the SPI interface transfers the data to the segmented DAC to complete the digital-to-analog conversion; the second step is to start DMA to continue to store the recorded data into data storage block 2; the operation within the interrupt is used here to reduce the delay time and ensure that when switching data storage blocks, seamless output can be achieved without losing recorded data points.

[0079] Step 3: When the output of data storage block 1 is completed, the DMA interrupt is triggered, the recorded data is started to continue to be stored in data storage block 0, and the DMA channel of data storage block 2 is started to output data to DAC;

[0080] Same as step 2 above.

[0081] Step 4: When the output of data storage block 2 is completed, the DMA interrupt is triggered, the recorded data is started to continue to be stored in data storage block 1, and the DMA channel of data storage block 0 is started to output data to DAC;

[0082] Same as step 2 above.

[0083] The present invention proposes a method for generating a continuous recording and playback signal, which adopts a data block storage technology to solve the problem of inconsistency between the digital-to-analog conversion rate of a DAC and the transmission rate of a recording data network port, and the DMA transmission configuration problem of a DSP, and can realize the generation of long-term, non-periodic signals, and the duration of the recording and playback can be easily extended, with no theoretical duration limit.

[0084] The above-mentioned method for generating continuous recording and playback signals mainly introduces the data processing and analysis part, which runs in the DSP and is divided into four steps. Finally, the signal is transmitted to the DAC through the SPI and output as an analog signal, and then the signal generation is completed.

[0085] Although the above describes the specific implementation mode of the present invention in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.

Claims

1. A signal generator for continuous long wave recording and playback power source, characterized in that: include: A controller, a first segmented digital-to-analog conversion unit, and a second segmented digital-to-analog conversion unit; The controller receives the analyzed recorded data and stores the data in blocks according to a certain order, and outputs the stored data to the data interface according to a certain order, and uses the data interface to output the voltage and current output signals to the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit corresponding to each other; the segmented digital-to-analog conversion unit refers to a 14-bit R-2R resistor network and a 6-bit MSB resistor, and finally realizes 20-bit digital-to-analog conversion; The data is stored in blocks according to a certain order, and the stored data is output to the data interface according to a certain order. Specifically, the recorded data is transmitted to the first data storage block in sequence, and when the first data storage block is full, a DMA interrupt is triggered, and the recorded data is started in the interrupt to continue to be stored in the second data storage block, and the DMA channel of the first data storage block is started and the data is output to the SPI interface; When the output of the first data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the third data storage block, and the DMA channel of the second data storage block is started and the data is output; When the output of the second data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the first data storage block, and the DMA channel of the third data storage block is started and the data is output; When the output of the third data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the second data storage block, and the DMA channel of the first data storage block is started and the data is output; The above steps are performed in a continuous loop to transmit data, thereby achieving continuous recording and playback.

2. A signal generator for continuous long wave recording and playback power source as claimed in claim 1, characterized in that: It also includes a first operational amplifier follower, a second operational amplifier follower, a voltage signal terminal and a current signal terminal; The first operational amplifier follower is connected to the first segmented digital-to-analog conversion unit, the second operational amplifier follower is connected to the second segmented digital-to-analog conversion unit, the voltage signal terminal is connected to the first operational amplifier follower, and the current signal terminal is connected to the second operational amplifier follower; The output signal of the first segmented digital-to-analog conversion unit is buffered and outputted by the first operational amplifier follower, and then outputted from the voltage signal terminal; The output signal of the second segmented digital-to-analog conversion unit is buffered and outputted by the second operational amplifier follower, and then outputted from the current signal terminal.

3. A signal generator for continuous long wave recording and playback power source as claimed in claim 1, characterized in that: The controller is a DSP controller, and the DSP controller is connected to an external device via an Ethernet port; The DSP controller includes at least three data storage blocks, namely a first data storage block, a second data storage block and a third data storage block; All data storage blocks are connected to the interface through transmission channels.

4. A signal generator for continuous long wave recording and playback power source as claimed in claim 3, characterized in that: The Ethernet port adopts a 100M Ethernet port, which transmits the recorded data to the DSP controller with low latency, so as to meet the high fitting point number requirement of the recorded playback from data transmission to data processing, and then to the output of the recorded data through the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit.

5. A signal generator for continuous long wave recording and playback power source as claimed in claim 3, characterized in that: The DSP controller uses a DMA transmission channel to transmit to the SPI interface, and the SPI interface can output in multiple channels. The voltage signal and the current signal obtained after processing by the DSP controller are output from different SPI interfaces respectively.

6. A signal generator for continuous long wave recording and playback power source as claimed in claim 1, characterized in that: The positive and negative output modes of the first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit support two modes: One is to use a dual reference mode, that is, the positive output refers to the positive reference, and the negative output refers to the negative reference; The second is to use a single-reference bipolar output mode, where both positive and negative outputs refer to the positive terminal reference.

7. A signal generator for continuous long wave recording and playback power source as claimed in claim 1, characterized in that: The first segmented digital-to-analog conversion unit and the second segmented digital-to-analog conversion unit adopt a single reference bipolar output mode, and adopt the digital-to-analog conversion of the single reference bipolar output mode to eliminate the error of asymmetric amplitude when the positive and negative sides are output.

8. A signal generator for continuous long wave recording and playback power source as claimed in claim 1, characterized in that: The actual output of the voltage signal terminal is an analog voltage signal of the voltage channel in the recorded data, which is provided to the power amplifier circuit and restored to the actual recorded voltage signal through V / V conversion.

9. A signal generator for continuous long wave recording and playback power source as claimed in claim 1, characterized in that: The actual output of the current signal terminal is an analog current signal of the current channel in the recorded data, which is provided to the power amplifier circuit and restored to the actual recorded current signal through I / V conversion.

10. A signal generation method for a continuous long-wave recording playback power source, characterized in that: The signal generator for continuous long wave recording and playback power source as claimed in any one of claims 1 to 9 comprises: The recorded data is sequentially transmitted to the first data storage block. When the first data storage block is full, a DMA interrupt is triggered, and the recorded data is started to be continuously stored in the second data storage block within the interrupt, and the DMA channel of the first data storage block is started and the data is output to the SPI interface; when the output of the first data storage block is completed, a DMA interrupt is triggered, and the recorded data is started to be continuously stored in the third data storage block, and the DMA channel of the second data storage block is started and the data is output; When the output of the second data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the first data storage block, and the DMA channel of the third data storage block is started and the data is output; When the output of the third data storage block is completed, a DMA interrupt is triggered, the recorded data is started to continue to be stored in the second data storage block, and the DMA channel of the first data storage block is started and the data is output; The above steps are performed in a continuous loop to transmit data, thereby achieving continuous recording and playback.

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