Transient voltage suppressor and security POE port circuit board

Abstract

The embodiment of the invention discloses a transient voltage suppressor and a security POE port circuit board. The transient voltage suppressor comprises a first transient voltage suppressor chip, a second transient voltage suppressor chip, a third transient voltage suppressor chip, a fourth transient voltage suppressor chip, a fifth transient voltage suppressor chip, a first copper electrode, a second copper electrode, a third copper electrode, a fourth copper electrode, a first pin, a second pin and a third pin. The first transient suppression diode chip is arranged between the first copper electrode and the second copper electrode; the second transient voltage suppressor chip and the third transient voltage suppressor chip are arranged in a stacked mode and located between the second copper electrode and the third copper electrode. The fourth transient voltage suppressor chip and the fifth transient voltage suppressor chip are arranged in a stacked mode and located between the second copper electrode and the fourth copper electrode. According to the invention, the packaging cost can be directly reduced, and the device integration is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor packaging technology, and in particular to a transient voltage suppressor and a security POE port circuit board. Background Art

[0002] In network equipment, POE port (Power over Ethernet port) is a key technology that can transmit power and data in a single network connection, providing continuous and stable power supply for equipment. At present, the demand for security POE port is the most influential and demanded product in the market. Ordinary single chip packaging products are no longer considered advantageous products. The commonly used security products on the market use multiple single chip products in parallel, which increases the cost. At the same time, the large layout area is not conducive to technological progress, which will bring inconvenience to the long-term development of POE port protection.

[0003] Figure 1 This is a schematic diagram of a security POE port circuit board in the prior art. Figure 1 , three transient voltage suppressor diodes (TVS) are connected in parallel at the POE port in the circuit, and the protection ends of the three lines correspond to a protection device respectively. Disadvantages of using three TVS in parallel in the circuit: three independent TVS are required, which is costly; three devices need to occupy three pads on the PCB board, which occupies a large board area and affects the overall circuit integration. Summary of the invention

[0004] The invention provides a transient voltage suppressor and a security POE port circuit board, which can directly reduce packaging costs and improve device integration.

[0005] According to one aspect of the present invention, a transient voltage suppressor is provided, the transient voltage suppressor comprising: a first transient voltage suppressor diode chip, a second transient voltage suppressor diode chip, a third transient voltage suppressor diode chip, a fourth transient voltage suppressor diode chip, a fifth transient voltage suppressor diode chip, a first copper electrode, a second copper electrode, a third copper electrode, a fourth copper electrode, a first pin, a second pin and a third pin;

[0006] The first transient suppression diode chip is arranged between the first copper electrode and the second copper electrode, and the first pin is connected to the first copper electrode and the second copper electrode;

[0007] The second transient suppression diode chip and the third transient suppression diode chip are stacked and located between the second copper electrode and the third copper electrode, and the second pin is connected to the third copper electrode;

[0008] The fourth transient voltage suppression diode chip and the fifth transient voltage suppression diode chip are stacked and located between the second copper electrode and the fourth copper electrode, and the third pin is connected to the fourth copper electrode.

[0009] Optionally, the transient voltage suppressor also includes welding solder or conductive glue, and the welding solder or the conductive glue is used to connect the first transient voltage suppressor diode chip, the first copper electrode and the second copper electrode, to connect the second transient voltage suppressor diode chip and the second copper electrode, to connect the third transient voltage suppressor diode chip and the third copper electrode, to connect the fourth transient voltage suppressor diode chip and the second copper electrode, and to connect the fifth transient voltage suppressor diode chip and the fourth copper electrode.

[0010] Optionally, the first pin, the second pin and the third pin form a Y-shaped structure in combination.

[0011] Optionally, the protection voltages of the first pin, the second pin and the third pin are all 50V-60V.

[0012] Optionally, the first pin, the second pin and the third pin are used to withstand a lightning pulse with an open circuit voltage wave of 10 / 700 μS and a voltage greater than 4 kV.

[0013] Optionally, the second transient suppression diode chip is connected in series with the third transient suppression diode chip, and the fourth transient suppression diode chip is connected in series with the fifth transient suppression diode chip;

[0014] The second TVS diode chip and the third TVS diode chip connected in series are connected in parallel with the fourth TVS diode chip and the fifth TVS diode chip connected in series.

[0015] Optionally, the second transient suppression diode chip and the third transient suppression diode chip connected in series are connected in series with the first transient suppression diode chip;

[0016] The fourth transient suppression diode chip and the fifth transient suppression diode chip connected in series are connected in series with the first transient suppression diode chip.

[0017] Optionally, the second pin and the third copper electrode are integrally formed, and the third pin and the fourth copper electrode are integrally formed.

[0018] Optionally, the second transient suppression diode chip is of the same model as the third transient suppression diode chip, the fourth transient suppression diode chip, and the fifth transient suppression diode chip.

[0019] According to another aspect of the present invention, a security POE port circuit board is provided, and the security POE port circuit board includes the transient voltage suppressor described in any one of the above aspects.

[0020] The technical solution of the embodiment of the present invention is to simplify the device volume, improve the integration of the transient suppressor, reduce the board area occupied by the protection devices, and improve the circuit integration by simplifying the three transient suppression diodes in parallel to one transient voltage suppressor in parallel. The use of one transient voltage suppressor can replace and surpass the lightning protection capability of the three transient suppression diodes in the original solution, improve the protection capability of the transient voltage suppressor, increase the protection capability of the POE port, and directly reduce the packaging cost and improve the device integration compared with the existing solution. In summary, the present invention solves the problem that the prior art needs to use three independent TVSs, which is costly; the three devices need to occupy three pads on the PCB board, occupy a large board area, and affect the overall circuit integration.

[0021] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 It is an overall schematic diagram of a security POE port circuit board in the prior art;

[0024] Figure 2 is a structural schematic diagram of a transient voltage suppressor provided according to an embodiment of the present invention;

[0025] Figure 3 is a structural schematic diagram of another transient voltage suppressor provided according to an embodiment of the present invention;

[0026] Figure 4 is a schematic diagram of an open-circuit voltage waveform of a transient voltage suppressor provided according to an embodiment of the present invention;

[0027] Figure 5 is a schematic diagram of a packaged transient voltage suppressor provided according to an embodiment of the present invention;

[0028] Figure 6 is a front view of a transient voltage suppressor provided according to an embodiment of the present invention;

[0029] Figure 7 is a side view of a transient voltage suppressor provided according to an embodiment of the present invention;

[0030] Figure 8 is a side view of another transient voltage suppressor provided according to an embodiment of the present invention;

[0031] Fig. 9 It is an overall schematic diagram of a security POE port circuit board provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0032] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0033] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0034] Figure 2 is a schematic structural diagram of a transient voltage suppressor provided according to an embodiment of the present invention, Figure 3 is a schematic diagram of the structure of another transient voltage suppressor provided according to an embodiment of the present invention, with reference to Figure 2 and Figure 3The embodiment of the present invention provides a transient voltage suppressor, which includes: a first transient voltage suppressor diode chip 1, a second transient voltage suppressor diode chip 2, a third transient voltage suppressor diode chip 3, a fourth transient voltage suppressor diode chip 4, a fifth transient voltage suppressor diode chip 5, a first copper electrode 11, a second copper electrode 12, a third copper electrode 13, a fourth copper electrode 14, a first pin 21, a second pin 22 and a third pin 23; the first transient voltage suppressor diode chip 1 is arranged between the first copper electrode 11 and the second copper electrode 12, and the first pin 21 is connected to the first copper electrode 11 and the second copper electrode 12; the second transient voltage suppressor diode chip 2 and the third transient voltage suppressor diode chip 3 are stacked and located between the second copper electrode 12 and the third copper electrode 13, and the second pin 22 is connected to the third copper electrode 13; the fourth transient voltage suppressor diode chip 4 and the fifth transient voltage suppressor diode chip 5 are stacked and located between the second copper electrode 12 and the fourth copper electrode 14, and the third pin 23 is connected to the fourth copper electrode 14.

[0035] Specifically, the transient voltage suppressor is a three-in-one structure transient suppressor, and the internal package contains at least five transient suppression diode chips. The second transient suppression diode chip 2, the third transient suppression diode chip 3, the fourth transient suppression diode chip 4, and the fifth transient suppression diode chip 5 are rectangular chips with small feet. The second transient suppression diode chip 2 and the third transient suppression diode chip 3 are connected in series together to form a TVS structure, and the fourth transient suppression diode chip 4 and the fifth transient suppression diode chip 5 are connected in series together to form a TVS structure. Together with the first transient suppression diode chip 1, which is considered a TVS structure, the five TVS chips form a three-in-one structure transient voltage suppressor, and the first pin 21, the second pin 22, and the third pin 23 can all reach the protection voltage level of the original three parallel TVSs, which can directly reduce the packaging cost and improve the device integration compared to the existing solution.

[0036] The technical solution of the embodiment of the present invention is to simplify the device volume, improve the integration of the transient suppressor, reduce the board area occupied by the protection devices, and improve the circuit integration by simplifying the three transient suppression diodes in parallel to one transient voltage suppressor in parallel. The use of one transient voltage suppressor can replace and surpass the lightning protection capability of the three transient suppression diodes in the original solution, improve the protection capability of the transient voltage suppressor, increase the protection capability of the POE port, and directly reduce the packaging cost and improve the device integration compared with the existing solution. In summary, the present invention solves the problem that the prior art needs to use three independent TVSs, which is costly; the three devices need to occupy three pads on the PCB board, occupy a large board area, and affect the overall circuit integration.

[0037] Continue to refer Figure 2 and Figure 3Optionally, the transient voltage suppressor also includes welding solder or conductive glue (not shown in the figure), which is used to connect the first transient voltage suppressor diode chip 1, the first copper electrode 11 and the second copper electrode 12, to connect the second transient voltage suppressor diode chip 2 and the second copper electrode 12, to connect the third transient voltage suppressor diode chip 3 and the third copper electrode 13, to connect the fourth transient voltage suppressor diode chip 4 and the second copper electrode 12, and to connect the fifth transient voltage suppressor diode chip 5 and the fourth copper electrode 14.

[0038] Specifically, welding solder or conductive glue is provided on both sides of the chip, and at least one copper electrode is correspondingly provided on one side of the welding solder to connect the transient voltage suppressor diode chip. Manufacturing method: using a unique semiconductor vacuum welding process, using copper electrodes and solder to connect the transient voltage suppressor diode chip, creating stacked welding that meets the product size according to the product size, and using low-stress epoxy resin plastic sealing to form a three-in-one structure transient voltage suppressor.

[0039] Continue to refer Figure 2 and Figure 3 Optionally, the first pin 21, the second pin 22 and the third pin 23 are combined to form a Y-type structure.

[0040] Specifically, the Y-shaped structure can effectively reduce the layout area of ​​the PCB board reserved for protective devices, laying a good foundation for the industry upgrade of the POE port.

[0041] Continue to refer Figure 2 and Figure 3 Optionally, the second transient suppression diode chip 2 is connected in series with the third transient suppression diode chip 3, and the fourth transient suppression diode chip 4 is connected in series with the fifth transient suppression diode chip 5; the second transient suppression diode chip 2 and the third transient suppression diode chip 3 connected in series are connected in parallel with the fourth transient suppression diode chip 4 and the fifth transient suppression diode chip 5 connected in series.

[0042] Continue to refer Figure 2 and Figure 3 Optionally, the second transient suppression diode chip 2 and the third transient suppression diode chip 3 are connected in series with the first transient suppression diode chip 1; the fourth transient suppression diode chip 4 and the fifth transient suppression diode chip 5 are connected in series with the first transient suppression diode chip 1.

[0043] Continue to refer Figure 2 and Figure 3 Optionally, the second pin 22 and the third copper electrode 13 are integrally formed, and the third pin 23 and the fourth copper electrode 14 are integrally formed.

[0044] Specifically, the copper electrode and the pin are integrated, and the pin for direct welding and power supply extends from the copper electrode.

[0045] Continue to refer Figure 2 and Figure 3 Optionally, the second transient suppression diode chip 2 is of the same model as the third transient suppression diode chip 3 , the fourth transient suppression diode chip 4 , and the fifth transient suppression diode chip 5 .

[0046] Specifically, the first transient suppression diode chip 1 is a square chip, and the second transient suppression diode chip 2, the third transient suppression diode chip 3, the fourth transient suppression diode chip 4, and the fifth transient suppression diode chip 5 are rectangular chips with small feet. The lightning surge level that can be met by any combination of three paths is achieved by the combination of multiple chips. The miniaturization of the product (small volume and large flow level) is achieved by the multi-layer combination of square chips and rectangular chips. The matching of square chips and rectangular chips is achieved by double convex copper particles.

[0047] Figure 4 is a schematic diagram of an open-circuit voltage waveform of a transient voltage suppressor provided according to an embodiment of the present invention, Figure 5 is a schematic diagram of a packaged transient voltage suppressor according to an embodiment of the present invention, with reference to Figure 4 and Figure 5 Optionally, the protection voltages of the first pin, the second pin and the third pin are all 50V-60V.

[0048] Continue to refer Figure 4 and Figure 5 Optionally, the first pin, the second pin and the third pin are used to withstand a lightning pulse with an open circuit voltage wave of 10 / 700 μS and a voltage greater than 4 kV.

[0049] Specifically, the transient voltage suppressor has three pins, the first pin, the second pin and the third pin, and the voltage level of the TVS device between the pins can reach a voltage protection effect of 50-60V. Using the open circuit voltage wave 10 / 700μS for lightning pulse, the three pins can achieve the ability to clamp voltages above 4kV. It has effective protection capabilities for the entire protection port, higher integration and industry-leading cost advantages.

[0050] The first pin, the second pin and the third pin can improve the lightning pulse surge protection capability. Each output pin can withstand an open circuit voltage wave of 10 / 700μS and a lightning pulse of more than 4kV. It can increase the performance of the overall product, save the protection cost of the port, and thus allow more space on the PCB board to improve transmission efficiency.

[0051] Figure 6is a front view of a transient voltage suppressor provided according to an embodiment of the present invention, Figure 7 is a side view of a transient voltage suppressor provided according to an embodiment of the present invention, Figure 8 is a side view of another transient voltage suppressor provided according to an embodiment of the present invention, referring to Figure 6 , Figure 7 and Figure 8 By simplifying the parallel connection of three transient voltage suppressor diodes to one transient voltage suppressor connected in parallel to the circuit, the device volume is simplified and the circuit integration is improved. Using one transient voltage suppressor can replace and exceed the lightning protection capability of the three transient voltage suppressor diodes in the original solution, and improve the protection capability of the transient voltage suppressor in the 50-60V voltage range.

[0052] Fig. 9 is an overall schematic diagram of a security POE port circuit board provided according to an embodiment of the present invention, with reference to Fig. 9 An embodiment of the present invention further provides a security POE port circuit board, and the security POE port circuit board includes the transient voltage suppressor provided by any embodiment of the present invention.

[0053] Since the security POE port circuit board includes the transient voltage suppressor provided by any embodiment of the present invention, the beneficial effects of the above-mentioned security POE port circuit board and the transient voltage suppressor are the same, which will not be repeated here.

[0054] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A transient voltage suppressor, characterized in that: include: A first transient suppression diode chip, a second transient suppression diode chip, a third transient suppression diode chip, a fourth transient suppression diode chip, a fifth transient suppression diode chip, a first copper electrode, a second copper electrode, a third copper electrode, a fourth copper electrode, a first pin, a second pin, and a third pin; The first transient suppression diode chip is arranged between the first copper electrode and the second copper electrode, and the first pin is connected to the first copper electrode and the second copper electrode; The second transient suppression diode chip and the third transient suppression diode chip are stacked and located between the second copper electrode and the third copper electrode, and the second pin is connected to the third copper electrode; The fourth transient voltage suppression diode chip and the fifth transient voltage suppression diode chip are stacked and located between the second copper electrode and the fourth copper electrode, and the third pin is connected to the fourth copper electrode.

2. The transient voltage suppressor according to claim 1, characterized in that: It also includes welding solder or conductive glue, which is used to connect the first transient suppression diode chip, the first copper electrode and the second copper electrode, to connect the second transient suppression diode chip and the second copper electrode, to connect the third transient suppression diode chip and the third copper electrode, to connect the fourth transient suppression diode chip and the second copper electrode, and to connect the fifth transient suppression diode chip and the fourth copper electrode.

3. The transient voltage suppressor according to claim 1, characterized in that: The first pin, the second pin and the third pin form a Y-shaped structure in combination.

4. The transient voltage suppressor according to claim 1, characterized in that: The protection voltages of the first pin, the second pin and the third pin are all 50V-60V.

5. The transient voltage suppressor according to claim 1, characterized in that: The first pin, the second pin and the third pin are used to withstand a lightning pulse with an open circuit voltage wave of 10 / 700 μS and a voltage greater than 4 kV.

6. The transient voltage suppressor according to claim 1, characterized in that: The second transient suppression diode chip is connected in series with the third transient suppression diode chip, and the fourth transient suppression diode chip is connected in series with the fifth transient suppression diode chip; The second TVS diode chip and the third TVS diode chip connected in series are connected in parallel with the fourth TVS diode chip and the fifth TVS diode chip connected in series.

7. The transient voltage suppressor according to claim 6, characterized in that: The second transient suppression diode chip, the third transient suppression diode chip and the first transient suppression diode chip are connected in series; The fourth transient suppression diode chip and the fifth transient suppression diode chip connected in series are connected in series with the first transient suppression diode chip.

8. The transient voltage suppressor according to claim 1, characterized in that: The second pin and the third copper electrode are integrally formed, and the third pin and the fourth copper electrode are integrally formed.

9. The transient voltage suppressor according to claim 1, characterized in that: The second TVS diode chip has the same model as the third TVS diode chip, the fourth TVS diode chip, and the fifth TVS diode chip.

10. A security POE port circuit board, characterized in that: A transient voltage suppressor comprising the transient voltage suppressor according to any one of claims 1 to 9.

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