Silicon wafer and manufacturing method thereof

Abstract

[Problem] To provide: a silicon wafer which is suitable for IGBT applications, has high resistance and small resistance variation, and is capable of suppressing the occurrence of slippage; and a method for manufacturing the silicon wafer. [Solution] A silicon wafer in which, in a nitrogen concentration distribution in the thickness direction of the silicon wafer, a high nitrogen concentration region in which the maximum value of nitrogen concentration is 2 * 1015 atoms / cm-3 or more and 1 * 1016 atoms / cm-3 or less is present in a range from the outermost surface of the back surface of the silicon wafer up to 20 [mu] m in the thickness direction, the nitrogen concentration in a range from the outermost surface of the front surface of the silicon wafer to 20 [mu] m in the thickness direction is 1 * 1014 atoms / cm <-3 > to 1 * 1015 atoms / cm <-3 >, and the oxygen concentration (ASTM F121, 1979) of the silicon wafer is 1 * 1017 atoms / cm <-3 > or less.

Description

Technical Field

[0001] The present invention relates to a silicon wafer and a method for manufacturing the same. Background Art

[0002] In recent years, thyristors, bipolar transistors, MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), insulated gate bipolar transistors (IGBT) and the like have been actively developed as switching devices for power applications. Among them, IGBT is a device that combines the high speed of MOSFET with the low saturation voltage characteristics of bipolar transistors, and has attracted much attention in applications such as power supplies for power motors of hybrid vehicles and electric vehicles that require large capacity, high withstand voltage, and high-speed switching.

[0003] IGBT is a gate voltage driven switching device (also called "vertical IGBT") having a gate electrode and an emitter electrode formed on the surface side of a silicon wafer, and a collector formed on the back side, and the switching current flows in the entire silicon wafer between the emitter on the surface side and the collector on the back side. Therefore, if there are crystal defects inside the silicon wafer, the device characteristics deteriorate, so it is important that there are no crystal defects in the silicon wafer from the wafer surface to the back side.

[0004] In addition, it is also important that the resistivity of the silicon wafer is high and has no deviation in the entire wafer. In this regard, when the oxygen concentration of the silicon wafer is high, oxygen atoms become oxygen donors, and the resistivity of the silicon wafer fluctuates. Therefore, it is also important that the oxygen concentration of the silicon wafer is low.

[0005] Therefore, as described in Patent Document 1, a silicon ingot having a low interstitial oxygen concentration formed by the Czochralski method is irradiated with neutron rays to be doped with phosphorus, and then sliced ​​into wafers, which are then annealed in an oxidizing atmosphere to obtain silicon wafers having a uniform resistivity.

[0006] Patent Document 2 proposes a method for manufacturing a single crystal silicon ingot, wherein the amount of n-type dopant evaporated from a silicon melt is controlled when the single crystal silicon ingot is pulled, thereby manufacturing an n-type high-resistance single crystal silicon ingot having a uniform resistivity in the pulling length direction.

[0007] However, it is known that when low-oxygen silicon wafers are used to reduce resistance fluctuations, slip is likely to occur. If slip occurs on the back of the silicon wafer, it will have a significant impact on the device yield due to current leakage and positional offset problems in the photolithography process. It should be noted that the lower the oxygen concentration of the silicon wafer, the smaller the critical shear stress of the silicon wafer, and the easier it is to slip.

[0008] From this point of view, attempts have been made to increase the nitrogen concentration instead of the oxygen concentration of the silicon wafer as described in Patent Document 3, but such a high nitrogen concentration capable of suppressing the occurrence of slip has not been achieved.

[0009] Prior art literature

[0010] Patent Literature

[0011] Patent Document 1: Japanese Patent Application Publication No. 2012-134517

[0012] Patent Document 2: International Publication No. 2018 / 159108

[0013] Patent Document 3: Japanese Patent Application Publication No. 2017-122033 Summary of the invention

[0014] Problems to be solved by the invention

[0015] Thus, efforts have been made to manufacture high-resistance silicon wafers with little resistance variation suitable for IGBT applications by various methods. However, in the prior art using silicon wafers with low oxygen concentration, it has been difficult to achieve high resistance, suppress resistance variation, and prevent slip.

[0016] Therefore, an object of the present invention is to provide a silicon wafer suitable for IGBT use, which has high resistance and small resistance variation and can suppress the occurrence of slip, and a method for producing the silicon wafer.

[0017] Solutions to Solve Problems

[0018] In order to solve the above problems, the inventors have made intensive research. First, nitrogen atoms in a silicon wafer have the effect of improving anti-slip properties. As a method for increasing the nitrogen concentration in a silicon wafer, the following method is known: a nitride film is formed on the surface of the silicon wafer by heat treating the silicon wafer in a nitrogen atmosphere, and a region with a high nitrogen concentration is formed on the surface of the silicon wafer by diffusing nitrogen atoms from the nitride film into the silicon wafer.

[0019] On the other hand, in order to make a device pattern on the front side of the silicon wafer, it is necessary to remove the nitride film formed by heat treatment in a nitrogen atmosphere. However, when manufacturing an IGBT device, the problem of slippage occurs on the back side of the supporting silicon wafer. Therefore, the inventors conceived to form a high nitrogen concentration area only on the surface portion of the back side. Based on this concept, the inventors thought of heat treating a silicon wafer with a low oxygen concentration in a nitrogen atmosphere, temporarily increasing the nitrogen concentration of the surface portions of the front and back sides of the silicon wafer, and then removing only the high nitrogen concentration area on the front side, thereby obtaining a silicon wafer with a high nitrogen concentration area remaining on the back side.

[0020] That is, the gist of the present invention is as follows.

[0021] <1> A silicon wafer, wherein in a nitrogen concentration distribution in a thickness direction of the silicon wafer,

[0022] The maximum nitrogen concentration is 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 The following high nitrogen concentration region exists in the range from the outermost surface of the back side of the silicon wafer to 20 μm in the thickness direction,

[0023] The nitrogen concentration in the range from the outermost surface of the front side of the silicon wafer to 20 μm in the thickness direction was 1×10 14 atoms / cm -3 Above and 1×10 15 atoms / cm -3 the following,

[0024] The oxygen concentration of the silicon wafer (ASTM F121, 1979) is 1×10 17 atoms / cm -3 the following.

[0025] <2> according to <1> In the silicon wafer, the high nitrogen concentration region exists in a range from the outermost surface of the back surface of the silicon wafer to 15 μm in the thickness direction.

[0026] <3> according to <1> or <2> The silicon wafer, wherein the resistivity of the silicon wafer is greater than or equal to 30 Ω·cm and less than or equal to 10000 Ω·cm.

[0027] <4> according to <1> ~ <3> The silicon wafer as described in any one of the above, wherein the silicon wafer does not contain dislocation clusters and COPs.

[0028] <5> A method for manufacturing a silicon wafer, comprising:

[0029] The high nitrogen concentration layer formation step is performed by setting the oxygen concentration (ASTM F121, 1979) to 1×10 17 atoms / cm -3 The silicon wafer before grinding is subjected to heat treatment to form a high nitrogen concentration layer on each surface portion of the front side and the back side of the silicon wafer before grinding, and

[0030] a high nitrogen concentration layer removing step of removing at least a portion of the high nitrogen concentration layer on the surface layer portions of the front and back surfaces of the silicon wafer before polishing after the high nitrogen concentration layer forming step;

[0031] The maximum nitrogen concentration in the range from the outermost surface of the back side of the silicon wafer after the high nitrogen concentration layer removal step to 20 μm in the thickness direction was 2×10 15atoms / cm -3 Above and 1×10 16 atoms / cm -3 the following,

[0032] The nitrogen concentration in the range from the outermost surface of the front side of the silicon wafer to 20 μm in the thickness direction after the high nitrogen concentration layer removal step was 1×10 14 atoms / cm -3 Above and 1×10 15 atoms / cm -3 the following.

[0033] <6> according to <5> The method for manufacturing a silicon wafer, wherein the maximum value of the nitrogen concentration in the range from the outermost surface of the back side of the silicon wafer after the high nitrogen concentration layer removal step to 15 μm in the thickness direction is 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 the following.

[0034] <7> according to <5> or <6> The method for manufacturing a silicon wafer, wherein in the high nitrogen concentration layer forming step, the high nitrogen concentration layer is formed by rapid thermal nitridation treatment.

[0035] <8> according to <5> ~ <7> The method for manufacturing a silicon wafer as described in any one of the above, wherein the high nitrogen concentration layer removal step includes a double-side polishing step of simultaneously polishing the front side and the back side of the silicon wafer before polishing using a double-side polishing device.

[0036] <9> according to <5> ~ <8> The method for manufacturing a silicon wafer according to any one of the preceding claims, wherein in the high nitrogen concentration layer removal step,

[0037] The grinding amount of the front surface is not less than 10 μm and not more than 12 μm,

[0038] The grinding amount of the back surface is 4 μm or more and 8 μm or less.

[0039] <10> according to <5> ~ <9> The method for manufacturing a silicon wafer as described in any one of the above, wherein the silicon wafer before grinding is a silicon wafer manufactured by a FZ method.

[0040] Effects of the Invention

[0041] According to the present invention, a silicon wafer suitable for use in an IGBT, which has high resistance, small resistance variation and can suppress the occurrence of slip, and a method for manufacturing the silicon wafer can be provided.

[0042] BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1This is a graph showing the nitrogen concentration distribution in the thickness direction of the silicon wafer in preliminary experiments 1 to 6.

[0044] Figure 2 This is a diagram showing an observation graph of the slip length on the silicon wafer surface in preliminary experiment 1 based on X-ray topography observation.

[0045] Figure 3 This is a graph showing the slip lengths of silicon wafers in preliminary experiments 1 to 6.

[0046] Figure 4 This is a graph showing calculated values ​​of nitrogen concentration distribution in the thickness direction of silicon wafers in preliminary experiments 4 to 6.

[0047] Figure 5 Schematic cross-sectional view illustrating a method for manufacturing a silicon wafer according to one embodiment of the present invention.

[0048] Figure 6 It is a schematic cross-sectional view of a silicon wafer after heat treatment and a schematic diagram showing the nitrogen concentration distribution in the thickness direction.

[0049] Figure 7 It is a schematic cross-sectional view of a silicon wafer after SMP treatment and a schematic diagram showing the nitrogen concentration distribution in the thickness direction. DETAILED DESCRIPTION

[0050] Prior to the description of the present embodiment, the following preliminary experiment was performed to confirm the relationship between the nitrogen concentration distribution in the thickness direction of the silicon wafer and the occurrence of slip.

[0051] <Preliminary Experiment>

[0052] In order to confirm the relationship between the nitrogen concentration distribution in the silicon wafer and the occurrence of slip, a silicon wafer with a diameter of 200 mm and an oxygen concentration (ASTM F121, 1979) of 1.0×10 16 atoms / cm 3 The following are silicon wafers made by the FZ method. Here, the so-called "oxygen concentration of silicon wafers" refers to the value measured using Fourier Transform Infrared Spectroscopy (FTIR) in accordance with ASTM F121-1979. In order to change the nitrogen concentration in the surface of these silicon wafers, preliminary experiment 1 without heat treatment and preliminary experiments 2 to 6 with changed heat treatment conditions were carried out. In addition, in order to suppress the diffusion of nitrogen in the silicon wafer to the outside during cooling at the surface of the silicon wafer, heat treatment was performed by rapid thermal nitridation (RTN).

[0053] [Preliminary experiment 1]

[0054] In preliminary experiment 1, the prepared silicon wafer was used directly without performing heat treatment.

[0055] [Preliminary experiment 2]

[0056] In preliminary experiment 2, the prepared silicon wafer was subjected to the following heat treatment: using an RTN furnace for rapid thermal nitridation, the temperature was raised to 1050 degrees in 20 seconds, maintained at this temperature for 30 seconds, and cooled to room temperature in 13 seconds.

[0057] [Preliminary experiment 3]

[0058] In preliminary experiment 3, the prepared silicon wafer was subjected to the following heat treatment: the temperature was raised to 1050 degrees in 20 seconds using an RTN furnace, the temperature was maintained for 120 seconds, and the temperature was lowered to room temperature in 13 seconds.

[0059] [Preliminary experiment 4]

[0060] In preliminary experiment 4, the prepared silicon wafer was subjected to the following heat treatment: the temperature was raised to 1150 degrees in 22 seconds using an RTN furnace, the temperature was maintained for 30 seconds, and the temperature was lowered to room temperature in 15 seconds.

[0061] [Preliminary experiment 5]

[0062] In preliminary experiment 5, the prepared silicon wafer was subjected to the following heat treatment: the temperature was raised to 1150 degrees in 22 seconds using an RTN furnace, maintained at this temperature for 60 seconds, and then cooled to room temperature in 15 seconds.

[0063] [Preliminary experiment 6]

[0064] In preliminary experiment 6, the prepared silicon wafer was subjected to the following heat treatment: the temperature was raised to 1250 degrees in 24 seconds using an RTN furnace, the temperature was maintained for 30 seconds, and the temperature was lowered to room temperature in 16 seconds.

[0065] Figure 1 The graph shows the results of measuring the nitrogen concentration distribution in the thickness direction of the surface layer of each silicon wafer after each heat treatment in the preliminary experiments 1 to 6 obtained in this way using secondary ion mass spectrometry (SIMS). The silicon wafer of the preliminary experiment 1 that was not heat treated had 6×10 14 (atoms / cm 3 ). In the treatment at 1050°C, the concentration in the surface layer decreases due to outward diffusion. It can be seen that at temperatures above 1150°C, the higher the temperature, the higher the nitrogen concentration due to inward diffusion.

[0066] In addition, in order to simulate the general heat treatment during IGBT device manufacturing for the silicon wafers after each heat treatment in the preliminary experiments 1 to 6, two-step heat treatments at 1150°C and 450°C were performed in a vertical furnace, and the slip length of the contact damage with the wafer boat supporting the silicon wafer was investigated. Here, the slip length was measured based on the X-ray topography image. Figure 2 This is an observation image when the slip length of the silicon wafer prepared in the preliminary experiment 1 was measured. The slip length can be confirmed at three points of the boat contact portion.

[0067] The same observation was performed on Preliminary Experiments 1 to 6. Figure 3 This is a graph comparing the slip lengths observed at three points of the boat contact portion. The shorter the slip length, the higher the slip resistance.

[0068] From this result, it can be seen that the anti-slip property of the silicon wafer can be improved by increasing the nitrogen concentration in the region near the surface layer of the silicon wafer to a certain depth. In particular, it can be seen that by performing RTN at 1150°C to 1250°C, the nitrogen concentration in the region from the outermost surface to 15 μm in the thickness direction of the silicon wafer is set to 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 , thereby being able to fully improve the anti-slip properties of the silicon wafer.

[0069] <Prediction of Nitrogen Concentration in Silicon Wafers>

[0070] In addition, it is expected that the nitrogen concentration distribution in the silicon wafer decreases as the depth increases from the surface by heat treatment in a nitrogen atmosphere. However, the nitrogen concentration distribution that can be measured by SIMS is limited to the range near the surface of the silicon wafer. Therefore, by calculating the inward diffusion of nitrogen using a general method, the nitrogen concentration from the surface of the silicon wafer to a deeper position in the thickness direction is predicted. Figure 4The distribution of calculated values ​​of the nitrogen concentration distribution inside the wafer of the silicon wafer based on preliminary experiments 4 to 6 is shown. The distribution represented by the broken line near the surface is the actual measured value, and the distribution represented by the curve in the entire depth direction is the calculated value derived from the heat treatment conditions of each preliminary experiment. As can be seen from the results, by solving the calculation of diffusion, the nitrogen concentration can be roughly predicted in the entire thickness direction of the silicon wafer. By using this predicted value, it is possible to estimate the amount of grinding required to expose the surface with the desired nitrogen concentration. Therefore, for example, on the front side of the silicon wafer where a high nitrogen concentration area is not required, it is possible to grind and grind until the high nitrogen concentration area disappears, and on the back side of the silicon wafer where the high nitrogen concentration area is preferably exposed, it is possible to grind and grind to the extent that the high nitrogen concentration area is exposed. Therefore, if a silicon wafer with a low oxygen concentration is heat treated in a nitrogen atmosphere and only the nitrogen concentration in the surface layer of the front and back sides of the silicon wafer is temporarily increased, and then only the high nitrogen concentration area on the front side is removed and the high nitrogen concentration area remains on the back side, the resistance in the entire wafer will be high and the resistance variation can be suppressed, thereby suppressing the occurrence of slip on the back side of the wafer, which is a concern in the IGBT device manufacturing process.

[0071] (Method for manufacturing silicon wafer)

[0072] Based on the above preliminary experimental results, the following detailed description of the method for manufacturing the silicon wafer involved in this embodiment is given with reference to the accompanying drawings. It should be noted that, as a principle, the same reference numerals are attached to the last two digits of the numbers for the same components, and repeated descriptions are omitted. Figure 5 to Figure 7 In order to simplify the drawings, the thickness of each component is exaggerated and different from the actual thickness. The method for manufacturing a silicon wafer according to the present invention is characterized by comprising: 17 atoms / cm -3 The silicon wafer before grinding is subjected to heat treatment as follows: a high nitrogen concentration layer forming step of forming a high nitrogen concentration layer on the surface layer portions of the front and back sides of the silicon wafer before grinding, and a high nitrogen concentration layer removing step of removing at least a portion of the high nitrogen concentration layer on the surface layer portions of the front and back sides of the silicon wafer before grinding, respectively, after the high nitrogen concentration layer forming step, wherein the maximum nitrogen concentration in the range from the outermost surface of the back side of the silicon wafer after the high nitrogen concentration layer removing step to 20 μm in the thickness direction is 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 Hereinafter, the nitrogen concentration in the range from the outermost surface of the front side of the silicon wafer after the high nitrogen concentration layer removal step to 20 μm in the thickness direction is 1×10 14 atoms / cm -3 Above and 1×10 15atoms / cm -3 Hereinafter, each configuration and each step of the present invention will be described in detail.

[0073] The method for manufacturing a silicon wafer in this embodiment is to perform a heat treatment on the silicon wafer, and finally form a high nitrogen concentration region only on the back side of the silicon wafer. Figure 5 In one embodiment shown, first, a high nitrogen concentration layer 112 on the front side and a high nitrogen concentration layer 113 on the back side are formed by heat treatment on each surface portion of the front and back sides of the silicon wafer 110 before grinding. Then, a grinding device is used to set the grinding amount and grind in such a way that the high nitrogen concentration layer on the front side of the silicon wafer 110 before grinding is removed and the high nitrogen concentration layer remains on the back side. Then, double-sided grinding and single-sided grinding are performed to adjust the surface roughness of the front outermost surface 110a of the low nitrogen concentration area. The details of each process in the first embodiment are described in turn below. It should be noted that grinding is a process of cutting the wafer using a hard grinding wheel for the purpose of removing the nitride film formed on the surface of the wafer and adjusting the thickness of the wafer. In addition, grinding is a process of polishing the wafer using a soft grinding cloth for the purpose of adjusting the flatness of the wafer.

[0074] <Silicon wafer before grinding>

[0075] As the pre-polished silicon wafer 110 used in the manufacture of the silicon wafer according to the present invention, a single crystal silicon wafer cut from single crystal silicon can be used. The single crystal silicon wafer can be a wafer obtained by slicing a single crystal silicon ingot grown by the Czochralski method (CZ method) or the floating zone melting method (FZ method) using a wire saw or the like. From the viewpoint of using it as a low-oxygen silicon wafer, it is preferred to use a silicon wafer manufactured by the FZ method. The oxygen concentration of the silicon wafer (ASTM F121, 1979) is 1×10 17 atoms / cm -3 Below, preferably 2×10 16 atoms / cm -3 Below, more preferably 1×10 16 atoms / cm -3 Here, when a silicon wafer is used for a vertical device, if there is a defect in any region in the longitudinal direction of the device formation region, leakage current is generated through the defect, thereby affecting the device characteristics. Therefore, from the perspective of obtaining better device characteristics, the silicon wafer 110 before grinding is preferably a silicon wafer that does not contain dislocation clusters and vacancy agglomeration defects (COP: Crystal Originated Particle).

[0076] Here, the "silicon wafer without COP" in this specification refers to a silicon wafer in which no COP is detected through the observation and evaluation described below. That is, first, the silicon wafer cut out and processed from the single crystal silicon ingot grown by the CZ method is cleaned by SC-1 (that is, cleaned with a mixture of ammonia water, hydrogen peroxide water and ultrapure water at a ratio of 1:1:15), and the surface of the cleaned silicon wafer is observed and evaluated using Surfscan SP-2 manufactured by KLA-Tencor as a surface defect inspection device to determine the bright spot defect (LPD: Light Point Defect) estimated to be a surface pit. At this time, the observation mode is set to Oblique mode (oblique incidence mode), and the estimation of the surface pit is based on the detection size ratio of the Wide Narrow channel. For the LPD determined in this way, an atomic force microscope (AFM: atomic Force Microscope) is used to evaluate whether it is a COP. Through this observation and evaluation, the silicon wafer in which no COP is observed is set as a "silicon wafer without COP".

[0077] On the other hand, dislocation clusters are large (about 10 μm) defects (dislocation loops) formed as aggregates of excess interstitial silicon. They can be made more visible by etching such as lithography or Cu-Decoration, making the presence of dislocation clusters easily visible.

[0078] <High Nitrogen Concentration Layer Formation Step>

[0079] The high nitrogen concentration layer forming process is a process of heat treating the silicon wafer 110 before grinding in a nitrogen atmosphere to form a high nitrogen concentration layer on the surface of the front and back of the silicon wafer 110 before grinding. The heat treatment based on this process can also be applied to a batch heat treatment device (vertical heat treatment device, horizontal heat treatment device), etc., but it is preferably carried out using a rapid temperature rise and fall heat treatment device (RTA (Rapid Thermal Annealing) furnace) capable of performing a rapid thermal nitridation (RTN) treatment of heating the wafer under a nitrogen atmosphere. In the furnace, in addition to nitrogen, an inert gas may also be contained, and the heat treatment temperature is preferably above 1100°C, and more preferably above 1150°C. In addition, the heat treatment temperature is preferably below 1350°C, and more preferably below 1300°C. The heat treatment time can be set to an appropriate time according to the furnace used. For example, the heat treatment time of the RTN furnace is preferably above 10 seconds, and more preferably above 30 seconds. In addition, similarly, it is preferably below 150 seconds, and more preferably below 120 seconds. In addition, at this time, in order to implement rapid thermal nitridation, the heating time to the maximum temperature is preferably less than 24 seconds, and more preferably less than 20 seconds. In addition, similarly, in order to implement rapid thermal nitridation, the cooling time from the maximum temperature to room temperature is preferably less than 16 seconds, and more preferably less than 13 seconds. In the heat treatment using a batch heat treatment device, it is preferably set to a heat treatment time of more than 10 minutes and less than 3 hours. In addition, the high nitrogen concentration layer on each surface formed in the high nitrogen concentration layer forming step is preferably formed in each region from the outermost surface of the front and back sides of the silicon wafer to 20μm in the thickness direction.

[0080] In the high nitrogen concentration layer forming step, Figure 6 As shown in FIG. 1 , the nitrogen in the furnace diffuses inwardly in the surface layers of the front and back sides of the pre-grinding silicon wafer 110, thereby forming a front-side high nitrogen concentration layer 112 and a back-side high nitrogen concentration layer 113 on the surface layers of each side. The higher the heat treatment temperature, the higher the nitrogen concentration in the surface layer of the pre-grinding silicon wafer 110, and the nitrogen diffuses toward the outermost surface of the pre-grinding silicon wafer 110. By heat treating the pre-grinding silicon wafer 110, a nitrogen concentration distribution of 2×10 15 atoms / cm -3 The high nitrogen concentration layer above. Figure 6 A schematic diagram of a silicon wafer having a front-side high nitrogen concentration layer 112 and a back-side high nitrogen concentration layer 113 formed thereon and a schematic conceptual diagram of the distribution of nitrogen concentration in the thickness direction of the silicon wafer having each high nitrogen concentration layer formed thereon are shown together. Figure 6 As shown, in the concentration distribution of nitrogen diffused into the silicon wafer, there are peaks in the surface layer portions of the front and back surfaces.

[0081] <High Nitrogen Concentration Layer Removal Step>

[0082] In the high nitrogen concentration layer removal process, Figure 7 As shown, after the high nitrogen concentration layer forming process, at least a portion of the high nitrogen concentration layer on the surface of the front and back sides of the silicon wafer before grinding is removed. In the grinding and polishing of the silicon wafer surface, generally, after double-sided polishing (DSP) is performed on the front and back sides of the silicon wafer, the surface of the front side of the silicon wafer is further single-sided polished (SMP). By performing double-sided polishing, the nitride film on the front and back sides of the silicon wafer is removed, and the processing deformation is removed at the same time, thereby ensuring a specified flatness, and further, by performing single-sided polishing only on the front side, the surface of the front side of the silicon wafer can be made into a specified surface roughness. However, if double-sided polishing is performed so that the grinding removal amount of the front and back sides is the same, a high nitrogen concentration layer will remain on the front side of the silicon wafer used as the active layer of the device, and the nitrogen atoms in the high nitrogen concentration layer will cause the change of the resistivity of the wafer and the occurrence of surface defects such as precipitates, so it cannot be used as a product. Therefore, in this embodiment, in the high nitrogen concentration layer removal process, in order to remove only the front side high nitrogen concentration layer 112 of the front side high nitrogen concentration layer 112 and the back side high nitrogen concentration layer 113 formed in the high nitrogen concentration layer formation process, the heat-treated wafers are ground on one side one by one, and then a double-sided grinding process is performed to adjust the flatness, but in the double-sided grinding process, a condition that the grinding speed of the front side of the silicon wafer is faster than the grinding amount of the back side of the silicon wafer can also be set. Therefore, for example, the use conditions can be changed on the upper side grinding platform and the lower side grinding platform. Specifically, for the type of grinding pad, a fixed abrasive pad with abrasive grains embedded can be used only on the upper side grinding pad, or a combination of polyurethane pads and non-woven fabric / suede can be used appropriately on the upper and lower grinding platforms. In addition, such a purpose can also be achieved by making the pressure or rotation speed of the upper and lower grinding platforms different. By processing under these conditions, the front side high nitrogen concentration layer 112 of the silicon wafer can be completely removed, and the degree of removal of the high nitrogen concentration layer can be finely adjusted to allow the back side high nitrogen concentration region 114 to remain. Note that, in the removal of the front-side high nitrogen concentration layer 112 in the high nitrogen concentration layer removal step, any method other than polishing such as etching may be used, and the method is not limited to polishing.

[0083] In addition, as described above, by using an RTN furnace for rapid thermal nitridation, the high nitrogen concentration layer can be locally present near the surface of the silicon wafer, thereby reducing the amount of grinding on the front and back sides of the silicon wafer after the high nitrogen concentration layer formation process. The amount of grinding on the front side of the silicon wafer before grinding in the high nitrogen concentration layer removal process can be set to 15 μm or less, preferably 10 μm or more and 12 μm or less. Similarly, the amount of grinding on the back side of the silicon wafer before grinding in the high nitrogen concentration layer removal process can be set to 10 μm or less, preferably 4 μm or more and 8 μm or less.

[0084] Furthermore, the maximum nitrogen concentration in the range from the outermost surface of the back side of the silicon wafer after the high nitrogen concentration layer removal step to 20 μm in the thickness direction was 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 The maximum value of nitrogen concentration is preferably set to 3×10 15 atoms / cm -3 More preferably, 4×10 15 atoms / cm -3 Above, preferably 9×10 15 atoms / cm -3 Below, it is more preferably set to 8×10 15 atoms / cm -3 The nitrogen concentration range after the high nitrogen concentration layer removal step is preferably from the outermost surface of the back side of the silicon wafer to 18 μm in the thickness direction, and more preferably from the outermost surface to 15 μm in the thickness direction.

[0085] On the other hand, the nitrogen concentration in the range from the outermost surface of the front side of the silicon wafer after the high nitrogen concentration layer removal step to 20 μm in the thickness direction is 1×10 14 atoms / cm -3 Above and 1×10 15 atoms / cm -3 Below, preferably set to 2×10 14 atoms / cm -3 More preferably, 3×10 14 atoms / cm -3 Above, preferably 9×10 14 atoms / cm -3 Below, it is more preferably set to 8×10 14 atoms / cm -3 the following.

[0086] In this way, by removing only the high nitrogen concentration layer on the front side while leaving the high nitrogen concentration region on the back side, a silicon wafer suitable for IGBT use can be manufactured, which has high resistance and small resistance variation and can suppress the occurrence of slip.

[0087] Next, a silicon wafer obtainable by the embodiment of the above-mentioned production method will be described in detail.

[0088] (Silicon Wafer)

[0089] The silicon wafer according to the present invention is a silicon wafer in which the maximum value of the nitrogen concentration in the nitrogen concentration distribution in the thickness direction of the silicon wafer is 2×10 15 atoms / cm -3 Above and 1×1016 atoms / cm -3 The following high nitrogen concentration region exists in the range from the outermost surface of the back side of the silicon wafer to 20 μm in the thickness direction, and the nitrogen concentration in the range from the outermost surface of the front side of the silicon wafer to 20 μm in the thickness direction is 1×10 14 atoms / cm -3 Above and 1×10 15 atoms / cm -3 Below, the oxygen concentration of silicon wafer (ASTM F121, 1979) is 1×10 17 atoms / cm -3 Hereinafter, the details of each structure will be described in turn. Here, since the proportion of the high nitrogen concentration region on the back surface portion is small relative to the entire silicon wafer, it can be considered that the oxygen concentration of the silicon wafer as a whole wafer is substantially the same as the oxygen concentration of the silicon wafer before heat treatment, etc.

[0090] <Oxygen Concentration of Silicon Wafer>

[0091] The oxygen concentration of the silicon wafer hardly changes before and after the high nitrogen concentration layer forming step and the polishing step during the manufacture of the silicon wafer, so the oxygen concentration of the silicon wafer can be measured as the value of the oxygen concentration of the silicon wafer before the high nitrogen concentration layer is formed. Here, the oxygen concentration refers to the oxygen concentration measured by FT-IR.

[0092] <Resistivity of silicon wafer>

[0093] The resistivity of the silicon wafer is preferably 30 Ω·cm or more and 10000 Ω·cm or less. Here, the resistivity is measured by a four-probe method. Specifically, the resistivity can be measured by measuring the center of the front surface of the silicon wafer by a four-probe method.

[0094] If it is the chip of the present invention, when there is a concern about slip in the low-oxygen silicon wafer, the occurrence of slip is suppressed because there is a high nitrogen concentration area on the back side. At the same time, since there is no resistance change except for the back surface part of the chip, it is suitable for use in IGBT devices.

[0095] Industrial Applicability

[0096] According to the present invention, it is possible to provide a silicon wafer suitable for use in IGBTs, which has little resistance variation and can suppress the occurrence of slip, and a method for manufacturing the same.

[0097] Explanation of symbols

[0098] 110 Silicon wafer before grinding

[0099] 110a The most superficial side

[0100] 112 High nitrogen concentration layer on the front side

[0101] 113 Back side high nitrogen concentration layer

[0102] 114 High nitrogen concentration area on the back side

Claims

1. A silicon wafer, wherein: In the nitrogen concentration distribution in the thickness direction of the silicon wafer, The maximum nitrogen concentration is 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 The following high nitrogen concentration region exists in the range from the outermost surface of the back side of the silicon wafer to 20 μm in the thickness direction, The nitrogen concentration in the range from the outermost surface of the front side of the silicon wafer to 20 μm in the thickness direction was 1×10 14 atoms / cm -3 Above and 1×10 15 atoms / cm -3 the following, The oxygen concentration of the silicon wafer (ASTM F121, 1979) is 1×10 17 atoms / cm -3 the following.

2. The silicon wafer according to claim 1, wherein: The high nitrogen concentration region exists in a range from the outermost surface of the back surface of the silicon wafer to 15 μm in the thickness direction.

3. The silicon wafer according to claim 1, wherein: The resistivity of the silicon wafer is greater than or equal to 30 Ω·cm and less than or equal to 10000 Ω·cm.

4. The silicon wafer according to claim 1, wherein: The silicon wafer does not contain dislocation clusters and COPs.

5. A method for manufacturing a silicon wafer, comprising: The high nitrogen concentration layer formation step is performed by setting the oxygen concentration (ASTM F121, 1979) to 1×10 17 atoms / cm -3 The silicon wafer before grinding is subjected to heat treatment to form a high nitrogen concentration layer on each surface portion of the front side and the back side of the silicon wafer before grinding, and a high nitrogen concentration layer removing step of removing at least a portion of the high nitrogen concentration layer on the surface layer portions of the front and back surfaces of the silicon wafer before polishing after the high nitrogen concentration layer forming step; The maximum nitrogen concentration in the range from the outermost surface of the back side of the silicon wafer after the high nitrogen concentration layer removal step to 20 μm in the thickness direction was 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 the following, The nitrogen concentration in the range from the outermost surface of the front side of the silicon wafer after the high nitrogen concentration layer removal step to 20 μm in the thickness direction was 1×10 14 atoms / cm- 3 Above and 1×10 15 atoms / cm -3 the following.

6. The method for manufacturing a silicon wafer according to claim 5, wherein: The maximum nitrogen concentration in the range from the outermost surface of the back side of the silicon wafer after the high nitrogen concentration layer removal step to 15 μm in the thickness direction was 2×10 15 atoms / cm -3 Above and 1×10 16 atoms / cm -3 the following.

7. The method for manufacturing a silicon wafer according to claim 5, wherein: In the high nitrogen concentration layer forming step, the high nitrogen concentration layer is formed by a rapid thermal nitridation process.

8. The method for manufacturing a silicon wafer according to claim 5, wherein: The high nitrogen concentration layer removal step includes a double-side polishing step of simultaneously polishing the front side and the back side of the pre-polishing silicon wafer using a double-side polishing device.

9. The method for manufacturing a silicon wafer according to claim 5, wherein: In the high nitrogen concentration layer removal step, the polishing amount of the front surface is 10 μm or more and 12 μm or less, and the polishing amount of the back surface is 4 μm or more and 8 μm or less.

10. The method for manufacturing a silicon wafer according to claim 5, wherein: The silicon wafer before grinding is a silicon wafer manufactured by the FZ method.

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