Preparation method of nanowire channel and detection chip
By forming pits on the outer walls of conductive lines using ion bombardment, the nanowire channel's surface area is enhanced, enabling better probe attachment and improved detection performance in field effect transistor-based detection chips.
Patent Information
- Application Number
- CN202310800036.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-30
- Publication Date
- 2024-12-31
AI Technical Summary
Existing detection chips, particularly those using field effect transistors, have limited detection performance due to a small surface area of the nanowire channel, which hinders the attachment of sensitive probes and overall detection efficiency.
A method involving forming a nanowire channel by creating pits on the outer walls of conductive lines through ion bombardment, increasing the surface area of the nanowire channel and enhancing the attachment of sensitive probes.
The increased surface area of the nanowire channel allows for more sensitive probes to be attached, improving the detection performance and sensitivity of the detection chip.
Smart Images
Figure CN119224055A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a preparation method of a nanowire channel and a detection chip. Background Art
[0002] As a common device in the field of semiconductor technology, field effect transistors have many advantages. Compared with traditional sensors (such as sensors using electrodes), applying field effect transistors to the detection field to prepare detection chips can not only make the detection chip have an extremely small size, but also improve its detection performance.
[0003] Taking the detection chip used for biological or environmental detection as an example, it has a structure similar to that of a field effect transistor, including a source terminal, a drain terminal and a channel between the source and drain terminals on a substrate, and a probe is arranged on the surface of the channel to combine with the sample to be detected to achieve detection through a slight change in resistance or potential. However, the detection performance of the above detection chip can be further improved. Summary of the invention
[0004] The purpose of the present invention is to provide a method for preparing a nanowire channel and a detection chip, thereby increasing the surface area of the nanowire channel and improving the performance of the detection chip.
[0005] In order to solve the above technical problems, the present invention provides a method for preparing a nanowire channel, comprising:
[0006] Providing a substrate, wherein the surface of the substrate is covered with an insulating layer;
[0007] forming a plurality of conductive lines arranged at intervals on the insulating layer;
[0008] An ion bombardment process is performed to remove part of particles on the outer wall of the conductive line to form a plurality of pits on the outer wall of the conductive line, and the conductive line with the pits serves as the nanowire channel.
[0009] Optionally, the conductive lines are made of silicon and / or germanium.
[0010] Optionally, the material of the conductive lines includes silicon and / or germanium in a polycrystalline structure.
[0011] Optionally, the material of the conductive lines includes amorphous silicon doped with conductive ions.
[0012] Optionally, when the ion bombardment process is performed using bombardment ions, the volume of the bombardment ions is greater than the volume of the ions of the conductive lines.
[0013] Optionally, when performing the ion bombardment process, the dose of the ion bombardment process is 10 11 ~10 16 / cm2 The energy of the ion bombardment process is 0.2keV~10keV.
[0014] Optionally, the conductive line includes a top wall, a first side wall and a second side wall, and the step of performing the ion bombardment process includes:
[0015] Performing an inclined first ion bombardment on the conductive line, wherein the first ion bombardment covers a top wall and a first side wall of the conductive line to form a plurality of pits on the top wall and the first side wall;
[0016] An inclined second ion bombardment is performed on the conductive line, wherein the second ion bombardment covers a top wall and a second side wall of the conductive line to form a plurality of pits on the top wall and the second side wall.
[0017] Optionally, the incident angles of the first ion bombardment and the second ion bombardment are greater than or equal to 5°.
[0018] Optionally, the incident angle of the first ion bombardment and the incident angle of the second ion bombardment are symmetric with respect to the normal line of the substrate surface, and other process conditions of the two are the same.
[0019] According to another aspect of the present invention, a detection chip is also provided, comprising:
[0020] substrate;
[0021] an insulating layer, covering the surface of the substrate;
[0022] A plurality of nanowire channels are arranged on the insulating layer and the outer walls of the nanowire channels have a plurality of pits, wherein the pits are formed by removing part of particles on the outer walls of the nanowire channels through an ion bombardment process.
[0023] In summary, the nanowire channel provided by the present invention forms a number of conductive lines arranged along intervals on the insulating layer of the substrate, and then performs an ion bombardment process to remove part of the particles on the outer wall of the conductive line to form a number of pits on the outer wall of the conductive line. The conductive line with pits is used as a nanowire channel. Not only does it utilize the pits on the outer wall to make the nanowire channel have a larger surface area before ion bombardment under the same size, but it also has the advantages of simple process and strong operability. The detection chip made of the nanowire channel can attach more sensitive probes by virtue of its higher specific surface area, thereby improving the performance of the detection chip. Moreover, the outer wall of the above-mentioned nanowire channel is relatively uneven, which is more conducive to the attachment of sensitive probes than a relatively flat outer wall. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Those skilled in the art should understand that the drawings are provided for a better understanding of the present invention, but do not constitute any limitation on the scope of the present invention.
[0025] Figure 1 is a flow chart of a method for preparing a nanowire channel provided in Example 1;
[0026] Figure 2a to Figure 2h This is a schematic structural diagram corresponding to the corresponding steps of the method for preparing the nanowire channel provided in Example 1.
[0027] In the attached figure:
[0028] 10 - substrate; 20 - insulating layer; 20 - conductive material layer; 21 - patterned mask layer; 22 - conductive lines; 23 - pits; 24 - nanowire channels. DETAILED DESCRIPTION
[0029] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.
[0030] As used in the present invention, the singular forms "one", "an", and "the" include plural objects, the term "or" is usually used to include the meaning of "and / or", the term "several" is usually used to include the meaning of "at least one", and the term "at least two" is usually used to include the meaning of "two or more". In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, unless the content clearly indicates otherwise.
[0031] Embodiment 1
[0032] Embodiment 1 provides a method for preparing a nanowire channel.
[0033] Figure 1 This is a flow chart of the method for preparing the nanowire channel provided in Example 1.
[0034] like Figure 1 As shown, the method for preparing the nanowire channel provided in this embodiment includes:
[0035] S01: providing a substrate, wherein the surface of the substrate is covered with an insulating layer;
[0036] S02: forming a plurality of conductive lines arranged at intervals on the insulating layer;
[0037] S03: performing an ion bombardment process to remove part of particles on the outer wall of the conductive line to form a plurality of pits on the outer wall of the conductive line, and using the conductive line with the pits as the nanowire channel.
[0038] Figure 2a to Figure 2h The schematic diagram of the structure corresponding to the corresponding steps of the method for preparing the nanowire channel provided in Example 1 is shown below. Figure 2a to Figure 2h The preparation method of the nanowire channel is described in detail.
[0039] First, please refer to Figure 2a , perform step S01, provide a substrate 10, and the surface of the substrate 10 is covered with an insulating layer 20.
[0040] The material of the substrate 10 may include any suitable base material known to those skilled in the art, for example, at least one of the following materials: silicon, glass, quartz, and plastic. The insulating layer 20 may include any suitable insulating material, such as silicon oxide or silicon nitride, and may be formed on the surface of the substrate 10 using any suitable process.
[0041] Next, step S02 is performed to form a plurality of conductive lines 22 extending along a first direction on the insulating layer 20 .
[0042] Specific steps may include: Please refer to Figure 2b , forming a conductive material layer 20 covering the surface of the insulating layer 20. The conductive material layer 20 may be a polycrystalline material including silicon and / or germanium, and may be formed by any suitable process, such as forming polycrystalline silicon covering the surface of the insulating layer 20 by a vapor deposition process.
[0043] Please refer to Figure 2c , a patterned mask layer 21 having a plurality of stripe masks is formed on the conductive material layer 20 .
[0044] Please refer to Figure 2d and 2e , using the patterned mask layer 21, an etching process is performed on the conductive material layer 20 to expose the surface of the insulating layer 20, and the remaining conductive material layer 20 is used as the conductive line 22, and then the patterned mask layer 21 is removed. A plurality of conductive lines 22 may have the same size (e.g., the same width and length) and may be arranged in parallel along the first direction. The cross-sectional shape of the conductive line may be, for example, rectangular or trapezoidal. In addition, this embodiment is also limited by the morphology of the outer wall of the conductive line 22, and its outer wall may be relatively smooth or relatively rough. Among them, Figure 2dis a cross-sectional schematic diagram, Figure 2e for Figure 2d Schematic top view of .
[0045] Next, step S03 is performed to perform an ion bombardment process to remove some particles on the outer wall of the conductive line 22 to form a plurality of pits 23 on the outer wall of the conductive line 22 , and the conductive line 22 with the pits 23 is used as a nanowire channel 24 .
[0046] This embodiment is described by taking the cross-sectional shape of the conductive line 22 as an example, wherein the outer wall of the conductive line 22 includes a top wall, a first side wall and a second side wall opposite to each other. The steps of performing the ion bombardment process include:
[0047] Please refer to Figure 2f , the conductive line 22 is subjected to an inclined first ion bombardment, and the first ion bombardment covers the top wall and the first side wall of the conductive line 22 to form a plurality of pits 23 on the top wall and the first side wall. When performing the first ion bombardment, ions with a larger volume can be used as bombardment ions, so as to cause damage to the outer wall of the conductive line 22, which is conducive to improving the efficiency of forming the pits 23, and also reduces the impact of the bombardment ions implanted into the conductive line 22 on its conductive performance. Among them, the volume of the bombardment ions with a larger volume can preferably be larger than the ion volume of the conductive line 22. Taking the conductive line 22 as an example, the material includes polysilicon, and the ion bombardment process can be performed using germanium ions and / or argon ions as bombardment ions.
[0048] In addition, when performing the first ion bombardment, the dose, energy and time of the bombardment ions can be set according to the degree of resistance of the conductive line 22 to bombardment and the number of pits 23 required on its outer wall. In one example, the dose of the first ion bombardment can be 10 11 ~10 16 / cm 2 , the energy of the first ion bombardment may be 0.2keV to 10keV. The incident angle α of the first ion bombardment may be less than the oblique angle determined by the height of the conductive line 22 and the spacing between adjacent conductive lines 22, so that the bombarding ions can cover the entire first sidewall. In practice, the incident angle α of the first ion bombardment may also be greater than or equal to 5° to improve the efficiency of bombarding the first sidewall to generate pits.
[0049] Please refer to Figure 2g, an inclined second ion bombardment is performed on the conductive line 22, and the second ion bombardment covers the top wall and the second side wall of the conductive line 22 to form a plurality of pits 23 on the top wall and the second side wall. The process conditions of the second ion bombardment can refer to the process conditions of the first ion bombardment. In a preferred example, the process conditions of the second ion bombardment can be the same as those of the first ion bombardment, so that pits 23 with similar numbers and morphologies are formed on the second side wall and the first side wall, but the incident angle of the second ion bombardment is symmetrical with the incident angle of the first ion bombardment about the normal line of the surface of the substrate 10.
[0050] Please refer to Figure 2h Thus, the above-mentioned pits 23 can be formed on the outer wall of the conductive line 22, and the conductive line 22 with the above-mentioned pits 23 is used as the nanowire channel 24. Compared with the conductive line 22 without the pits 23 before ion bombardment, the conductive line 22 with the pits 23 (nanowire channel 24) significantly increases the surface area of the conductive line 22.
[0051] Embodiment 2
[0052] Embodiment 2 provides a method for preparing a nanowire channel.
[0053] Figure 1 This is a flow chart of the method for preparing a nanowire channel provided in Example 2.
[0054] like Figure 1 As shown, the method for preparing the nanowire channel provided in this embodiment includes:
[0055] S01: providing a substrate, wherein the surface of the substrate is covered with an insulating layer;
[0056] S02: forming a plurality of conductive lines arranged at intervals on the insulating layer;
[0057] S03: performing an ion bombardment process to remove part of particles on the outer wall of the conductive line to form a plurality of pits on the outer wall of the conductive line, and using the conductive line with the pits as the nanowire channel.
[0058] The method for preparing the nanowire channel provided in the second embodiment is substantially the same as the method for preparing the nanowire channel provided in the first embodiment, and the difference lies only in the structure and formation method of the conductive line.
[0059] Specifically, the steps for forming the conductive lines include: forming an amorphous material with poor conductivity to cover the surface of the insulating layer, the amorphous material may be, for example, silicon and / or germanium with an amorphous structure, and the amorphous material may have a relatively low conductivity (its conductivity is, for example, less than the minimum value as a conductive channel); then, performing a patterning process on the amorphous material to form a number of amorphous structure lines arranged at intervals; then, performing an ion implantation process on the amorphous structure lines to inject conductive ions into the amorphous structure lines along the outer walls thereof, wherein the volume of the conductive ions is smaller than the volume of the ions of the amorphous material to improve the ion implantation efficiency; then, performing a conductive ion activation process to migrate the conductive ions into the amorphous structure lines, so that the amorphous structure lines with relatively high conductivity serve as conductive lines.
[0060] It is worth mentioning that when the conductive ions are implanted into the amorphous structure lines, the incident mode (including the incident angle) of the conductive ions can refer to the incident mode of the bombarding ions in the first embodiment.
[0061] The method of performing an ion bombardment process in the subsequent step S03 to form pits on the outer wall of the conductive line as nanowire channels can be referred to in the first embodiment and will not be described in detail here.
[0062] Embodiment 3
[0063] Embodiment 3 provides a detection chip.
[0064] The detection chip provided in this embodiment is used to detect a sample to be detected, and the sample to be detected may be a sample in the biological field or the environmental field, that is, the detection chip provided in this embodiment is used for biological detection or environmental detection. In this embodiment, the detection chip may include a substrate, an insulating layer and a nanowire channel. The insulating layer covers the surface of the substrate. A plurality of nanowire channels are arranged at intervals and are arranged on the insulating layer. In addition, a sensitive probe may be arranged on the exposed outer wall of the nanowire channel for combining with the sample to be detected to achieve the corresponding detection function.
[0065] The outer wall of the nanowire channel exposed on the insulating layer has a plurality of pits, which are formed by removing some particles on the outer wall of the nanowire channel by ion bombardment, so that the nanowire channel in the detection chip has a larger surface area than the conductive wire before ion bombardment, so that the detection chip of the same size can be modified (attached) with more sensitive probes, thereby improving the performance of the detection chip, including a higher detection limit and a higher detection sensitivity. Moreover, the outer wall of the nanowire channel is relatively uneven, which is more conducive to the attachment of sensitive probes than a flat outer wall.
[0066] In summary, the nanowire channel provided by the present invention forms a number of conductive lines arranged along intervals on the insulating layer of the substrate, and then performs an ion bombardment process to remove part of the particles on the outer wall of the conductive line to form a number of pits on the outer wall of the conductive line. The conductive line with pits is used as a nanowire channel. Not only does it utilize the pits on the outer wall to make the nanowire channel have a larger surface area before ion bombardment under the same size, but it also has the advantages of simple process and strong operability. The detection chip made of the nanowire channel can attach more sensitive probes by virtue of its larger surface area, thereby improving the performance of the detection chip. Moreover, the outer wall of the above-mentioned nanowire channel is relatively uneven, which is more conducive to the attachment of sensitive probes than a relatively flat outer wall.
[0067] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A method for preparing a nanowire channel, characterized in that: include: Providing a substrate, wherein the surface of the substrate is covered with an insulating layer; forming a plurality of conductive lines arranged at intervals on the insulating layer; An ion bombardment process is performed to remove part of particles on the outer wall of the conductive line to form a plurality of pits on the outer wall of the conductive line, and the conductive line with the pits serves as the nanowire channel.
2. The method for preparing a nanowire channel according to claim 1, characterized in that: The conductive lines are made of silicon and / or germanium.
3. The method for preparing a nanowire channel according to claim 2, characterized in that: The conductive lines are made of polycrystalline silicon and / or germanium.
4. The method for preparing a nanowire channel according to claim 2, characterized in that: The material of the conductive lines includes amorphous silicon doped with conductive ions.
5. The method for preparing a nanowire channel according to claim 1, characterized in that: When the ion bombardment process is performed using bombardment ions, the volume of the bombardment ions is greater than the volume of the ions of the conductive line.
6. The method for preparing a nanowire channel according to claim 5, characterized in that: When the ion bombardment process is performed, the dose of the ion bombardment process is 10 11 ~10 16 / cm 2 The energy of the ion bombardment process is 0.2keV~10keV.
7. The method for preparing a nanowire channel according to claim 1, characterized in that: The conductive line includes a top wall, a first side wall and a second side wall, and the steps of performing an ion bombardment process include: Performing an inclined first ion bombardment on the conductive line, wherein the first ion bombardment covers a top wall and a first side wall of the conductive line to form a plurality of pits on the top wall and the first side wall; An inclined second ion bombardment is performed on the conductive line, wherein the second ion bombardment covers a top wall and a second side wall of the conductive line to form a plurality of pits on the top wall and the second side wall.
8. The method for preparing a nanowire channel according to claim 7, characterized in that: The incident angles of the first ion bombardment and the second ion bombardment are greater than or equal to 5°.
9. The method for preparing a nanowire channel according to claim 8, characterized in that: The incident angle of the first ion bombardment and the incident angle of the second ion bombardment are symmetric with respect to the normal line of the substrate surface, and other process conditions of the two are the same.
10. A detection chip, characterized in that: include: substrate; an insulating layer, covering the surface of the substrate; A plurality of nanowire channels are arranged on the insulating layer and the outer walls of the nanowire channels have a plurality of pits, wherein the pits are formed by removing part of particles on the outer walls of the nanowire channels through an ion bombardment process.