Manufacturing method of display panel, display panel and display device

Abstract

The invention discloses a manufacturing method of a display panel, the display panel and a display device.The display panel comprises a plurality of patterned film layers formed on a substrate, and the method comprises the steps that coordinate information of the substrate serves as a reference coordinate system, and a first patterned film layer is formed on the substrate; forming a material layer of an Nth patterned film layer (N is greater than or equal to 2) on one side, far away from the substrate, of the first patterned film layer; performing a first test exposure process on the Nth patterned film layer to obtain a first identifier and first coordinate information of the first identifier; performing a second test exposure process on the Nth patterned film layer to obtain a second identifier and second coordinate information of the second identifier; obtaining the adjacent film layer deviation between the (N-1) th patterned film layer and the Nth patterned film layer by using the first coordinate information and the second coordinate information; and performing a material exposure process and an etching process on the material layer of the Nth patterned film layer by using the deviation of the adjacent film layers to form the Nth patterned film layer.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more specifically, to a method for manufacturing a display panel, a display panel, and a display device. Background Art

[0002] At present, as customers demand high-definition and multi-functional display functions for display products, the process accuracy between adjacent film layers in the AA area of ​​large-size products directly determines whether the display products can meet performance requirements.

[0003] Existing large-size display products cannot effectively design test layer accuracy graphics in the AA area. Therefore, it is impossible to accurately measure the layer accuracy at the center of the AA area. For products with lower resolution, the impact is not significant, but for high-PPi, high-precision products, the impact is fatal. Therefore, how to increase the process accuracy between adjacent film layers in the AA area of ​​large-size products is one of the problems that need to be solved urgently. Summary of the invention

[0004] An object of the present invention is to provide a method for manufacturing a display panel, a display panel and a display device to solve at least one of the problems existing in the prior art.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A first aspect of the present invention provides a method for manufacturing a display panel, wherein the display panel includes a plurality of patterned film layers formed on a substrate, and the method includes:

[0007] Using the coordinate information of the substrate as a reference coordinate system, forming a first patterned film layer on the substrate;

[0008] Forming a material layer of an Nth patterned film layer (N≥2) on a side of the first patterned film layer away from the substrate;

[0009] Performing a first test exposure process on the Nth patterned film layer to obtain a first mark and first coordinate information of the first mark;

[0010] Performing a second test exposure process on the Nth patterned film layer to obtain a second mark and second coordinate information of the second mark;

[0011] Using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer;

[0012] The material layer of the Nth patterned film layer is subjected to a material exposure process and an etching process by utilizing the adjacent film layer deviation to form the Nth patterned film layer.

[0013] In an optional embodiment, forming a first patterned film layer on a substrate further comprises:

[0014] forming a material layer of a first patterned film layer on the substrate;

[0015] forming a first sacrificial layer on the material layer of the first patterned film layer;

[0016] Performing a deformation exposure process on the first sacrificial layer to obtain deformation data of the material layer of the first patterned film layer;

[0017] The deformation amount data is used to compensate the material layer (N=2) forming the second patterned film layer.

[0018] In an optional embodiment, the orthographic projection of the first mark on the substrate and the orthographic projection of the second mark on the substrate are located in the display area of ​​the substrate.

[0019] The orthographic projections of the first mark and the second mark at the same position on the substrate have at least overlapping projections.

[0020] In an optional embodiment, before performing the first test exposure process on the Nth patterned film layer, the method further includes forming an Nth test sacrificial layer on the material layer of the Nth patterned film layer (N≥2);

[0021] The step of performing a first test exposure process on the Nth patterned film layer further comprises:

[0022] The first test exposure process is performed on the Nth test sacrificial layer using the coordinate information of the (N-2)th patterned film layer to form a first mark, and the coordinate information of the (N-2)th patterned film layer is used as a reference coordinate system to obtain the first coordinate information of the first mark.

[0023] When N=2, the first test exposure process is performed on the second test sacrificial layer according to the coordinate information of the substrate to form a first mark, and the coordinate information of the substrate is used as a reference coordinate system to obtain first coordinate information of the first mark.

[0024] In an optional embodiment, performing a second test exposure process on the Nth patterned film layer further includes:

[0025] The coordinate information of the (N-1)th patterned film layer is used to perform a second test exposure process on the Nth test sacrificial layer to form a second mark, and the coordinate information of the (N-1)th layer is used as a reference coordinate system to obtain second coordinate information of the second mark.

[0026] In an optional embodiment, the step of performing a material exposure process and an etching process on a material layer of the Nth patterned film layer by utilizing the adjacent film layer deviation further includes:

[0027] Etching the Nth test sacrificial layer at the second mark position to expose the material layer of the Nth patterned film layer;

[0028] forming an Nth process sacrificial layer on the material layer leaking out of the Nth patterned film layer;

[0029] The adjacent film layer deviation is utilized to perform exposure and etching processes on the Nth process sacrificial layer and the material layer of the Nth patterned film layer to form the Nth patterned film layer.

[0030] In an optional embodiment, the orthographic projection of the first mark on the substrate does not overlap with the orthographic projection of the first patterned film layer on the substrate, and the orthographic projection of the Nth patterned film layer on the substrate does not overlap;

[0031] The orthographic projection of the second mark on the substrate does not overlap with the orthographic projection of the first patterned film layer on the substrate, and the orthographic projection of the Nth patterned film layer on the substrate does not overlap.

[0032] In an optional embodiment, the substrate includes a test substrate and a process substrate, and the method further includes:

[0033] forming a first patterned film layer on a test substrate;

[0034] Forming a material layer of an Nth patterned film layer (N≥2) on a side of the first patterned film layer away from the test substrate;

[0035] Performing a first test exposure process on the Nth patterned film layer to obtain a first mark and first coordinate information of the first mark;

[0036] Performing a second test exposure process on the Nth patterned film layer to obtain a second mark and second coordinate information of the second mark;

[0037] Using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer;

[0038] Performing a material exposure process and an etching process on a material layer of an N-th patterned film layer by utilizing the adjacent film layer deviation to form an N-th patterned film layer until all film layers of the display panel are completed;

[0039] All the film layers of the display panel are formed on the process substrate by utilizing the adjacent film layer deviations of all the film layers of the display panel obtained on the test substrate.

[0040] In an optional embodiment, the plurality of patterned film layers include a metal shielding layer, a metal wiring layer, various conductive layers of the driving transistor, and a plurality of patterned interlayer insulating film layers for insulating the various conductive layers, which are formed on the substrate.

[0041] In an optional embodiment, when the Nth patterned film layer and the (N+1)th patterned film layer are conductive layers, after forming the Nth patterned film layer, the method further includes:

[0042] Forming an interlayer insulating film layer for insulating the (N+1)th patterned film layer on a side of the Nth patterned film layer away from the substrate;

[0043] forming an (N+1)th patterned film layer on a side of the interlayer insulating film layer insulating the (N+1)th patterned film layer away from the substrate;

[0044] Wherein, when N is 2 and both the first patterned film layer and the second patterned film layer are conductive film layers, the step of forming the first patterned film layer on the substrate includes:

[0045] forming an interlayer insulating film layer for insulating the second patterned film layer on a side of the first patterned film layer away from the substrate;

[0046] A second patterned film layer is formed on a side of the interlayer insulating film layer insulating the second patterned film layer away from the substrate.

[0047] In an optional embodiment, a plurality of display panels are distributed at different positions on the same substrate, the plurality of display panels are arranged in an array in a first direction or in a second direction, and adjacent display panels have a gap in the orthographic projection of the substrate.

[0048] In an optional embodiment, the orthographic projections of the first mark and the second mark on the substrate are also located between gaps between adjacent display panels, or at respective boundary edge positions of the substrate.

[0049] A second aspect of the present invention provides a display panel, including the method for manufacturing the display panel according to the first aspect of the present invention.

[0050] A third aspect of the present invention provides a display device, comprising the display panel according to the first aspect of the present invention.

[0051] The beneficial effects of the present invention are as follows:

[0052] The manufacturing method of the embodiment of the present invention is applied to the exposure process of each patterned film layer of the display panel, and the exposure process is divided into a test exposure process and a material exposure process. The adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer is obtained by using the first test exposure process and the second test exposure process. Therefore, in the material exposure process of formal production, the adjacent film layer deviation is used to manufacture each patterned film layer of the display panel, so as to reduce the process deviation between adjacent film layers and improve the yield and precision of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] The specific implementation modes of the present invention are further described in detail below in conjunction with the accompanying drawings.

[0054] Figure 1 A schematic diagram showing the distribution of alignment marks in the process of manufacturing a display panel in the related art;

[0055] Figure 2 A schematic diagram showing a manufacturing process of a display panel according to a first embodiment of the present invention;

[0056] Figure 3 A schematic diagram showing the layer structure of a driving transistor of a display panel according to an embodiment of the present invention;

[0057] Figure 4 A flowchart showing a film layer manufacturing process for manufacturing a display panel according to an embodiment of the present invention;

[0058] Figure 5 A schematic diagram showing the structure of a first identifier and a second identifier according to an embodiment of the present invention;

[0059] Figure 6 A process flow chart showing the process of manufacturing N=4 and the fourth patterned film layer being a source-drain electrode layer according to an embodiment of the present invention;

[0060] Figure 7 A schematic diagram showing the distribution of a first identifier and a second identifier according to an embodiment of the present invention is shown;

[0061] Figure 8 A schematic diagram showing the arrangement of a display panel according to an embodiment of the present invention is shown;

[0062] Fig. 9 A schematic diagram showing the arrangement of another display panel according to an embodiment of the present invention;

[0063] Fig.10 A schematic diagram showing a manufacturing process of a display panel according to another embodiment of the present invention;

[0064] Fig.11 Show Fig.10 A schematic diagram of the arrangement of the first identifiers in step S1005 of the method shown;

[0065] Fig.12 Show Fig.11 A schematic diagram of the arrangement of the second identifiers in step S1007 of the method shown. DETAILED DESCRIPTION

[0066] In order to explain the present invention more clearly, the present invention is further described below in conjunction with embodiments and drawings. Similar components in the drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the content specifically described below is illustrative rather than restrictive, and the protection scope of the present invention should not be limited thereto.

[0067] Figure 1 FIG. 2 shows the distribution arrangement of the alignment marks 30 on the substrate to ensure the process accuracy when a plurality of display panels 20 are formed on the same substrate 10 of an existing large-size display product. Figure 1 As can be seen, the alignment mark 30 is disposed outside the display panel 20 , and due to the large size of the display panel 20 , it is not possible to effectively design the alignment mark 30 at the AA region of the display panel 20 to ensure the film layer deviation between each film layer of each display panel.

[0068] Therefore, the embodiments of the present invention disclose a method for manufacturing a display panel, a display panel and a display device to solve the above problems.

[0069] The first embodiment of the present invention provides a method for manufacturing a display panel, wherein the display panel includes a plurality of patterned film layers formed on a substrate. In this embodiment, each patterned film layer of the display panel can be formed by an exposure process using a laser direct writing exposure machine.

[0070] In an optional embodiment, the plurality of patterned film layers include a metal shielding layer, a metal wiring layer, various conductive layers of the driving transistor, and a plurality of patterned interlayer insulating film layers for insulating the various conductive layers, which are formed on the substrate.

[0071] Exemplarily, the various conductive layers of the driving transistor may include an active layer, a gate layer, and a source-drain electrode layer. The metal wiring layer may include a gate signal line electrically connected to the gate layer; a source signal line or a drain signal line electrically connected to the source-drain electrode layer, or other signal transmission lines, etc.; the interlayer insulating layer includes a first insulating layer, a second insulating layer or a third insulating layer, etc. The technical personnel in this field shall design it according to the actual application and will not elaborate on it here.

[0072] In an embodiment of the present invention, Figure 2 As shown, the method includes:

[0073] S10, using the coordinate information of the substrate 10 as a reference coordinate system, forming a first patterned film layer on the substrate 10;

[0074] S30, forming a material layer of an Nth patterned film layer (N≥2) on a side of the first patterned film layer away from the substrate 10;

[0075] S50, performing a first test exposure process on the Nth patterned film layer to obtain a first mark and first coordinate information of the first mark;

[0076] S70, performing a second test exposure process on the Nth patterned film layer to obtain a second mark and second coordinate information of the second mark;

[0077] S90, using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer;

[0078] S110 , performing a material exposure process and an etching process on the material layer of the Nth patterned film layer by utilizing the adjacent film layer deviation to form the Nth patterned film layer.

[0079] The manufacturing method of the embodiment of the present invention is applied to the exposure process of each patterned film layer of the display panel, and the exposure process is divided into a test exposure process and a material exposure process.

[0080] In the test exposure process stage, the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer is obtained by using the first test exposure process and the second test exposure process; in the material exposure process stage of formal production, the adjacent film layer deviation is used to manufacture each patterned film layer of the display panel. Through the above steps, the manufacturing method of this embodiment can effectively reduce the process deviation between adjacent film layers in the manufacturing process, thereby improving the yield and precision of the display panel.

[0081] The manufacturing method of the embodiment of the present invention is now described:

[0082] S10 , forming a first patterned film layer 211 on the substrate 10 .

[0083] In an optional embodiment, step S10 of “forming a first patterned film layer 211 on the substrate 10” further includes:

[0084] S11, forming a material layer of a first patterned film layer 211 on the substrate 10;

[0085] S13, forming a first sacrificial layer on the material layer of the first patterned film layer 211;

[0086] S15, performing a deformation exposure process on the first sacrificial layer to obtain deformation amount data of the material layer of the first patterned film layer 211;

[0087] S17, using the deformation amount data to compensate the material layer of the second patterned film layer when N is 2.

[0088] In an embodiment of the present invention, the first patterned film layer 211 is the first patterned film layer formed by an exposure process in the manufacturing process of the display panel. After acquiring the deformation variable data after the first test sacrificial layer is subjected to the deformation exposure process, the deformation variable data generated by the material layer being subjected to the exposure energy in the laser processing process can be obtained, and the deformation variable data can be compensated in subsequent processes to reduce process errors, thereby achieving the purpose of improving processing accuracy, thereby improving the product yield and process accuracy of the display panel.

[0089] The coordinates of the first patterned film layer 211 obtained in step S10 of this embodiment are based on the coordinates of the substrate 10 as a reference coordinate system. In other words, the coordinates of the first patterned film layer 211 are based on the device coordinates of the laser processing equipment as a reference system, forming the coordinates of the first patterned film layer 211 itself, which serves as the coordinate basis for subsequent patterned film layers.

[0090] When the (N-1)th patterned film layer and the Nth patterned film layer are both conductive layers, before forming a material layer of the Nth patterned film layer (N≥2) on the side of the first patterned film layer 211 away from the substrate 10, the method further includes:

[0091] S21, forming an interlayer insulating film layer for insulating the N-th patterned film layer on a side of the (N-1)th patterned film layer away from the substrate 10;

[0092] S22, forming a material layer of the Nth patterned film layer on the side of the interlayer insulating film layer insulating the (N-1)th patterned film layer and the Nth patterned film layer away from the substrate 10;

[0093] In an optional embodiment, when N is 2 and both the first patterned film layer 211 and the second patterned film layer 222 are conductive film layers, after step S10 "forming the first patterned film layer 211 on the substrate 10", the following steps are included: forming an interlayer insulating film layer insulating the second patterned film layer 222 on the side of the first patterned film layer 211 away from the substrate 10, that is, forming a first insulating layer 241 on the first patterned film layer. After step S20, the process of step S30 is performed, that is, forming a material layer of the second patterned film layer 222 on the side of the first insulating layer 241 away from the substrate 10.

[0094] In a specific example, if Figure 3As shown, taking the first patterned film layer 211 as a metal shielding layer 211 formed on the substrate 10 and the second patterned film layer 222 as an active layer 222 formed on the metal shielding layer 211 as an example, after the metal shielding layer 211 is formed on the substrate 10, a first insulating layer 241 is formed on the metal shielding layer 211, and then a material layer of the active layer 222 is formed on the first insulating layer 241. A second insulating layer 242 is formed on the active layer 222, a gate layer 223 is formed on the second insulating layer 242, and a third insulating layer 243 is formed on the gate layer 223.

[0095] S30 , forming a material layer of an Nth patterned film layer (N≥2) on a side of the first patterned film layer 211 away from the substrate 10 .

[0096] It is worth noting that N≥2 in the embodiment of the present invention, that is, the manufacturing method of the embodiment of the present invention is applicable to each patterned film layer formed in the subsequent process of the first patterned film layer 211, for example, the second patterned film layer 222 when N=2, the third patterned film layer 223 when N=3, and the fourth patterned film layer 224 when N=4, etc. That is, the "on the side of the first patterned film layer 211 away from the substrate 10" described in the embodiment of the present invention is not limited to being adjacent to the first patterned film layer 211, but is arranged above the first patterned film layer 211, and can all be used as the Nth patterned film layer (N≥2) of this embodiment.

[0097] In this step, the material layer of the Nth patterned film layer (N≥2) formed in this embodiment, that is, this step does not form the final Nth patterned film layer (N≥2), but it is necessary to first coat the entire material layer and then subsequently expose the material layer to form the final Nth patterned film layer (N≥2).

[0098] In an optional embodiment, before step S50 "performing a first test exposure process on the Nth patterned film layer", the method further includes step S40: forming an Nth test sacrificial layer on the material layer of the Nth patterned film layer (N≥2).

[0099] Step S30 forms a material layer of the second patterned film layer 222 on the first insulating layer 241 on the first patterned film layer 211, for example, Figure 4 As shown, after the material layer of the active layer 222 is formed on the first insulating layer 241, the process of step S40 is performed to form a second test sacrificial layer 232 on the material layer of the active layer 222. Exemplarily, the second test sacrificial layer 232 may be a photoresist layer.

[0100] S50 , performing a first test exposure process on the Nth patterned film layer to obtain a first mark and first coordinate information of the first mark.

[0101] In an optional embodiment, step S50 “performing a first test exposure process on the Nth patterned film layer” further includes:

[0102] The first test exposure process is performed on the Nth test sacrificial layer using the coordinate information of the (N-2)th patterned film layer to form a first mark, and the coordinate information of the (N-2)th patterned film layer is used as a reference coordinate system to obtain the first coordinate information of the first mark.

[0103] When N=2, the first test exposure process is performed on the second test sacrificial layer 232 according to the coordinate information of the substrate 10 to form the first mark 31 , and the coordinate information of the substrate 10 is used as a reference coordinate system to obtain the first coordinate information of the first mark 31 .

[0104] The first test exposure process of this embodiment performs patterned exposure on the material of the Nth test sacrificial layer, thereby forming a patterned first mark 31, for example Figure 5 The outer frame line of the "cross" shaped logo shown forms the logo structure.

[0105] In a specific example, if Figure 3 As shown, taking the first patterned film layer 211 as the metal shielding layer 211, when N=2, the second patterned film layer 222 as the active layer 222, when N=3, the third patterned film layer 223 as the gate layer 223, and when N=4, the fourth patterned film layer 224 as the source-drain electrode layer 224 as an example.

[0106] When N = 2, Figure 4 As shown, a second test sacrificial layer 232 is formed on the active layer 222. In this step, since the coordinates of the first patterned film layer 211 are formed with the substrate 10 as the reference coordinate system, and the second test sacrificial layer 232 is a whole layer covering, the coordinate information of the second test sacrificial layer 232 is still formed with the reference coordinate system, as shown in FIG. Figure 4 As shown, the first test exposure process is performed on the second test sacrificial layer 232, thereby forming a first mark 31 located on the second test sacrificial layer 232, and the coordinate information of the substrate 10 is used as a reference coordinate system to obtain the first coordinate information of the first mark 31 located on the second test sacrificial layer 232.

[0107] When N=3, a third test sacrificial layer 233 is formed on the side of the gate layer 223 away from the substrate 10, and the first test exposure process is performed on the third test sacrificial layer 233 based on the coordinate information of the first patterned film layer 211 to form a first mark 31 located on the third test sacrificial layer 233, and the first coordinate information of the first mark 31 located on the third test sacrificial layer 233 is obtained based on the coordinate system of the first patterned film layer 211 (metal shielding layer 211).

[0108] When N=4, a fourth test sacrificial layer 234 is formed on the side of the source-drain electrode layer 224 away from the substrate 10, and the fourth test sacrificial layer 234 is subjected to a first test exposure process using the coordinate information of the second patterned film layer 222 (active layer 222) to form a first mark 31 located on the fourth test sacrificial layer 234, and the first coordinate information of the first mark 31 located on the fourth test sacrificial layer 234 is obtained using the coordinate system of the second patterned film layer 222 (active layer 222).

[0109] S70, performing a second test exposure process on the Nth patterned film layer to obtain a second mark and second coordinate information of the second mark; in an optional embodiment, step S70, "performing a second test exposure process on the Nth patterned film layer" further includes:

[0110] The coordinate information of the (N-1)th patterned film layer is used to perform a second test exposure process on the Nth test sacrificial layer to form a second mark, and the coordinate information of the (N-1)th layer is used as a reference coordinate system to obtain second coordinate information of the second mark.

[0111] The second test exposure process of this embodiment performs a second patterned exposure on the first mark 31, thereby forming a patterned second mark 32, for example Figure 5 The logo structure is formed by the inner frame line of the "cross"-shaped logo shown.

[0112] In a specific example, based on the above step S50, when N=2, as Figure 4 As shown, with the coordinate system of the first patterned film layer 211 (metal shielding layer 211) as a reference, a second test exposure process is performed on the first mark 31 located on the second test sacrificial layer 232, thereby forming a second mark 32 located on the second test sacrificial layer 232, and obtaining second coordinate information of the second mark 32 located on the second test sacrificial layer 232.

[0113] When N=3, the coordinate system of the second patterned film layer 222 (active layer 222) is used as a reference to perform a second test exposure process on the second mark 32 located on the third test sacrificial layer 233, thereby forming the second mark 32 located on the third test sacrificial layer 233 and obtaining the second coordinate information of the second mark 32 located on the third test sacrificial layer 233.

[0114] When N=4, the coordinate system of the third patterned film layer (gate layer 223) is used as a reference to perform a second test exposure process on the second mark 32 located on the fourth test sacrificial layer 234, thereby forming the second mark 32 located on the fourth test sacrificial layer 234 and obtaining the second coordinate information of the second mark 32 located on the fourth test sacrificial layer 234.

[0115] In an optional embodiment, if Figure 5 As shown, the orthographic projection of the first mark 31 on the substrate 10 and the orthographic projection of the second mark 32 on the substrate 10 are located in the display area of ​​the substrate 10.

[0116] The orthographic projections of the first mark 31 and the second mark 32 at the same position on the substrate 10 at least have overlapping projections.

[0117] like Figure 5 As shown, the patterned material layer obtained by exposing the N-th test sacrificial layer 23N is a first mark 31, and the first mark 31 is located in a "cross" shape in the orthographic projection on the substrate 10. The second mark 32 is formed by performing a second test exposure process on the first mark 31 of the N-th test sacrificial layer 23N. The second mark 32 is located on the inner side of the first mark 31. The first mark 31 and the second mark 32 at the same position have at least overlapping projections in the orthographic projection on the substrate 10. After the first test exposure process and the second test exposure process, the reference coordinate system of the first test exposure process and the reference coordinate system of the second test exposure process are different. Therefore, the error accuracy of different reference coordinate systems during the two test exposure processes, that is, the film layer deviation between adjacent film layers, can be obtained.

[0118] Based on the above principle, the first mark 31 and the second mark 32 of this embodiment are both located in the display area of ​​the substrate 10, that is, the display area of ​​each display panel can form the first mark 31 and the second mark 32, thereby effectively improving the deviation accuracy of the upper and lower layers of the display area during the manufacturing process.

[0119] S90, using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer;

[0120] In this embodiment, when N is greater than 2, the first mark 31 is formed using the first test exposure process, and has the coordinate information of the (N-2)th patterned film layer. The second mark 32 is formed using the second test exposure process, and has the coordinate information of the (N-1)th patterned film layer. When N=2, the first mark has the coordinate information of the substrate, and the second mark has the coordinate information of the first patterned film layer. Therefore, before performing the process of the Nth patterned film layer, the adjacent film layer deviation between the (N-2)th patterned film layer and the (N-1)th patterned film layer can be obtained, and the adjacent film layer deviation can be used to expose the Nth patterned film layer in the material exposure process of formal production.

[0121] S110 , performing a material exposure process and an etching process on the material layer of the Nth patterned film layer by utilizing the adjacent film layer deviation to form the Nth patterned film layer.

[0122] like Figure 6 As shown, taking N=4 and the fourth patterned film layer 224 as the source-drain electrode layer 224 as an example, before forming the fourth patterned film layer 224, the adjacent film layer deviation between the second patterned film layer (active layer 222) obtained by the first test exposure process and the third patterned film layer 223 (gate layer 223) obtained by the second test exposure process is first obtained, and then in the material exposure process stage, the material layer of the fourth patterned film layer 224 is etched to compensate for the adjacent film layer deviation of the previous step, so that the alignment accuracy of the formed fourth patterned film layer 224 and the film layer of the previous step is improved.

[0123] In an optional embodiment, if Figure 6 As shown, step S110 "performing a material exposure process and an etching process on the material layer of the Nth patterned film layer by utilizing the adjacent film layer deviation" further includes:

[0124] S1101, etching the Nth test sacrificial layer at the second mark position to expose the material layer of the Nth patterned film layer;

[0125] S1103, forming an Nth process sacrificial layer on the material layer leaking out of the Nth patterned film layer;

[0126] S1105 , performing exposure and etching processes on the Nth process sacrificial layer and the material layer of the Nth patterned film layer by utilizing the adjacent film layer deviation to form an Nth patterned film layer.

[0127] Taking the formation of N=4 and the fourth patterned film layer 224 as the source-drain electrode layer 224 as an example, before forming the fourth patterned film layer 224, since the fourth patterned film layer 224 (source-drain electrode layer 224) and the third patterned film layer 223 (gate layer 223) of this embodiment are both conductive film layers, it is necessary to first perform step S20 on the gate layer 223 to form the third insulating layer 243, such as Figure 4 shown.

[0128] Then, the processes of steps S30, S40, S50, S70 and S90 are performed to form a material layer of the fourth patterned film layer 224 on the third insulating layer 243, and a fourth test sacrificial layer 234 is formed on the material layer of the fourth patterned film layer 224, and the fourth test sacrificial layer 234 is subjected to a first test exposure process and a second test exposure process to obtain an adjacent film layer deviation, and then step S110 is performed to perform a material exposure process and an etching process on the material layer of the Nth patterned film layer using the adjacent film layer deviation.

[0129] like Figure 4 The last process step is shown in Figure 1 and Figure 6 As shown in the first process step diagram, after completing the process of step S90 , only the material layer of the fourth test sacrificial layer 234 remains except for the position of the second mark 32 .

[0130] Then, step S1101 is performed to etch the fourth test sacrificial layer 234 at the position of the second mark 32 to expose the material layer of the fourth patterned film layer 224 (source-drain electrode layer 224), and the test exposure process is ended to start the material exposure process. Further, step S1103 is performed to form a fourth process sacrificial layer 254 on the material layer of the fourth patterned film layer 224 (source-drain electrode layer 224) that is exposed. Exemplarily, the fourth process sacrificial layer 254 is a photoresist material. Then, step S1105 is performed to perform an exposure and etching process on the fourth process sacrificial layer 254 and the material layer of the fourth patterned film layer 224 (source-drain electrode layer 224) using the adjacent film layer deviation to form the fourth patterned film layer 224 (source-drain electrode layer 224).

[0131] Based on the above process, in the process of manufacturing each patterned film layer of the display panel, this embodiment designs a test exposure process, such as Figure 7As shown, the first mark 31 formed by the first test exposure process and the second mark 32 formed by the second test exposure process are located in the display area, and the orthographic projection of the first mark 31 on the substrate 10 can overlap with the orthographic projection of each N-th patterned film layer 22N in the display area of ​​the display panel on the substrate 10, and the orthographic projection of the second mark 32 on the substrate 10 can overlap with the orthographic projection of each N-th patterned film layer 22N in the display area of ​​the display panel on the substrate 10, for example. Figure 7 The first mark 31 and the second mark 32 are shown in the first row. In another example, the orthographic projection of the first mark 31 on the substrate 10 and the orthographic projection of each N-th patterned film layer 22N in the display area of ​​the display panel on the substrate 10 are avoided, and the orthographic projection of the second mark 32 on the substrate 10 can be avoided with the orthographic projection of each N-th patterned film layer 22N in the display area of ​​the display panel on the substrate 10, such as Figure 7 The first mark 31 and the second mark 32 are shown in the second row.

[0132] based on Figure 7 The position design and process design of the first mark 31 and the second mark 32 can effectively improve the deviation accuracy of the upper and lower layers of the display area of ​​the display pattern, and the manufacturing method of the above embodiment of the present invention can be directly applied to the film layer manufacturing of the display panel, reducing the verification time, and the finally formed display panel can still be lit, thereby reducing the waste of the test substrate 10 for precision testing, and has broad application prospects.

[0133] In an optional embodiment, if Figure 8 and Fig. 9 As shown, a plurality of display panels 20 are distributed at different positions of the same substrate 10 , and the plurality of display panels 20 are arranged in an array in a first direction or in a second direction, and adjacent display panels 20 have a gap in the orthographic projection of the substrate 10 .

[0134] like Figure 8 and Fig. 9 As shown, a plurality of display panels 20 are evenly distributed at different positions of the same substrate 10, for example Figure 8 As shown, multiple display panels 20 are arranged along the first direction, which is applicable to large-sized display panels 20. In the same process, the film layer structures of multiple display panels 20 located on the same horizontal plane are formed at the same time, thereby improving the manufacturing efficiency. Figure 8 As shown, all the first marks 31 and the second marks 32 are arranged on the four sides of the entire substrate 10, which can realize the positioning of the four sides of the multiple display panels 20. Combined with the manufacturing method of the display panel 20 of the above-mentioned embodiment of the present invention, the film layer alignment of the display area of ​​each display panel 20 and the alignment of multiple display panels 20 are realized, thereby improving the manufacturing accuracy.

[0135] In an optional embodiment, if Figure 8 and Fig. 9 As shown, the orthographic projections of the first mark 31 and the second mark 32 on the substrate 10 are also located between the gaps between adjacent display panels 20 , or at the respective boundary edge positions of the substrate 10 .

[0136] like Fig. 9 As shown, multiple display panels 20 are arranged in an array along the first direction and the second direction, which is suitable for small-sized display panels 20. In the same process, the film layer structures of multiple display panels 20 located on the same horizontal plane are formed at the same time, thereby improving the manufacturing efficiency. Fig. 9 As shown, all the first marks 31 and the second marks 32 are arranged on the four sides of the entire substrate 10 and between the gaps of the adjacent display panels 20, so as to realize the positioning of the four sides of the multiple display panels 20. Combined with the manufacturing method of the display panel 20 of the above-mentioned embodiment of the present invention, the film layer alignment of the display area of ​​each display panel 20 and the alignment of the multiple display panels 20 are realized, thereby improving the manufacturing accuracy.

[0137] Another embodiment of the present invention provides another method for manufacturing a display panel.

[0138] In another optional embodiment, the substrate includes a test substrate and a process substrate, such as Fig.10 As shown, the method also includes:

[0139] S1001, forming a first patterned film layer on a test substrate;

[0140] S1003, forming a material layer of an Nth patterned film layer (N≥2) on a side of the first patterned film layer away from the test substrate;

[0141] S1005, performing a first test exposure process on the Nth patterned film layer to obtain a first mark and first coordinate information of the first mark;

[0142] S1007, performing a second test exposure process on the Nth patterned film layer to obtain a second mark and second coordinate information of the second mark;

[0143] S1009, using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer;

[0144] S10011, performing a material exposure process and an etching process on a material layer of an N-th patterned film layer by utilizing the adjacent film layer deviation to form an N-th patterned film layer, until all film layers of the display panel are completed;

[0145] S10013. Form all the film layers of the display panel on the process substrate using the adjacent film layer deviations of all the film layers of the display panel obtained on the test substrate.

[0146] Different from the above-mentioned embodiment Figure 2 It can be directly applied to the processing technology of the display panel. The manufacturing method of this embodiment carries out the test process and the production process separately, separates the test substrate from the process product, and the test exposure process performed on the test substrate is used to verify the film layer deviation between each adjacent film layer, and the film layer deviation result obtained by the test exposure process is applied to the processing technology of the process substrate, thereby achieving the purpose of improving the manufacturing accuracy of the film layer deviation of each film layer of the display panel.

[0147] Based on the present invention Fig.10 In another optional embodiment, the manufacturing method shown in Fig.11 As shown, the orthographic projection of the first mark 31 on the test substrate 11 does not overlap with the orthographic projection of the first patterned film layer 211 on the test substrate 11, and the orthographic projection of the Nth patterned film layer on the test substrate 11 does not overlap; the orthographic projection of the second mark 32 on the test substrate 11 does not overlap with the orthographic projection of the first patterned film layer 211 on the test substrate 11, and the orthographic projection of the Nth patterned film layer on the test substrate 11 does not overlap.

[0148] In this embodiment, Fig.10 As shown, the Nth patterned film layer of the display area of ​​the display panel of this embodiment is designed to be disconnected, and the first mark 31 is located at the disconnected position of the disconnected Nth patterned film layer. The manufacturing method of this embodiment needs to enable the test substrate 11 separately, which is equivalent to cutting off the metal wiring of the display area. In an optional embodiment, as shown in FIG. Fig.11 As shown, in the process of performing the first test exposure process on the N-th test sacrificial layer 23N in step S1005, a pattern mark corresponding to the N-th patterned film layer is formed at the position of the N-th patterned film layer while forming the first mark 31. That is, in this step, in addition to retaining the material layer of the N-th test sacrificial layer 23N at the position of the first mark 31, the material layer of the N-th test sacrificial layer 23N at the position of the N-th patterned film layer is also retained, and the material layer of the N-th test sacrificial layer 23N at other positions is exposed and etched.

[0149] Further, in an optional embodiment, if Fig.12As shown, during the second test exposure process of step S1007, the material of the Nth test sacrificial layer 23N at the position of the first mark 31 is exposed to form a second mark 32. In this step, based on step S1005, the material layer of the Nth test sacrificial layer 23N at the position of the Nth patterned film layer is not exposed.

[0150] Therefore, the method of this embodiment cannot form a conductive patterned film layer, that is, the test substrate 11 cannot be lit. Therefore, after forming each patterned film layer of the display panel on the test substrate 11, the deviation of adjacent film layers is applied to the process substrate, thereby improving the manufacturing accuracy of the display panel and reducing the stacking deviation.

[0151] It is worth noting that the other steps of steps S1001, S1003, S1005, S1007, S1009 and S10011 of this embodiment can be referred to Figure 2 The production method shown is for reference only. Figure 2 The manufacturing method shown in FIG. 1 then performs step S10013 to form all the film layers of the display panel on the process substrate using the adjacent film layer deviations of all the film layers of the display panel obtained on the test substrate 11 .

[0152] It is also worth mentioning that Fig.10 The arrangement of the display panel of the manufacturing method shown can also be applied to Figure 8 and Fig. 9 The arrangement structure of the display panel shown in the figure can be used as a reference for design.

[0153] Another embodiment of the present invention provides a display panel, which includes a display panel formed by the above manufacturing method. It is worth noting that the specific layer structure embodiment of the display panel of the embodiment of the present invention can refer to the manufacturing method of the display panel of the above embodiment, which will not be repeated here.

[0154] Another embodiment of the present invention provides a display device, which includes the display panel of the above embodiment of the present invention. The display device can be applied to any product or component with a display function, such as electronic paper, mobile phones, tablet computers, televisions, monitors, notebook computers, digital photo frames, and navigators, and this embodiment does not limit this.

[0155] In the description of the present invention, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0156] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the embodiments here. All obvious changes or modifications derived from the technical solution of the present invention are still within the protection scope of the present invention.

Claims

1. A method for manufacturing a display panel, wherein the display panel comprises a plurality of patterned film layers formed on a substrate, characterized in that: The method comprises: Using the coordinate information of the substrate as a reference coordinate system, forming a first patterned film layer on the substrate; forming a material layer of an Nth patterned film layer (N≥2) on a side of the first patterned film layer away from the substrate; Performing a first test exposure process on the Nth patterned film layer to obtain a first mark and first coordinate information of the first mark; Performing a second test exposure process on the Nth patterned film layer to obtain a second mark and second coordinate information of the second mark; Using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer; The material layer of the Nth patterned film layer is subjected to a material exposure process and an etching process by utilizing the adjacent film layer deviation to form the Nth patterned film layer.

2. The method according to claim 1, characterized in that: Forming a first patterned film layer on a substrate further comprises: forming a material layer of a first patterned film layer on the substrate; forming a first sacrificial layer on the material layer of the first patterned film layer; Performing a deformation exposure process on the first sacrificial layer to obtain deformation data of the material layer of the first patterned film layer; The deformation amount data is used to compensate the material layer of the second patterned film layer when N is 2.

3. The method according to claim 1, characterized in that: The orthographic projection of the first mark on the substrate and the orthographic projection of the second mark on the substrate are located in the display area of ​​the substrate, The orthographic projections of the first mark and the second mark at the same position on the substrate have at least overlapping projections.

4. The method according to claim 1, characterized in that: Before performing the first test exposure process on the Nth patterned film layer, the method further comprises forming an Nth test sacrificial layer on the material layer of the Nth patterned film layer (N≥2); The step of performing a first test exposure process on the Nth patterned film layer further comprises: The first test exposure process is performed on the Nth test sacrificial layer using the coordinate information of the (N-2)th patterned film layer to form a first mark, and the coordinate information of the (N-2)th patterned film layer is used as a reference coordinate system to obtain the first coordinate information of the first mark. When N=2, the first test exposure process is performed on the second test sacrificial layer according to the coordinate information of the substrate to form a first mark, and the coordinate information of the substrate is used as a reference coordinate system to obtain first coordinate information of the first mark.

5. The method according to claim 4, characterized in that: The second test exposure process for the Nth patterned film layer further includes: The coordinate information of the (N-1)th patterned film layer is used to perform a second test exposure process on the Nth test sacrificial layer to form a second mark, and the coordinate information of the (N-1)th layer is used as a reference coordinate system to obtain second coordinate information of the second mark.

6. The method according to claim 1, characterized in that: The method of performing a material exposure process and an etching process on the material layer of the Nth patterned film layer by utilizing the adjacent film layer deviation further includes: Etching the Nth test sacrificial layer at the second mark position to expose the material layer of the Nth patterned film layer; forming an Nth process sacrificial layer on the material layer leaking out of the Nth patterned film layer; The adjacent film layer deviation is utilized to perform exposure and etching processes on the Nth process sacrificial layer and the material layer of the Nth patterned film layer to form the Nth patterned film layer.

7. The manufacturing method according to claim 1, characterized in that: The orthographic projection of the first mark on the test substrate does not overlap with the orthographic projection of the first patterned film layer on the test substrate, and the orthographic projection of the Nth patterned film layer on the test substrate does not overlap; The orthographic projection of the second mark on the test substrate does not overlap with the orthographic projection of the first patterned film layer on the test substrate, and the orthographic projection of the Nth patterned film layer on the test substrate does not overlap.

8. The method according to claim 7, characterized in that: The substrate includes a test substrate and a process substrate, and the method further includes: forming a first patterned film layer on a test substrate; Forming a material layer of an Nth patterned film layer (N≥2) on a side of the first patterned film layer away from the test substrate; Performing a first test exposure process on the Nth patterned film layer to obtain a first mark and first coordinate information of the first mark; Performing a second test exposure process on the Nth patterned film layer to obtain a second mark and second coordinate information of the second mark; Using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer; Performing a material exposure process and an etching process on a material layer of an N-th patterned film layer by utilizing the adjacent film layer deviation to form an N-th patterned film layer until all film layers of the display panel are completed; All the film layers of the display panel are formed on the process substrate by utilizing the deviations of adjacent film layers of all the film layers of the display panel obtained on the test substrate.

9. The manufacturing method according to claim 1, characterized in that: The plurality of patterned film layers include a metal shielding layer, a metal wiring layer, various conductive layers of the driving transistor, and a plurality of patterned interlayer insulating film layers for insulating the various conductive layers, which are formed on the substrate.

10. The manufacturing method according to claim 9, characterized in that: When the (N-1)th patterned film layer and the Nth patterned film layer are both conductive layers, before forming a material layer of the Nth patterned film layer (N≥2) on the side of the first patterned film layer away from the substrate, the method further includes: forming an interlayer insulating film layer for insulating the N-th patterned film layer on a side of the (N-1)th patterned film layer away from the substrate; Forming a material layer for the Nth patterned film layer on a side of the interlayer insulating film layer insulating the (N-1)th patterned film layer and the Nth patterned film layer away from the substrate; Among them, when N is 2 and the first patterned film layer and the second patterned film layer are both conductive film layers, after forming the first patterned film layer on the substrate, it includes: forming an interlayer insulating film layer on the side of the first patterned film layer away from the substrate to insulate the second patterned film layer.

11. The production method according to any one of claims 1 to 10, characterized in that: A plurality of display panels are distributed at different positions of the same substrate. The plurality of display panels are arranged in an array in a first direction or in a second direction, and adjacent display panels have a gap in the orthographic projection of the substrate.

12. The manufacturing method according to claim 11, characterized in that: The orthographic projections of the first mark and the second mark on the substrate are also located between gaps between adjacent display panels, or at respective boundary edge positions of the substrate.

13. A display panel, characterized in that: The display panel comprises a display panel formed by the manufacturing method according to any one of claims 1 to 12.

14. A display device, characterized in that: The display device comprises the display panel according to claim 13.

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