Oxide semiconductor layer, method for manufacturing oxide semiconductor layer, semiconductor device, and method for manufacturing semiconductor device

Abstract

Provided is a transistor having good electrical characteristics. Provided is a transistor having a large on-state current. Provided is a transistor having low parasitic capacitance. Provided are a transistor, a semiconductor device, a memory device, and a method for manufacturing the semiconductor device that can achieve miniaturization or high integration. One embodiment of the present invention is a transistor, a semiconductor device, a memory device, or a method for manufacturing an oxide semiconductor layer, the oxide semiconductor layer including a first region, a second region on the first region, and a third region on the second region, the first region is located at 0 nm or more and 3 nm or less in a substantially vertical direction from a surface on which the oxide semiconductor layer is formed, and the thickness of the first region is 0 nm or more and 3 nm or less in a cross-sectional observation of the oxide semiconductor layer using a transmission electron microscope. In each of the first region, the second region, and the third region, bright spots arranged in layers in a direction parallel to the surface to be formed are observed.

Claims

1. An oxide semiconductor layer comprising indium, in, The oxide semiconductor layer includes a first region, a second region on the first region, and a third region on the second region, The first region is located at a distance of 0 nm or more and 3 nm or less from the surface on which the oxide semiconductor layer is formed in a direction substantially perpendicular to the surface. Furthermore, when a cross section of the oxide semiconductor layer is observed using a transmission electron microscope, bright spots arranged in layers in a direction parallel to the surface are observed in the first region, the second region, and the third region.

2. The oxide semiconductor layer according to claim 1, wherein said second region comprises zinc, the second region comprises crystals, And the c-axis of the crystal is substantially parallel to the normal direction of the surface.

3. The oxide semiconductor layer according to claim 1, The c-axis orientation degree in the second region is higher than the c-axis orientation degree in the first region.

4. The oxide semiconductor layer according to claim 1, The c-axis orientation degree in the third region is higher than the c-axis orientation degree in the first region.

5. The oxide semiconductor layer according to claim 1, wherein the content ratio of indium in the first region is higher than the content ratio of indium in the second region, And the content ratio of indium in the third region is higher than the content ratio of indium in the second region.

6. A method for manufacturing an oxide semiconductor layer, comprising the following steps: forming a first metal oxide on a surface of the layer; forming a second metal oxide on the first metal oxide; and forming a third metal oxide on the second metal oxide, in, The first metal oxide and the third metal oxide are both formed by an ALD method using a precursor containing indium and an oxidant. Furthermore, the second metal oxide is formed by a sputtering method using a sputtering target containing indium.

7. The method for manufacturing an oxide semiconductor layer according to claim 6, wherein the sputtering target comprises zinc, And the sputtering method is performed in an atmosphere including oxygen.

8. The method for manufacturing an oxide semiconductor layer according to claim 6, The substrate heating temperature in the ALD method is 100° C. or higher and 350° C. or lower.

9. The method for manufacturing an oxide semiconductor layer according to claim 6, When the oxide semiconductor layer is cross-sectionally observed using a transmission electron microscope, bright spots arranged in layers in a direction parallel to the surface of the layer are observed in the first metal oxide, the second metal oxide, and the third metal oxide.

10. The method for manufacturing an oxide semiconductor layer according to claim 6, wherein no clear boundary is observed between the first metal oxide and the second metal oxide, And no clear boundary is observed between the second metal oxide and the third metal oxide.

11. The method for manufacturing an oxide semiconductor layer according to claim 6, After the third metal oxide is formed on the second metal oxide, a heat treatment at 350° C. or higher and 550° C. or lower is performed.

12. A semiconductor device comprising: a transistor on a first insulating layer; as well as The second insulating layer, The transistor includes a first conductive layer on the first insulating layer, a second conductive layer, an oxide semiconductor layer, a gate insulating layer and a gate electrode. The second insulating layer is located between the first conductive layer and the second conductive layer. The second conductive layer is located on the second insulating layer, The second insulating layer and the second conductive layer have a first opening that reaches the first conductive layer. The oxide semiconductor layer is in contact with a side surface of the second insulating layer in the first opening and a side surface of the second conductive layer in the first opening, The gate insulating layer is located on the oxide semiconductor layer, In the first opening, the gate electrode has a region overlapping the oxide semiconductor layer via the gate insulating layer. The oxide semiconductor layer includes a first region, a second region on the first region, and a third region on the second region, The first region is located at a distance of 0 nm or more and 3 nm or less from the surface on which the oxide semiconductor layer is formed in a direction substantially perpendicular to the surface. Furthermore, when a cross section of the oxide semiconductor layer is observed using a transmission electron microscope, bright spots arranged in layers in a direction parallel to the surface are observed in the first region, the second region, and the third region.

13. The semiconductor device according to claim 12, wherein the side surface of the second insulating layer in the first opening has a fourth region, An angle formed by the top surface of the first conductive layer and the fourth region is greater than or equal to 75 degrees and less than or equal to 90 degrees. And the first region is in contact with the fourth region.

14. A method for manufacturing a semiconductor device, comprising the following steps: forming a first insulating layer on the first conductive layer; forming a second conductive layer on the first insulating layer; Forming a first opening reaching the first conductive layer by removing a portion of the second conductive layer and a portion of the first insulating layer, so that a top surface of the first conductive layer is exposed; forming a first metal oxide in contact with the top surface of the first conductive layer, the side surface of the first opening in the first insulating layer, the side surface of the first opening in the second conductive layer, and the top surface of the second conductive layer; forming a second metal oxide on the first metal oxide; forming a third metal oxide on the second metal oxide; forming a second insulating layer in contact with a top surface of the third metal oxide; and, forming a third conductive layer on the second insulating layer, in, The first metal oxide and the third metal oxide are both formed by an ALD method using a precursor containing indium and an oxidant. Furthermore, the second metal oxide is formed by a sputtering method using a sputtering target containing indium.

15. The method for manufacturing a semiconductor device according to claim 14, The third conductive layer is formed by a metal CVD method at a temperature above 250°C.

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