Fixture design method and device, equipment, storage medium and product

Abstract

The invention discloses a clamp design method and device, equipment, a storage medium and a product, and relates to the technical field of clamp design, and the clamp design method comprises the steps: obtaining the packaging width, impedance and dielectric thickness range of each to-be-tested device; obtaining a dielectric layer thickness value of each to-be-tested device according to the dielectric thickness range; according to the thickness value of the dielectric layer and the impedance, obtaining the left-right spacing of each to-be-tested device; and obtaining a clamp model of the to-be-tested device according to the packaging width, the thickness value of the dielectric layer, the left-right distance and a preset lamination mode. Compared with the prior art, the size of the clamp is better controlled, the number of tested passive devices is increased, the packaging types are increased, and the test cost limitation is also reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of fixture design, and in particular to a fixture design method, device, equipment, storage medium and product. Background Art

[0002] Conventional fixture design methods will increase the number of test steps when testing multiple devices with the same package. Passive devices need to be constantly soldered and removed. Multiple operations will cause irreversible damage to the fixture, directly affecting the test results. If multiple passive devices with the same package size are placed on a fixture, the size of the fixture will be difficult to control, the number of passive devices to be tested will be large, the number of package types will be large, and the test cost will be limited.

[0003] The above contents are only used to assist in understanding the technical solution of the present invention and do not constitute an admission that the above contents are prior art. Summary of the invention

[0004] The main purpose of the present invention is to provide a fixture design method, device, equipment, storage medium and product, aiming to solve the technical problems that the size of the fixture is difficult to control, the number of passive device tests is large, the number of packaging types is large, and the test cost is limited.

[0005] To achieve the above object, the present invention provides a fixture design method, the method comprising:

[0006] Obtain the package width, impedance and dielectric thickness range of each device under test;

[0007] Obtaining a dielectric layer thickness value of each of the devices under test according to the dielectric thickness range;

[0008] According to the dielectric layer thickness value and the impedance, obtaining the left-right spacing of each of the devices under test;

[0009] A fixture model of the device under test is obtained according to the package width, the dielectric layer thickness, the left-right spacing, and a preset stacking method.

[0010] In one embodiment, the step of obtaining the package width, impedance and dielectric thickness range of each device under test includes:

[0011] Firstly, the package width and dielectric constant of each device under test are obtained;

[0012] The impedance and the dielectric thickness range are obtained according to the package width and the dielectric constant.

[0013] In one embodiment, the step of obtaining the dielectric layer thickness value of each of the devices under test according to the dielectric thickness range includes:

[0014] The preset stacking method is to set the wiring layer of the device under test as the first layer, and the remaining layers are stacked in sequence with the dielectric layer on the top and the reference layer on the bottom;

[0015] The dielectric layer thickness value is obtained according to the dielectric thickness range between each of the devices under test and a preset reference layer thickness value.

[0016] In one embodiment, the dielectric thickness range includes at least a first thickness range and a second thickness range, the dielectric layer thickness value includes at least a first dielectric layer thickness value, a second dielectric layer thickness value and a third dielectric layer thickness value, and the step of obtaining the dielectric layer thickness value according to the dielectric thickness range between each of the devices under test and the preset reference layer thickness value includes:

[0017] When the thickness value of the first dielectric layer satisfies the intersection value of the first thickness range and the second thickness range, the upper limit value of the first thickness range is taken as the thickness value of the first dielectric layer;

[0018] According to the symmetry principle of the preset stacking method, the thickness of the third dielectric layer is equal to the thickness of the first dielectric layer;

[0019] The second dielectric layer thickness value is obtained according to the first dielectric layer thickness value, the third dielectric layer thickness value, the dielectric thickness range and the preset reference layer thickness value.

[0020] In one embodiment, the step of obtaining the left-right spacing of each of the devices under test according to the dielectric layer thickness value and the impedance includes:

[0021] Obtaining the coplanarity of each of the devices under test;

[0022] The impedance and the coplanarity are used as input values, and the left-right spacing of each of the devices under test is obtained through calculation of the coplanar waveguide structure.

[0023] In one embodiment, the step of obtaining the fixture model of the device under test according to the package width, the dielectric layer thickness value, the left-right spacing and the preset stacking method includes:

[0024] The package width, the dielectric layer thickness, the left-right spacing and the preset reference layer thickness are used as input values, calculated by EDA design software and simulated by three-dimensional simulation software to obtain the fixture model of the device under test.

[0025] In addition, to achieve the above-mentioned purpose, the present invention also provides a fixture design device, the device comprising:

[0026] An acquisition module is used to obtain the package width, impedance and dielectric thickness range of each device under test;

[0027] A first calculation module, used for obtaining the dielectric layer thickness value of each of the devices under test according to the dielectric thickness range;

[0028] A second calculation module, used for obtaining the left-right spacing of each of the devices under test according to the dielectric layer thickness value and the impedance;

[0029] The control module is used to obtain a fixture model of the device under test according to the package width, the dielectric layer thickness value, the left-right spacing and a preset stacking method.

[0030] In addition, to achieve the above objectives, the present invention also proposes a fixture design device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the fixture design method described above.

[0031] In addition, to achieve the above-mentioned purpose, the present invention also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the fixture design method described above are implemented.

[0032] In addition, to achieve the above-mentioned purpose, the present invention also provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps of the fixture design method described above are implemented.

[0033] One or more technical solutions proposed in the present invention have at least the following technical effects:

[0034] The present invention obtains the package width, impedance and dielectric thickness range of each device under test; obtains the dielectric layer thickness value of each device under test according to the dielectric thickness range; obtains the left-right spacing of each device under test according to the dielectric layer thickness value and the impedance; and obtains the fixture model of the device under test according to the package width, the dielectric layer thickness value, the left-right spacing and the preset stacking method. Compared with the prior art, the present invention has better control over the size of the fixture, increases the number of passive device tests, increases the number of package types, and reduces the test cost limit. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0037] Figure 1 A schematic diagram of a flow chart of a first embodiment of a fixture design method of the present invention;

[0038] Figure 2 A schematic diagram of a flow chart of a second embodiment of a fixture design method of the present invention;

[0039] Figure 3 A schematic diagram of a flow chart of a third embodiment of a fixture design method of the present invention;

[0040] Figure 4 A schematic diagram of the module structure of a fixture design device according to an embodiment of the present invention;

[0041] Figure 5 Schematic diagram of the device structure of the hardware operating environment involved in the fixture design method in the embodiment of the present invention.

[0042] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings in conjunction with the embodiments. DETAILED DESCRIPTION

[0043] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present invention and are not used to limit the present invention.

[0044] In order to better understand the technical solution of the present invention, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0045] The main solution of the embodiment of the present invention is: obtaining the package width, impedance and dielectric thickness range of each device under test; obtaining the dielectric layer thickness value of each device under test according to the dielectric thickness range; obtaining the left-right spacing of each device under test according to the dielectric layer thickness value and the impedance; obtaining the fixture model of the device under test according to the package width, the dielectric layer thickness value, the left-right spacing and the preset stacking method.

[0046] In this embodiment, for the convenience of description, the following description is made with the identification controller as the execution subject.

[0047] The existing technology will increase the number of test steps when testing multiple devices with the same package, and the passive devices need to be constantly welded and removed. Multiple operations will cause irreversible damage to the fixture, which will directly affect the test results. If multiple passive devices with the same package size are placed on a fixture, the size of the fixture will be difficult to control, the number of passive devices to be tested will be large, the number of package types will be large, and the test cost will be limited.

[0048] The present invention provides a solution, by obtaining the package width, impedance and dielectric thickness range of each device under test; obtaining the dielectric layer thickness value of each device under test according to the dielectric thickness range; obtaining the left-right spacing of each device under test according to the dielectric layer thickness value and the impedance; and obtaining the fixture model of the device under test according to the package width, the dielectric layer thickness value, the left-right spacing and the preset stacking method. Compared with the prior art, the present invention has better control over the size of the fixture, increases the number of passive device tests, increases the number of package types, and reduces the test cost limit.

[0049] It should be noted that the execution subject of this embodiment can be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, etc. The controller is taken as an example to illustrate this embodiment and the following embodiments.

[0050] Based on this, an embodiment of the present invention provides a fixture design method, referring to Figure 1 , Figure 1 It is a schematic diagram of the flow chart of the first embodiment of the clamp design method of the present invention.

[0051] In this embodiment, the fixture design method includes steps S10 to S40:

[0052] Step S10, obtaining the package width, impedance and dielectric thickness range of each device under test.

[0053] It should be noted that the above package width can be 0.3mm, 0.5mm, etc., and can be calibrated;

[0054] It should be noted that the above impedance can be 45 ohms or 55 ohms, etc.;

[0055] It should be noted that the thickness of the above medium can range from 0.2 mm to 0.3 mm, or from 0.95 mm to 2.2 mm, etc., and can be calibrated.

[0056] It is understandable that in different fixture design models, the package width, the impedance, and the dielectric thickness range are all different, and this embodiment does not impose any limitation on this.

[0057] In a specific implementation, the package width of each of the above-mentioned devices under test can be directly obtained through a measuring tool, and the impedance and the dielectric thickness range can be obtained through impedance calculation software.

[0058] Step S20, obtaining the dielectric layer thickness value of each of the devices under test according to the dielectric thickness range.

[0059] It should be noted that the thickness of the dielectric layer can be 0.3 mm or 1.27 mm, and can be calibrated.

[0060] It is understandable that in different fixture design models, the thickness values ​​of the dielectric layer are all different, and this embodiment does not impose any limitation on this.

[0061] In a specific implementation, the dielectric layer thickness value of each of the above-mentioned devices under test can be obtained by calculation according to the above-mentioned dielectric thickness range.

[0062] Step S30, obtaining the left-right spacing of each of the devices under test according to the dielectric layer thickness value and the impedance.

[0063] It should be noted that the above-mentioned left-right spacing can be 0.127 mm, or 0.18 mm, etc., and can be calibrated.

[0064] It is understandable that the above left-right spacing is different in different fixture design models, and this embodiment does not impose any limitation on this.

[0065] In a specific implementation, when the dielectric layer thickness value is determined, due to impedance problems during routing, it is necessary to adjust the left and right spacings of the above-mentioned devices under test to balance the impedance. The left and right spacings of the above-mentioned devices under test can be obtained by calculation.

[0066] Step S40, obtaining a fixture model of the device under test according to the package width, the dielectric layer thickness, the left-right spacing, and a preset stacking method.

[0067] It should be noted that the above-mentioned preset stacking method can be a stacking method in which the wiring layer of the above-mentioned device under test is set as the first layer, and the remaining layers are stacked in sequence with the dielectric layer on the top and the reference layer on the bottom.

[0068] In a specific implementation, the spatial distribution of the first layer of the above-mentioned fixture model is determined according to the above-mentioned package width, the above-mentioned dielectric layer thickness value determines the distribution of the above-mentioned fixture model in the vertical direction and the thickness of the entire model, and the above-mentioned left-right spacing combined with the above-mentioned preset stacking method can determine the distribution of the above-mentioned fixture model in the horizontal direction and the width of the entire model. In summary, the above-mentioned fixture model of the above-mentioned device under test can be obtained.

[0069] This embodiment provides a fixture design method, by obtaining the package width, impedance and dielectric thickness range of each device under test; obtaining the dielectric layer thickness value of each device under test according to the dielectric thickness range; obtaining the left and right spacing of each device under test according to the dielectric layer thickness value and the impedance; and obtaining the fixture model of the device under test according to the package width, the dielectric layer thickness value, the left and right spacing and the preset stacking method. Compared with the prior art, the present invention has better control over the size of the fixture, increases the number of passive device tests, increases the number of package types, and reduces the test cost limit.

[0070] In this embodiment, step S10 includes steps S101 to S102:

[0071] Step S101 , first obtain the package width and dielectric constant of each of the devices under test.

[0072] It should be noted that the above dielectric constant is related to the material of the above device under test.

[0073] It is understandable that the above dielectric constants are different in different fixture design models, and this embodiment does not limit this.

[0074] In a specific implementation, the package width of each of the devices under test is first obtained, and the dielectric constant of each of the devices under test is obtained by measurement and calculation.

[0075] Step S102, obtaining the impedance and the dielectric thickness range according to the package width and the dielectric constant.

[0076] In a specific implementation, the package width and the dielectric constant are used as input values, and the impedance and the dielectric thickness range can be obtained by calculation using impedance calculation software.

[0077] Based on the first embodiment of the present invention, in the second embodiment of the present invention, the same or similar contents as those in the first embodiment can refer to the above introduction, and will not be repeated in the following. Figure 2 , Figure 2 A schematic diagram of the flow chart of the second embodiment of the fixture design method of the present invention.

[0078] In this embodiment, step S20 includes steps S201 to S202:

[0079] Step S201 , the preset stacking method is to set the wiring layer of the device under test as the first layer, and stack the remaining layers in sequence with the dielectric layer on the top and the reference layer on the bottom.

[0080] It should be noted that the above wiring layer can be 0.3mm or 0.5mm, which is determined by the package width of the above device under test and can be calibrated;

[0081] It should be noted that the above dielectric layer can be 0.3 mm or 1.27 mm, which is related to the thickness range of the above dielectric layer and can be calibrated;

[0082] It should be noted that the reference layer can be 0.04 mm, which is related to the selected metal material and can be calibrated.

[0083] It is understandable that in different fixture design models, the routing layer, the dielectric layer, and the reference layer are all different, and this embodiment does not impose any limitation on this.

[0084] In a specific implementation, the preset stacking method is to set the routing layer of the device under test as the first layer, the second layer and the dielectric layer, and the third layer as the reference layer, wherein the dielectric layer is on top and the reference layer is on the bottom.

[0085] Step S202 , obtaining the dielectric layer thickness value according to the dielectric thickness range between the devices under test and a preset reference layer thickness value.

[0086] It should be noted that the above preset reference layer thickness value can be 0.04 mm and can be calibrated.

[0087] It is understandable that, in different fixture design models, the above-mentioned preset reference layer thickness values ​​are all different, and this embodiment does not impose any limitation on this.

[0088] In a specific implementation, in order to meet the above-mentioned preset stacking method, the thickness of each of the above-mentioned dielectric layers needs to be calculated according to the above-mentioned dielectric thickness range and the above-mentioned preset reference layer thickness value. Therefore, the above-mentioned dielectric layer thickness value needs to be obtained based on the calculation of the above-mentioned dielectric thickness range and the above-mentioned preset reference layer thickness value.

[0089] Based on the second embodiment of the present invention, in the third embodiment of the present invention, the same or similar contents as those in the second embodiment can be referred to the above introduction, and will not be described in detail later. Figure 3 , Figure 3 A schematic diagram of the flow chart of the third embodiment of the fixture design method of the present invention.

[0090] In this embodiment, step S202 includes steps S2021 to S2023:

[0091] Step S2021: when the thickness value of the first dielectric layer satisfies the intersection value of the first thickness range and the second thickness range, taking the upper limit value of the first thickness range as the thickness value of the first dielectric layer.

[0092] It should be noted that the thickness of the first dielectric layer may be 0.3 mm;

[0093] It should be noted that the first thickness range may be 0.2 mm to 0.3 mm;

[0094] It should be noted that the second thickness range may be 0.25 mm to 0.35 mm.

[0095] It is understandable that in different fixture design models, the thickness value of the first dielectric layer, the first thickness range, and the second thickness range are all different, and this embodiment does not impose any limitation on this.

[0096] In a specific implementation, the thickness of the first dielectric layer needs to satisfy 0.2 mm to 0.3 mm and 0.25 mm to 0.35 mm, so 0.25 mm ≤ the thickness of the first dielectric layer ≤ 0.3 mm, and 0.3 mm is selected as the thickness of the first dielectric layer.

[0097] Step S2022: According to the symmetry principle of the preset stacking method, the thickness value of the third dielectric layer is equal to the thickness value of the first dielectric layer.

[0098] It should be noted that the thickness of the third dielectric layer may be 0.3 mm.

[0099] It is understandable that in different fixture design models, the thickness value of the third dielectric layer is different, and this embodiment does not impose any limitation on this.

[0100] In a specific implementation, the stacking needs to be symmetrical in the upper and lower directions, so the thickness of the third dielectric layer is selected to be the same as the thickness of the first dielectric layer, and the thickness of the third dielectric layer is 0.3 mm.

[0101] Step S2023, obtaining the second dielectric layer thickness value according to the first dielectric layer thickness value, the third dielectric layer thickness value, the dielectric thickness range and the preset reference layer thickness value.

[0102] It should be noted that the thickness of the second dielectric layer may be 1.27 mm.

[0103] It is understandable that in different fixture design models, the thickness of the second dielectric layer is different, and this embodiment does not impose any limitation on this.

[0104] In a specific implementation, the 0.8 mm trace in the device under test needs to refer to the reference layer, the third thickness range ≈ the thickness value of the first dielectric layer + the thickness value of the second dielectric layer (ignoring the thickness of the reference layer), and the third thickness range is 1.15 mm to 1.57 mm. According to the thickness value of the first dielectric layer, it can be calculated that 0.85 mm ≤ the thickness value of the second dielectric layer ≤ 1.27 mm.

[0105] Similarly, the 1.25mm trace in the device under test needs to refer to the reference layer. The fourth thickness range is ≈ the thickness value of the first dielectric layer + the thickness value of the second dielectric layer + the thickness value of the third dielectric layer (ignoring the thickness of the reference layer), and the fourth thickness range is 0.95mm to 2.2mm. According to the thickness value of the first dielectric layer and the thickness value of the third dielectric layer, it can be calculated that 0.35mm≤the thickness value of the second dielectric layer≤1.6mm; therefore, the thickness value range of the second dielectric layer is 0.85mm to 1.27mm.

[0106] Furthermore, since the preset reference layer thickness value, the above-mentioned first dielectric layer thickness value and the above-mentioned third dielectric layer thickness value have all been determined, in order to reduce the cost of manufacturing the test board, it is necessary to select a conventional total thickness of 1.6 mm or 2 mm. According to known conditions, the thickness of the above-mentioned second dielectric layer can be calculated to be 0.86 mm ± 10% or 1.26 mm ± 10%. In this example, 1.27 mm is selected as the thickness of the above-mentioned first dielectric layer thickness value.

[0107] In this embodiment, the step S30 includes steps S301 to S302:

[0108] Step S301, obtaining the coplanarity of each of the devices under test.

[0109] It should be noted that the above coplanarity may mean that the routing of the above-mentioned device under test is coplanar with the plane.

[0110] It is understandable that the above coplanarity is different in different fixture design models, and this embodiment does not impose any limitation on this.

[0111] In a specific implementation, the coplanarity of the device under test can be directly obtained through a detection tool.

[0112] Step S302: Taking the impedance and the coplanarity as input values, and calculating through a coplanar waveguide structure, obtain the left-right spacing of each of the devices under test.

[0113] In a specific implementation, under a coplanar waveguide (CPW) structure, the coplanarity of the routing is taken as a reference, the routing impedance is controlled to be in the range of 50Ω±2%, and the left and right spacing between each routing and the left and right coplanarity is calculated.

[0114] In this embodiment, the step S40 includes step S401:

[0115] Step S401, taking the package width, the dielectric layer thickness, the left-right spacing and the preset reference layer thickness as input values, calculating through EDA design software and simulating through 3D simulation software, to obtain the fixture model of the device under test.

[0116] It should be noted that the above-mentioned EDA design software may be Altium Designer, or Cadence Allegro, etc., and this embodiment does not limit this.

[0117] It should be noted that the above-mentioned three-dimensional simulation software may be Blender, or Houdini, etc., and this embodiment does not impose any limitation on this.

[0118] It is understandable that in different fixture design models, the above-mentioned EDA design software and the above-mentioned three-dimensional simulation software are different, and this embodiment does not limit this.

[0119] In a specific implementation, the package width, the dielectric layer thickness, the left-right spacing, and the preset reference layer thickness are used as input values, and the EDA design software is used for calculation and the three-dimensional simulation software is used for simulation to obtain the fixture model of the device under test. The simulation results of the three-dimensional simulation software are mainly used to optimize the impedance and control it within 50Ω±5%.

[0120] It should be noted that the above examples are only used to understand the present invention and do not constitute a limitation on the fixture design method of the present invention. More simple transformations based on this technical concept are all within the protection scope of the present invention.

[0121] The present invention also provides a fixture design device, please refer to Figure 4 , Figure 4 Schematic diagram of the module structure of the fixture design device according to an embodiment of the present invention, the device comprises:

[0122] An acquisition module 10 is used to acquire the package width, impedance and dielectric thickness range of each device under test;

[0123] A first calculation module 20, used for obtaining the dielectric layer thickness value of each of the devices under test according to the dielectric thickness range;

[0124] A second calculation module 30, used for obtaining the left-right spacing of each of the devices under test according to the dielectric layer thickness value and the impedance;

[0125] The control module 40 is used to obtain a fixture model of the device under test according to the package width, the dielectric layer thickness, the left-right spacing and a preset stacking method.

[0126] The fixture design device provided by the present invention adopts the fixture design method in the above embodiment to solve the technical problem of fixture design. Compared with the prior art, the beneficial effects of the fixture design device provided by the present invention are the same as the beneficial effects of the fixture design method provided by the above embodiment, and other technical features in the fixture design device are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0127] The present invention provides a fixture design device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the fixture design method in the above-mentioned embodiment one.

[0128] Reference below Figure 5 , which shows a schematic diagram of the structure of a fixture design device suitable for implementing an embodiment of the present invention. The fixture design device in the embodiment of the present invention may include, but is not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 5 The fixture design device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present invention.

[0129] like Figure 5As shown, the fixture design device may include a processing device 1001 (such as a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the xxx device are also stored. The processing device 1001, ROM1002 and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the fixture design device to communicate with other devices wirelessly or wired to exchange data. Although the figure shows a fixture design device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems can be implemented or have alternatively.

[0130] In particular, according to the embodiments disclosed in the present invention, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present invention include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through a communication device, or installed from the storage device 1003, or installed from the ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present invention are executed.

[0131] The fixture design device provided by the present invention adopts the fixture design method in the above embodiment to solve the technical problem of fixture design. Compared with the prior art, the beneficial effects of the fixture design device provided by the present invention are the same as the beneficial effects of the fixture design method provided by the above embodiment, and other technical features in the fixture design device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0132] It should be understood that the various parts disclosed in the present invention can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0133] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

[0134] The present invention provides a computer-readable storage medium having computer-readable program instructions (ie, computer program) stored thereon, and the computer-readable program instructions are used to execute the fixture design method in the above-mentioned embodiment.

[0135] The computer-readable storage medium provided by the present invention may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0136] The computer-readable storage medium may be included in the fixture design device; or may exist independently without being assembled into the fixture design device.

[0137] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by the fixture design device, the fixture design device: obtains the package width, impedance and dielectric thickness range of each device under test; obtains the dielectric layer thickness value of each device under test according to the dielectric thickness range; obtains the left-right spacing of each device under test according to the dielectric layer thickness value and the impedance; obtains the fixture model of the device under test according to the package width, the dielectric layer thickness value, the left-right spacing and the preset stacking method.

[0138] Computer program code for performing the operations of the present invention may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0139] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present invention. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0140] The modules involved in the embodiments of the present invention may be implemented by software or hardware, wherein the name of the module does not limit the unit itself in some cases.

[0141] The readable storage medium provided by the present invention is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned fixture design method, and can solve the technical problems of fixture design. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the present invention are the same as the beneficial effects of the fixture design method provided by the above-mentioned embodiment, and will not be described in detail here.

[0142] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the steps of the fixture design method as described above are implemented.

[0143] The computer program product provided by the present invention can solve the technical problem of fixture design. Compared with the prior art, the beneficial effects of the computer program product provided by the present invention are the same as the beneficial effects of the fixture design method provided by the above embodiment, which will not be described in detail here.

[0144] The above descriptions are only some embodiments of the present invention, and are not intended to limit the patent scope of the present invention. All equivalent structural changes made using the contents of the present invention's specification and drawings under the technical concept of the present invention, or directly / indirectly applied in other related technical fields, are included in the patent protection scope of the present invention.

Claims

1. A fixture design method, characterized in that: The fixture design method comprises: Obtain the package width, impedance and dielectric thickness range of each device under test; Obtaining a dielectric layer thickness value of each of the devices under test according to the dielectric thickness range; According to the dielectric layer thickness value and the impedance, obtaining the left-right spacing of each of the devices under test; A fixture model of the device under test is obtained according to the package width, the dielectric layer thickness, the left-right spacing, and a preset stacking method.

2. The fixture design method according to claim 1, characterized in that: The step of obtaining the package width, impedance and dielectric thickness range of each device under test includes: Firstly, the package width and dielectric constant of each device under test are obtained; The impedance and the dielectric thickness range are obtained according to the package width and the dielectric constant.

3. The fixture design method according to claim 1, characterized in that: The step of obtaining the dielectric layer thickness value of each of the devices under test according to the dielectric thickness range includes: The preset stacking method is to set the wiring layer of the device under test as the first layer, and the remaining layers are stacked in sequence with the dielectric layer on the top and the reference layer on the bottom; The dielectric layer thickness value is obtained according to the dielectric thickness range between each of the devices under test and a preset reference layer thickness value.

4. The fixture design method according to claim 3, characterized in that: The dielectric thickness range includes at least a first thickness range and a second thickness range, the dielectric layer thickness value includes at least a first dielectric layer thickness value, a second dielectric layer thickness value and a third dielectric layer thickness value, and the step of obtaining the dielectric layer thickness value according to the dielectric thickness range between each of the devices under test and the preset reference layer thickness value includes: When the thickness value of the first dielectric layer satisfies the intersection value of the first thickness range and the second thickness range, the upper limit value of the first thickness range is taken as the thickness value of the first dielectric layer; According to the symmetry principle of the preset stacking method, the thickness of the third dielectric layer is equal to the thickness of the first dielectric layer; The second dielectric layer thickness value is obtained according to the first dielectric layer thickness value, the third dielectric layer thickness value, the dielectric thickness range and the preset reference layer thickness value.

5. The fixture design method according to claim 4, characterized in that: The step of obtaining the left-right spacing of each of the devices under test according to the dielectric layer thickness value and the impedance includes: Obtaining the coplanarity of each of the devices under test; The impedance and the coplanarity are used as input values, and the left-right spacing of each of the devices under test is obtained through calculation of the coplanar waveguide structure.

6. The fixture design method according to claim 5, characterized in that: The step of obtaining the fixture model of the device under test according to the package width, the dielectric layer thickness value, the left-right spacing and the preset stacking method includes: The package width, the dielectric layer thickness, the left-right spacing and the preset reference layer thickness are used as input values, calculated by EDA design software and simulated by three-dimensional simulation software to obtain the fixture model of the device under test.

7. A fixture design device, characterized in that: The device comprises: An acquisition module is used to obtain the package width, impedance and dielectric thickness range of each device under test; A first calculation module, used for obtaining the dielectric layer thickness value of each of the devices under test according to the dielectric thickness range; A second calculation module, used for obtaining the left-right spacing of each of the devices under test according to the dielectric layer thickness value and the impedance; The control module is used to obtain a fixture model of the device under test according to the package width, the dielectric layer thickness, the left-right spacing and a preset stacking method.

8. A fixture design device, characterized in that: The device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the fixture design method according to any one of claims 1 to 6.

9. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the fixture design method according to any one of claims 1 to 6 are implemented.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the steps of the fixture design method according to any one of claims 1 to 6 are implemented.

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