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Clock signal processing method, member controlling method and device

A clock signal and control device technology, which is applied in the field of clock signal processing, can solve the problem of large address space and achieve the effect of reducing the address space

Inactive Publication Date: 2009-06-10
HUAWEI DIGITAL TECH (CHENGDU) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In the process of realizing the present invention, the inventor found that at least the following problems exist in the prior art: in the case of 1 driving N, while providing a valid clock signal to one device, all other devices will receive this clock signal Signal, so that all devices will enter the working state because of receiving this clock signal
However, if the number of devices is large, the number of addresses of the devices is also large, which results in a large address space required for configuring addresses for the devices

Method used

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  • Clock signal processing method, member controlling method and device
  • Clock signal processing method, member controlling method and device
  • Clock signal processing method, member controlling method and device

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Embodiment Construction

[0017] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0018] The clock signal processing method of the embodiment of the present invention, such as figure 1 shown, including:

[0019] Step S101: Generate a valid clock signal.

[0020] Step S102: providing the effective clock signal to the device to be controlled, wherein the effective clock signal provided to the device to be controlled is not simultaneously provided to a device having the same address as the device to be controlled . In this way, the device that n...

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Abstract

The embodiment of the invention provides a method for processing clock signals, which comprises: generating effective clock signals; and supplying the effective clock signals to devices to be controlled, wherein when the effective clock signals supplied to the devices to be controlled are different, the effective clock signals are supplied to the devices with the same address. The embodiment of the invention also provides a device for processing the clock signals, a method for the control device, and equipment of the control device. The method can reduce address space required for configuring address for the device.

Description

technical field [0001] The invention relates to single board technology, in particular to a clock signal processing method, a device control method and a device. Background technique [0002] At present, as the density and complexity of single-board design of network products continue to increase, more and more attention is paid to the processing method of the clock signal and the technical solution of the control device. [0003] In the traditional clock signal processing method and device control method, when a certain device needs to be controlled, it is necessary to provide an effective clock signal to the device to prompt the device to enter the working state. Here, the effective clock signal can be It is considered to be a clock signal that can prompt the device to enter the working state, and correspondingly, an invalid clock signal can be regarded as a clock signal that cannot prompt the device to enter the working state. [0004] In the process of realizing the pre...

Claims

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Application Information

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IPC IPC(8): G06F1/04G06F1/10
Inventor 童兵兵李玉森王滔
Owner HUAWEI DIGITAL TECH (CHENGDU) CO LTD
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