Mismatch error calibration method for multi-channel high-speed parallel alternate sampling system

A mismatch error and sampling system technology, applied in the field of error estimation calibration, can solve problems such as low complexity, and achieve the effects of low complexity, convenient digital calibration implementation, and fast operation speed

Inactive Publication Date: 2013-01-02
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
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Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide a mismatch error calibration method with low complexity and easy hardware implementation in a multi-channel high-speed parallel alternate sampling system while ensuring the calibration performance

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  • Mismatch error calibration method for multi-channel high-speed parallel alternate sampling system
  • Mismatch error calibration method for multi-channel high-speed parallel alternate sampling system
  • Mismatch error calibration method for multi-channel high-speed parallel alternate sampling system

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Embodiment Construction

[0038] Specific embodiments of the present invention will be described below in conjunction with the accompanying drawings, so that those skilled in the art can better understand the present invention. It should be noted that in the following description, when detailed descriptions of known functions and designs may dilute the main content of the present invention, these descriptions are omitted here.

[0039] Such as figure 1 As shown, it is a block diagram of the TIADC system structure of the mismatch error estimation and real-time calibration algorithm of the multi-channel high-speed parallel alternate sampling system, including two parts: TIADC module and digital calibration module. Each sub-channel ADC (Sub-ADC) in the TIADC module is an ideal ADC. The non-ideal factors of the TIADC module include offset mismatch error, gain mismatch error, and clock mismatch error. The offset and gain errors are mainly obtained by using the adder and The multiplier is implemented, and t...

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Abstract

The invention provides a mismatch error calibration method for a multi-channel high-speed parallel alternate sampling system, which is characterized by comprising an offset and gain mismatch error calibration step and a time mismatch error calibration step, wherein the time mismatch error calibration step comprises the estimation of time mismatch error and the calibration based on the estimation of time mismatch error. The mismatch error calibration method for a multi-channel high-speed parallel alternate sampling system can estimate and calibrate three kinds of mismatch errors online and in real time, and is a self-adaption calibration method for blind signals. When the external environment is changed, a filter coefficient is not required to be regulated, a calibration module is further not required to be designed again, and the three kinds of mismatch errors can be estimated and calibrated online and in real time. Compared with the prior art, the mismatch error calibration method for a multi-channel high-speed parallel alternate sampling system has lower complexity and can calibrate and output effective data in real time.

Description

technical field [0001] The invention relates to high-speed sampling technology, and also relates to error estimation calibration technology. Background technique [0002] With the development of communication systems, digital signal processing, large-scale integrated circuits and computers, the real-time data sampling rate is required to be higher, and the current analog-to-digital conversion technology (ADC) is restricted due to factors such as technology and technology, and it is difficult for a single-chip ADC to While satisfying high speed, it still meets the requirements of high precision. Therefore, the Time-Interleaved Analog-to-Digital Converter (TIADC) using multiple ADCs can maintain the accuracy of the single-chip ADC. The overall sampling rate of the system reaches M (number of channels) times the sampling rate of a single-chip ADC. [0003] However, due to the limitations of the actual manufacturing process, the following mismatch errors exist between the vario...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10
Inventor 阎波焦少波沈建姚远林水生李广军
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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