74results about How to "Reduce resource overhead" patented technology

The invention relates to the technical field of audit data storage, in particular to an audit data distributed storage method based on a multi-layer encryption strategy and a related product, and the method comprises the following steps: dividing audit data into a plurality of grades, and adopting different encryption strategies for the audit data according to different grades to obtain encrypted audit data; dynamically fragmenting the encrypted audit data based on a fragmentation rule to generate a plurality of data fragments; the data fragments are distributed and stored in a plurality of distributed storage nodes; carrying out integrity verification on the stored data through Hash calculation, Merkle tree verification and a verification information storage mechanism; according to the method, a multi-layer encryption strategy is combined, flexible encryption protection aiming at data with different sensitivities is realized, meanwhile, the encryption efficiency of common data is considered, and the fault-tolerant capability and the dynamic monitoring and migration mechanism of distributed storage nodes are improved through the combination of fragmentation and redundancy coding technologies; and stable operation of the system under the condition of node failure or overhigh load is ensured.

The invention discloses a long-distance high-precision sensing integrated detection waveform design method, which comprises the following steps of: 1, determining the number Ncomb of transmission combs according to the number requirement of sensing waveforms required to be supported by a system at the same time; step 2, generating an expandable wide-range sensing signal according to the sensed distance demand, the expandable wide-range sensing signal lasting for L symbols; 3, determining a short period Tps, a short period repeated transmission frequency Lp, a long period Tpl and a long period repeated transmission frequency Np according to the speed detection requirement of the moving target and typical communication time slot configuration; step 4, completing frequency domain signal mapping in a pre-detection stage, and completing subcarrier mapping of adjacent L OFDM symbols according to a frequency domain continuous mode; step 5, completing time domain signal mapping in a pre-detection stage, and repeatedly transmitting the frequency domain mapping signal in the step 4 for Lp times according to a configured Tps period; step 6, completing frequency domain signal mapping in the detection stage, and completing subcarrier mapping of L adjacent OFDM symbols according to the selected combing mode; and step 7, completing time domain signal mapping in the detection stage, and repeatedly transmitting the frequency domain mapping signal in the step 5 for Np times according to the configured long period Tpl. According to the invention, the problems of limited sensing distance and ambiguity of the communication waveform for sensing can be solved, and high-precision sensing of distance and speed of far and near targets in a wide range can be met.

The invention discloses a method for accelerating sparse multi-scalar multiplication by using an image processor, which belongs to the technical field of parallel computing, and comprises the following steps: managing scalar vectors participating in operation and point vectors in a group by a CPU (Central Processing Unit), and applying for sufficient memory on a GPU (Graphics Processing Unit) to store the contents; the CPU and the GPU work asynchronously, the GPU carries out bucket distribution, bucket summation and bucket merging calculation, and finally a calculation result in a window is obtained. According to the method, firstly, the sparsity of the scalar is fully utilized, the performance is excellent especially when large-scale data is processed, and the performance is remarkably improved; secondly, the design of the multi-GPU parallel computing architecture gives full play to the advantages of GPU hardware resources, and the load balance is finely regulated and controlled by the method, so that the resource overhead of the system is reduced; finally, the adopted parallel processing technical scheme enables MSM operation to be efficiently expanded to a multi-node multi-GPU environment, and the efficient calculation requirement of a large-scale zero-knowledge proof system is met.

The invention discloses a database consistency comparison and compensation method. The method comprises the following steps: acquiring a plurality of databases to be verified; sorting each piece of data in each to-be-verified database according to the primary key, and calculating a hash value of each piece of data in each sorted database to obtain a plurality of preprocessed databases; comparing the plurality of preprocessed databases by adopting a comparison algorithm based on the primary key and the hash value to determine a comparison result; the comparison result is a first result or a second result; the first result represents that the plurality of preprocessed databases have no difference; the second result represents that the plurality of preprocessed databases have differences; the second result comprises a difference conclusion and comparison information; and generating a difference file based on the comparison information, and compensating the plurality of preprocessed databases based on the difference file to obtain a plurality of compensated databases. The detection efficiency is improved, and the storage cost and the resource overhead are reduced.

The invention discloses a plug-in configuration implementation method based on an Extim framework, which is characterized in that configuration information is independent from a traditional external configuration center or a configuration file by using a Wasm plug-in, a complex configuration center system does not need to be additionally deployed, the resource overhead of the system is reduced, hot update of configuration is realized by packaging configuration parameters in the Wasm plug-in, and the configuration efficiency is improved. The application can detect and load the new-version plug-in and a naming and recording mechanism for the plug-in version without restarting in the running process, plug-in version management under the multi-pod environment is achieved, it is ensured that the plug-in of the same version is used in each pod, dynamic adjustment and flexible calling of configuration parameters are achieved through an interface provided by an Extism framework, and therefore the configuration efficiency is improved. The application can read and modify the configuration parameters at any time according to the service requirements, so that the configuration can be quickly customized in a changeable service environment, and the self-adaptive requirements of various service logics in a complex scene are met.

The invention belongs to the related technical field of integrated circuit design, and particularly relates to a method for loading data required by an accelerator operation processing unit of a convolutional neural network, which comprises the following steps of: controlling a cache sequence of weight data and feature map data through a state machine, when controlling the cache of the feature map data, firstly performing input feature map format conversion, the method comprises the following steps: performing sub-segment division on external channel-by-channel input feature map data with the bit width of A bit, storing the external channel-by-channel input feature map data with the bit width of A bit in a grouping dislocation storage mode, and converting the stored feature map data into N paths of parallel data with the bit width of B bit (B = A / N) in a special reading mode, the B * N data flow can complete feature map data loading of N storage units at the same time, the problem that the off-chip data access bit width is not matched with the data bit width needed in the operation processing unit is solved, and the bandwidth utilization rate of the convolutional neural network accelerator is improved.

The invention relates to an unmanned aerial vehicle-mounted investigation and rapid interference method. The method comprises the steps of searching a frequency band where a radar target is located; after the radar frequency band is successfully locked, the equipment processes the analysis and interference functions of the radar signal in parallel, and judges and executes a corresponding interference strategy according to an analysis result; interference strategies are selected step by step according to stages: a device scans radar signals at an interval of 200MHz to complete a target search stage; when the center frequency of the radar signal is locked, entering a target tracking stage; after locking, entering a target optimization stage; if the center frequency changes, entering a target re-search stage, and trying to re-lock the signal; in each stage, the equipment adopts different interference modes: a full forwarding interference mode is used in a target search stage, a slice interference mode is used in a target tracking stage, and a random interference mode is switched in a target re-search stage. According to the method, the dependence on an external independent reconnaissance system and resource scheduling is remarkably reduced, and the load requirements of miniaturization and light weight of the unmanned aerial vehicle are met.

The invention provides a playing interface processing method and device, a program product and electronic equipment, and relates to the technical field of computers. The method comprises the following steps: displaying a playing interface setting interface; the playing interface setting interface is used for setting editable interface elements in the playing interface; in response to a setting instruction in the playing interface setting interface, determining display information of at least one editable interface element; and displaying the playing interface according to the display information of the editable interface element. According to the method and the device, the user can set the playing interface in a self-defined manner, the personalized aesthetic requirements of the user can be met, the audition experience is improved, the workload of a program developer is reduced, and the resource overhead of a server or a client is reduced.

The present application provides a method, device and equipment for caching a digital networking switch for a scientific data center. The method is applied to at least one switch in a cascaded cache structure topology network, including: receiving multiple response data from a digital object warehouse; calculating the cache priority of multiple response data according to a multi-dimensional cache function to obtain the cache priority of each response data, and the multi-dimensional cache function is determined according to the cache scenario; determining the response data to be cached from the multiple response data according to the cache priority of each response data; according to the cache replacement algorithm, using the response data to be cached to replace the cache response data in the switch, so as to cache the response data to be cached to the switch, and the cache replacement algorithm is determined according to the hit rate of the lower-level device. In this way, the method reduces the resource overhead of the switch in the digital networking and realizes load balancing, thereby improving the data transmission efficiency.

The invention provides a code block segmentation method and device, network equipment and a medium, and the method is applied to a sending end, and comprises the steps: carrying out the semantic segmentation of a to-be-sent transmission block, and obtaining a plurality of feature sequences; wherein in the plurality of feature sequences, the lengths of at least two feature sequences are different; determining the coding rate of each feature sequence according to the importance levels of the plurality of feature sequences; according to the coding rates corresponding to the plurality of feature sequences respectively, coding each feature sequence to obtain coded data of the transmission block; and sending the coded data to a receiving end. Differential transmission is carried out according to the importance degree of the semantic features, the problem that semantic feature differential coding is difficult to support effectively due to the fact that code rates and code lengths of all code blocks in the same transmission code are the same in the prior art is solved, the transmission efficiency of a future semantic communication system is improved, and resource overhead is reduced.

The application discloses an eBPF-based RDMA data injection attack detection method and system, the method comprises the following steps: a sending terminal monitors the RDMA use behavior of a user state program through an eBPF-based monitoring program, and writes the monitored RDMA operation data into a data buffer; a super process reads the RDMA operation data in the data buffer, calculates a hash value of the RDMA operation data, and sends the hash value as additional data to a receiving terminal; the super process on the receiving terminal calculates a hash value of the received RDMA operation data, and compares the calculated hash value with the hash value carried in the additional data to realize data verification on the RDMA operation data. The application aims to realize accurate detection of RDMA data injection attacks under the premise of compatibility with general RDMA network cards, improve the real-time performance of software protection, and reduce resource consumption.

A method and apparatus for inserting a pseudo sequence during data modulation in a communication system according to a channel state and a link state, etc. are disclosed. In an embodiment, a method for data modulation by a wireless communication node of a wireless communication system includes: inserting at least one first pseudo sequence into a first data sequence in a first data block; and inserting at least one second pseudo sequence into a second data sequence in a second data block; wherein a first length of the first pseudo sequence is different from a second length of the second pseudo sequence, and wherein the second pseudo sequence includes the first pseudo sequence or is included in the first pseudo sequence.

Embodiments of this application provide a signal sending method and an apparatus. The method includes: A first device sends a first signal to a second device on N orthogonal frequency division multiplexing OFDM symbols, where the N OFDM symbols include N1 first symbols, N is an integer greater than or equal to 1, and N1 < N. The first device sends a second signal to a third device on at least one of the N1 first symbols. According to the signal sending method and the apparatus provided in this application, a technology similar to radio frequency identification RFID and wake-up radio WUR can be introduced to a communication system, and network resource overheads can be reduced.

The invention provides a composite operation circuit in an integrated circuit. The composite operation circuit comprises a first register set, a second register set, a third register, a multiplication / binary operation module and an addition module. The first register group is used for caching a plurality of filter coefficients or a plurality of convolution coefficients. And the second register group caches a plurality of to-be-filtered data which are input in sequence. And the third register receives and caches the input binary data to be subjected to binary convolution. The multiplication / binary operation module and the addition module perform multiplication and addition operation based on the data to be filtered and the filtering coefficient when performing filtering operation, and perform binary operation and addition operation based on the convolution coefficient and the binary data to be subjected to binary convolution when performing binary convolution operation. In this way, the filtering operation and the binary convolution operation are carried out through the time division multiplexing first register and the addition module, and the resource overhead of hardware is reduced.

The invention relates to a scheduling method which schedules deep learning jobs through a primitive-dual framework and a dynamic programming algorithm in a heterogeneous GPU cluster and can meet different deadline requirements of the jobs. According to the method, on-line analysis and historical data are combined in a heterogeneous GPU cluster environment, so that the overhead of obtaining the job throughput is reduced; according to the method, job scheduling and job placement are decoupled, the complexity of job scheduling is reduced, meanwhile, a simple and effective job placement scheme is designed, and the degree of resource fragmentation is effectively reduced; a scheduling target is modeled in a scheduling module, reward value functions are respectively designed for strict deadline operation and soft deadline operation, an optimization problem is constructed by taking maximization of an overall reward value as the scheduling target, and strict deadline requirements and soft deadline requirements of the operation are considered at the same time; and reconstructing the target optimization function into an integer linear programming problem, and solving by using a primitive-dual framework and a dynamic programming algorithm to ensure the theoretical effectiveness of the solution.

The invention provides an ETC system resource dynamic allocation method based on a virtualization technology, and the method comprises the following steps: constructing a plurality of virtualization operation spaces based on the virtualization technology, and carrying out the multi-stage virtualization resource configuration based on a dynamic resource allocation technology; resources are configured for the backup virtualization operation space, and the backup virtualization operation space is updated based on a time sequence prediction method; and the server recycles idle system resources to establish a test virtualization space. According to the method, more accurate resource allocation of the application components in the system is realized in a multi-stage resource allocation mode, the fault deactivation time can be remarkably shortened in combination with the redundancy design of the virtual backup, the resource consumption level of the virtual backup is reduced according to the updating strategy, and the recycled idle resources can be fully utilized. Furthermore, a test virtualization space is additionally arranged to ensure that daily work and test work are carried out separately, the overall work is not influenced, and the test work can be completed by using idle resources.

The present application provides a connection method and device between a base station and a core network device. The method includes: the base station sends a first S1 link establishment request to a first core network device and a second core network device respectively, receives a first S1 link establishment response message sent by the first core network device, and uses the first core network device to process services; receives a first S1 link establishment failure message sent by the second core network device, and periodically sends a second S1 link establishment request to the second core network device until a second S1 link establishment response message sent by the second core network device is received, and uses the second core network device to process services. The base station does not need to maintain the S1 link between the backup device, which reduces the resource overhead of the base station.

The present invention provides a data import method, device and equipment, which can be applied to the field of data processing technology. The method includes: in response to a data import instruction, establishing a connection relationship between the data to be imported and the target database, the data to be imported includes multiple format types, the data to be imported includes multiple row data, and at least two of the multiple row data are associated with the same format type; according to the read-write control identifier corresponding to the format type, updating the read-write properties of the multiple row data of the data to be imported, obtaining the updated source data, and writing the source data into a shared memory queue; using a parallel parsing thread to parse the source data in the shared memory queue to obtain a tuple corresponding to the source data; and writing the tuple into a target file of the target database.

The invention discloses a virtual machine operation method, device and equipment, and the method comprises the steps: responding to at least one virtual machine in an operation termination state, if a virtual machine restart instruction is received, determining a first mirror image operation memory and a first mirror image backup memory which are pre-allocated for each virtual machine through a virtual machine controller; copying the virtual machine mirror images stored in the first mirror image backup memories to the first mirror image running memory through the virtual machine controller; and executing a virtual machine recovery instruction through the virtual machine controller, and triggering to jump to a kernel entry address of the first mirror running memory so as to recover running of the virtual machine. According to the scheme, restarting of the virtual machine does not need to depend on a privileged virtual machine, the virtual machine controller loads the virtual machine mirror image from the mirror image backup memory to the virtual machine running memory, and therefore independent restarting of the virtual machine is achieved.

The invention discloses a binary simulation system and method based on a container technology, and belongs to the technical field of binary simulation. The method comprises the following steps: installing and deploying a container engine on a host machine, and creating a container environment for simulation; packaging the binary code to be simulated and the operation dependency file into a container mirror image, and deploying the container mirror image into a pre-created container; starting a simulation task; dynamically adjusting the CPU and memory quota of the container according to the requirement of the simulation task in the simulation operation; according to the method, the simulation analysis efficiency is improved through an optimization algorithm, in the method, a container shares an operating system kernel of a host machine and only contains necessary applications and library files, the starting time is short and can be generally completed within the second level, and the response speed of the system is greatly improved; and the container does not need to simulate the whole operating system environment like a virtual machine, so that the resource overhead is smaller, more simulation tasks can be operated under the same hardware resource, and the overall resource utilization rate is improved.

This invention relates to a log access method, apparatus, and storage medium, belonging to the field of embedded software log management technology. Addressing the problems of existing embedded log access systems, such as complexity, high resource consumption, low access efficiency, and poor operability, this invention employs a fast access algorithm based on time-address mapping. It directly calculates the physical storage address of the log using time information, eliminating the need for a file system and mapping table, and requiring no additional data structures. This invention features a simple algorithm, high efficiency, and low resource consumption, enabling rapid log location and stable access. It is suitable for resource-constrained scenarios such as embedded devices, effectively balancing the reliability, timeliness, and operability of log access.

The invention relates to a radio frequency identification data security authentication method and system based on random rearrangement block matrix encryption. The reader generates a random number, calculates a message A and sends it to a tag together with the random number. After receiving the message, the tag decrypts the reader identifier, generates a random number, calculates messages B, C and D and sends them to the reader. After receiving the message, the reader decrypts the tag identifier, calculates messages E, F and G and sends them to an edge server together with the random number and the message D of the tag. The edge server verifies the tag and the reader. If the verification is successful, the edge server generates a random number, updates the tag key and the reader key, generates messages H, M and N and sends them to the reader. The reader verifies the edge server. If the verification is successful, the reader updates the key, calculates messages P and Q and sends them to the tag together with the message N. The tag verifies the reader and the edge server. If the verification is successful, the tag updates the stored key information. The invention resists desynchronization attacks and denial of service attacks and reduces the storage space cost of the tag.

The application provides a PCIe link monitoring and self-repair system for an FPGA acceleration card, and the system comprises: a signal acquisition module having a main sampler anchored at a central sampling point and an offset sampler capable of biased sampling; a monitoring point calibration module for controlling the offset sampler to scan along a voltage axis and a time axis after the link is ready, determining an eye diagram boundary and calculating a monitoring sampling point; an online monitoring module for polling each monitoring point and interrupting when an error code exceeds a limit, and outputting a repair trigger signal; a repair decision module for determining a distortion type according to an abnormal point position and outputting a coding signal; and a parameter adjustment module for selecting a target equalizer according to the coding signal, and performing adaptive iterative adjustment with the monitoring result as feedback until the link returns to normal. The application realizes real-time monitoring, rapid diagnosis and closed-loop self-repair of the PCIe link signal under the premise of uninterrupted service, and significantly improves the stability and reliability of the system.

The invention discloses a distributed system resource discovery and task management method based on a CoAP protocol, and belongs to the field of embedded and distributed communication. The method comprises the following steps: building a distributed system framework based on a CoAP protocol on a plurality of multi-core DSP (Digital Signal Processor) platforms and a PC (Personal Computer); a CoAP client is deployed on the PC, a master CoAP server is deployed on one core of each multi-core DSP platform, and slave CoAP servers are deployed on the remaining cores; the client sends a discovery request and a task management request to the main server, and updates a discovered resource list in combination with a timestamp; the main server responds to the discovery request, informs the client of current resource information, and sends a task scheduling request to the slave server of the platform and other main servers; and starting the to-be-scheduled task on the core of the slave server side. The distributed system resource discovery and task management method realizes the effects of low overhead, high speed and low load of distributed system resource discovery and task management, and has the advantage of autonomous and controllable source codes.

The invention discloses an FFT (Fast Fourier Transform) processor capable of resisting single-node upset. The FFT processor comprises a controller, a cache module, a butterfly operation module, a multiplication module, a first MUX (Multiplexer) and a second MUX, according to the invention, a design scheme that internal structures are respectively reinforced is adopted, a cache module adopts Hamming code error detection and correction, a butterfly operation module adopts berger code error detection and correction, a multiplication module adopts low-overhead approximate triple-modular redundancy error detection and correction, and a controller adopts triple-modular redundancy. According to the method, functional abnormality caused by single-node upset of the FFT processor due to the influence of the single event effect can be avoided, the resource overhead used for reinforcement is less, and the method is suitable for the resource-limited cosmic environment.

The application provides a unified systolic array computing unit for ANN and SNN, comprising a shift-add computing processing unit and a systolic array formed by arrayed deployment of the shift-add computing processing unit; an execution of artificial neural network operation or pulse neural network operation is switched through a configuration mode selection signal terminal; in the artificial neural network mode, multiplication operation is unfolded in the time dimension, and a shift register and an adder constitute a time division multiplexing operation sequence to complete multiplication and accumulation operation; in the pulse neural network mode, a weighting accumulation is directly completed through multiplexing of an addition link, and a neuron time step dependent chain is decoupled through a soft reset mechanism to realize cross-time step weight multiplexing; control signals and data are propagated in the same direction in the systolic array, which is used for realizing control logic array level multiplexing, and fixed data flow is adopted for the output, so that partial sums are preferentially resident in the array interior; the working frequency can be improved, the bandwidth and power consumption can be reduced, and the area efficiency and timing convergence can be improved.

This specification discloses a model anti-theft detection method, device, storage medium and electronic device. The anti-theft detection model includes a cloner and a generator. The cloner is used to clone a pre-trained business model, and the generator is used to generate simulated business data input into the cloner. First, noise is input into the generator to obtain first simulated business data, and a first business result of the first simulated business data is obtained through the cloner. Then, based on the first business result and the first simulated business data, the generator is trained with the training goal of improving the error rate of the cloner output result. Next, noise is input into the trained generator to obtain second simulated business data, and a second business result and label of the second simulated business data are obtained through the cloner and the business model. Finally, based on the second business result and label, the cloner is trained, and the anti-theft capability of the business model is detected by using the number of iterations of the cloner during the training process.

The OTFS system channel estimation method based on hybrid multi-pilot frequency combination comprises the following steps: setting an OTFS transmitting frame which comprises a data symbol and a pilot frequency symbol which are simultaneously modulated to a DD domain; a DD domain sending signal is modulated by the OTFS and then reaches a receiving end through a channel, and a signal received by the receiving end is demodulated by the OTFS and then is converted into a DD domain receiving signal; the method comprises the following steps: receiving a signal based on a DD domain, and estimating time delay and integer Doppler of a channel by utilizing related characteristics of a pilot frequency sequence to obtain estimated values of the time delay and the integer Doppler; estimating decimal Doppler according to time invariance of a DD domain channel and adjustability of Doppler, and finally obtaining an estimated value of Doppler; performing LMMSE estimation on the attenuation coefficient according to the estimation values of the time delay and the Doppler to obtain an estimation value of the attenuation coefficient, and completing channel estimation of the OTFS system; according to the method, the pilot symbols and the data symbols are mixed, joint estimation is carried out, and accurate estimation of the OTFS decimal Doppler channel is achieved.

The invention relates to an aggregation tree generation method and device, a medium and equipment. The method comprises the following steps: acquiring network topology information; respectively acquiring the current residual capacity of each network equipment node; determining a root node; if it is determined that a first network device node of which the current residual capacity is greater than a first preset threshold exists in the N network device nodes, constructing a flow network according to the network topology information, the root node and the current residual capacity of the first network device node; determining a feasible augmented path from the source point to the sink based on the flow network, and determining the maximum flow from the source point to the sink according to the feasible augmented path; and under the condition that the maximum flow is equal to the first numerical value, generating an aggregation tree according to the feasible augmented path and the root node. According to the technical scheme, the generation of the aggregation tree can be converted into the solution of the maximum flow problem by constructing the directed virtual edge from the first network equipment node to the sink, the optimal solution is easier to find, and the real-time performance and accuracy of the generation of the aggregation tree are improved.

The application provides a time synchronization system and method based on a TDMA system wireless network virtual-real joint simulation, which comprises a physical network and a virtual network simulation system, time synchronization between multiple physical nodes of the physical network is completed through radio frequency signals, and wireless communication of the TDMA system is adopted; one of the physical nodes is a gateway node, the gateway node is provided with a first interface and a second interface, the first interface is used for generating a time slot pulse signal, and the second interface is used for generating a time slot numerical signal; the virtual network simulation system communicates with the physical network, and the virtual physical network system is provided with a third interface for receiving the time slot pulse signal and a fourth interface for receiving the time slot numerical signal; wherein the time slot pulse signal carries synchronization interrupt information, the time slot numerical signal carries time slot time information, and the virtual network simulation system realizes time synchronization with the physical network through the time slot pulse signal and the time slot numerical signal. The application has high time synchronization precision and low resource consumption.