10results about How to "Reduce verification times" patented technology

The embodiment of the invention provides a chip verification method, device and system and electronic equipment. The verification method comprises the steps of obtaining a pre-configured basic verification environment of a to-be-tested chip; acquiring configuration information of a verification environment of the to-be-tested chip; modifying the basic verification environment based on the configuration information to obtain an actual verification environment; and testing the chip to be tested according to the actual verification environment. By configuring the basic verification environment in advance, modification can be subsequently performed based on the configuration information of the to-be-tested chip to obtain the actual verification environment, so that the verification time consumption and cost are reduced, and the verification efficiency is improved.

The invention provides a rapid prototyping algorithm verification platform and method, and the method comprises the steps: receiving a configuration parameter inputted by a user through a configuration interface, and generating a configuration file based on the configuration parameter and a script written according to an AUTOSAR standard; building an algorithm model based on a function module which is selected by a user and meets the AUTOSAR standard; generating a model code corresponding to the algorithm model; and compiling and linking the configuration file and the model code in the underlying project to obtain a hex file. In the scheme, the configuration file and the model code conforming to the AUTOSAR standard are obtained by using the script written based on the AUTOSAR standard and each functional module obtained by packaging the ECU abstraction layer interface in the AUTOSAR standard, and are automatically integrated to the underlying project for compiling and linking, so that the code reuse rate is improved, the manpower is saved, and the efficiency is improved. And the purpose of shortening algorithm verification time is achieved.

The present disclosure provides a storage chip test method and device, computer equipment and storage medium, and relates to the technical field of semiconductors. The method comprises the following steps: performing M times of burn-in cycle tests on a storage chip, M being a positive integer greater than 0, each burn-in cycle test comprising the following steps: performing N times of write operations on the storage chip, wherein N is a positive integer greater than 1; verifying the storage chip after the N times of write operations are performed to obtain a verification result; and obtaining a burn-in test result based on M verification results of the storage chip after the burn-in cycle test. The present disclosure obtains the burn-in test result based on the M verification results after performing the M times of burn-in cycle tests, thereby reducing the probability of misjudging the storage chip as a failed product due to slight poor contact. In addition, the storage chip is verified after the N times of write operations are performed, thereby reducing the number of verifications in the burn-in test process, and further reducing the burn-in test duration and test cost.

The invention relates to the technical field of cooling system testing, and discloses a dairy product cooling system testing method and device, electronic equipment and a storage medium, and the method comprises the steps: obtaining a pressure drop set value of a dairy product; acquiring parameter information of each part of the cooling system; the parameter information comprises part types and part size parameters; according to the parameter information of each part in the cooling system, obtaining a predicted pressure drop value of each part in the cooling system through a pressure drop prediction model, and summing the predicted pressure drop values of the parts to obtain a total pressure drop value; if the total pressure drop value of the cooling system is larger than the pressure drop set value, it is judged that the cooling system does not pass; performing pressure reduction adjustment on the parameter information of each part in the cooling system which does not pass through, and performing total pressure drop value calculation on the adjusted cooling system again until the calculated total pressure drop value is smaller than a pressure drop set value; the design period and the design cost of the dairy product cooling system can be shortened.

The invention relates to a CAE (Computer Aided Engineering)-based strength analysis method for a through type dual-die booster shell, and belongs to the field of CAE. Comprising the following steps: establishing a strength analysis model of the through-type dual-module booster shell, creating a part material, contacting and loading, dividing grids, calculating, obtaining a stress distribution cloud picture of the shell part, locally refining the grids, and verifying an analysis result. The method has the advantages that simulation verification is carried out in the design stage, the number of times of repeated sample verification is reduced, the design efficiency is improved, compared with an existing method, product analysis and simulation are carried out in the design stage, cracking and failure of the shell caused by insufficient design in the experiment process are avoided, a result similar to a test can be obtained on the premise that the test is not carried out, and the design efficiency is improved. And guidance is provided for product design, and the design cost is saved.

The application provides an acceleration method, system, device and storage medium for quantization speculation sampling, which comprises the following steps: obtaining context content input in a natural language generation task; outputting a candidate sequence in a drafting model of quantization speculation sampling according to the context content; extracting entropy fluctuation features and instantaneous entropy difference features of the candidate sequence, judging the difficulty of task generation of the candidate sequence based on the entropy fluctuation features and the instantaneous entropy difference features, routing the candidate sequence as a text sequence to be verified to a target model with different precisions according to the difficulty, and enabling the target model with a selected precision to perform parallel verification on a predetermined number of text sequences determined. The application realizes a substantial optimization of inference efficiency and memory occupation without significantly sacrificing generation quality.

The application relates to the technical field of intelligent manufacturing knowledge management, and discloses a semantic enhancement knowledge graph dynamic integrity protection method, which comprises the following steps: semantic enhancement modeling, constructing a unified data model in the discrete manufacturing field, and the unified data model at least comprising an entity set, a relation set, an attribute set, a static structure constraint set and a dynamic operation constraint set; formulating the static structure constraint set and the dynamic operation constraint set into an SHACL rule base; performing a structure constraint shape in the SHACL rule base on full-amount data before knowledge graph deployment, generating a structured verification report, intercepting a real-time data operation request, extracting a semantic subgraph related to the current operation, and only performing local verification on the semantic subgraph by loading corresponding SPARQL operation constraint shapes, and if the verification fails, the operation request is rejected and a correction prompt is returned. The application realizes the elimination of semantic fragmentation by internalizing manufacturing business rules into dynamic operation constraints.

The invention discloses an efficient and automatic shopping mall data quantitative analysis method, which expands and applies quantitative analysis methods used in the fields of finance, securities, spot goods, virtual currency and the like to shopping mall data analysis. The characteristics of multi-dimensional data of logs, commodities, contents, activities, search, transactions and the like of a shopping mall and the requirements of a quantitative analysis method for the data are comprehensively considered, collection is carried out in a reasonable mode, structured and standardized processing is carried out, a unique index, factor and strategy model system is established, and a factor value space is designed; by applying a periodic, classified and layered factor and strategy model training method, the influence of various main data of the shopping mall on the operating indexes can be comprehensively, accurately and efficiently analyzed.

The application relates to the technical field of data analysis, in particular to a production variable verification method and device, equipment and a computer readable storage medium, the method comprising the following steps: packaging processing logic codes of various production variables to obtain variable code packages; obtaining verification data, calling the variable code packages by taking the verification data as input parameters, and obtaining processing results of the various production variables; generating check results of the various production variables according to the processing logic codes of the various production variables and the verification data; and if the processing result of a target production variable in the various production variables is consistent with the check result of the target production variable, it is determined that the target production variable passes the verification. The application improves the online timeliness effect of the production variable.

The invention discloses a low-cost deployment method for a prompt chain in a zero-trust access network. The method comprises the following steps: introducing a verification cost balance (VCB) factor to reduce the verification times of a zero-trust ZT; proposing a sub prompt chain branch limit SCB algorithm based on a verification cost balance VCB factor, gradually selecting an optimal PES node to deploy a prompt chain, and thus realizing the minimum service cost; the invention not only solves the problem of conflict between the deployment cost and verification cost of the prompt chain in the ZT network, but also provides an economical, efficient and high-adaptability deployment method, thereby enhancing the service quality and resource utilization efficiency of the generative artificial intelligence application in the ZT network.