Method for obtaining dependencies between process modules based on test cases

A technology of test cases and dependencies, applied in software testing/debugging, error detection/correction, instruments, etc., can solve problems such as low verification efficiency, achieve convenient analysis, improve verification efficiency, and reduce verification times

Active Publication Date: 2018-05-04
黑龙江易通智能教育科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to solve the current generation of test cases using the exhaustive method, the magnitude of the generated test cases is a power series, when the module m is large, the verification efficiency is extremely low, and there are a large number of redundant verification problems , and propose a method to obtain dependencies among process modules based on test cases

Method used

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  • Method for obtaining dependencies between process modules based on test cases
  • Method for obtaining dependencies between process modules based on test cases
  • Method for obtaining dependencies between process modules based on test cases

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specific Embodiment approach 1

[0027] Specific implementation mode one: combine figure 1 Describe this embodiment, a method for obtaining dependencies between process modules based on test cases in this embodiment The specific process is as follows:

[0028] Definition 1 (">>"):

[0029] A binary operator that means modules enforce order of execution.

[0030] Use form: module A >> module B.

[0031] Example: A>>B means that module A must be executed before module B.

[0032] Definition 2 (">"):

[0033] Binary operator, indicating the execution order of modules, the main purpose is to distinguish from ">>"

[0034] Use form: Module A>Module B.

[0035] Example: A>B means that module A is executed before module B in a certain test case.

[0036] Definition 3 (associated blocks):

[0037] There are two modules A and B, and it is required that A>>B, then A and B are associated blocks, recorded as A>>B.

[0038] Definition 4 (test case):

[0039] In the present invention, the input of the test case is...

specific Embodiment approach 2

[0054] Specific embodiment two: the difference between this embodiment and specific embodiment one is: input and process correct and wrong test case in the described step one, test case includes all process modules (test case input is the execution sequence of process module, includes all Process module; the output is the execution result of the sequence: correct or wrong); the specific process is:

[0055] Input and obtain test cases and simplify, the specific steps are as follows:

[0056] Step 11, input correct test case and wrong test case;

[0057] Step 12: Set m modules in all n processes contained in a test case, and convert the module name to S 1 -S m form, if S i ,S j are modules in the same process, and have S i >S j , then the S i >>S j set as associated block;

[0058] Si >S j means S i module in S j Execute before the module; S i >>S j means S i module must be in S j Execution before the module, S i ,S j is an associated block;

[0059] The valu...

specific Embodiment approach 3

[0062] Specific implementation mode three: the difference between this implementation mode and specific implementation mode one or two is that the module name is converted into S in the step one or two 1 -S m The transformation rules of the form are:

[0063] S i_k according to mapped to Sj,

[0064] Among them, S i_k Indicates the kth module of the i-th process, where k is S i_k The position in the i-th process, Sj is the j-th module after mapping; m a Indicates the number of process modules of the ath process;

[0065] Conversion example:

[0066] Process 1: S 1_1 , S 1_2 , S 1_3 , S 1_4

[0067] Process 2: S 2_1 , S 2_2 , S 2_3

[0068] Process 3: S 3_1 , S 3_2 , S 3_3 , S 3_4

[0069] S 1_3 corresponds to j as i.e. S 1_3 mapped to S 3

[0070] S 2_2 corresponds to j as 4 means the number of the first process module, 2 means S 2_2 It is the second module in the process, S 2_2 mapped to S 6

[0071] S 3_3 corresponds to j as 4 means the ...

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Abstract

The invention relates to a method for obtaining dependencies between process modules based on test cases. The method aims at solving the problems that verification efficiency is extremely low and there are a large number of redundant verification problems when a module m is larger due to the fact that orders of magnitude of the generated test cases generated by means of an exhaustion method are power series. The method includes the steps of 1, inputting and processing correct and erroneous test cases, wherein the test cases include all process modules; 2, generating a correlation matrix basedon the correct test cases and a first erroneous test case; 3, generating suspicious points according to a comparison matrix C; 4, generating the test cases based on the suspicious points and verifyingthe test cases; 5, removing the first erroneous test case; 6, determining whether or not the number of the erroneous test cases is 0; outputting operation results if the number is 0; executing the step 2 if the number is not 0. The method is used in the task block dependency determination field.

Description

technical field [0001] The invention relates to a method for obtaining dependency relationship among process modules based on test cases. Background technique [0002] During the synchronous operation of multiple processes, its asynchronicity is reflected in the alternate execution of modules in the process, and the execution order is out of order, and the processes advance at independent and unpredictable speeds. In order to realize process synchronization, semaphore mechanism, monitor mechanism, etc. can be used to control the execution order of processes according to the dependencies between processes. But when it is not sure which modules in the process have dependencies, it is necessary to pass a series of test case verification to obtain the predecessor relationship between the modules. Each test case is a set of execution sequences including all modules in multiple processes, and the sequence is guaranteed to be controllable during verification. [0003] Regarding h...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
CPCG06F11/3684
Inventor 曲明成何金虎王冠楠
Owner 黑龙江易通智能教育科技有限公司
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