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An Error Correction Method of Cyclic Hamming Codes Based on Parallel Encoding and Decoding

An error correction method, Hamming code technology, applied in the direction of using linear codes for error correction/detection, using block codes for error correction/detection, single error correction, etc., can solve the problem of increasing the area of ​​EDAC circuits around SRAM and registers, etc.

Active Publication Date: 2016-04-27
SOI MICRO CO LTD
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Problems solved by technology

However, the (39,32) Hsiao code requires 7 redundant parity bits, which increases the area of ​​the EDAC circuit around the SRAM and registers

Method used

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  • An Error Correction Method of Cyclic Hamming Codes Based on Parallel Encoding and Decoding
  • An Error Correction Method of Cyclic Hamming Codes Based on Parallel Encoding and Decoding
  • An Error Correction Method of Cyclic Hamming Codes Based on Parallel Encoding and Decoding

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Embodiment Construction

[0046] In order to further explain the technical means and effects that the present invention takes to achieve the intended purpose of the invention, below in conjunction with the accompanying drawings and preferred embodiments, the specific implementation of the error correction method based on parallel coding and decoding of cyclic Hamming codes proposed by the present invention The method and working principle are described in detail.

[0047] Depend on figure 1 It can be seen that the error correction method of the cyclic Hamming code based on parallel encoding and decoding provided by the present invention includes: first analyzing the structure of the traditional serial CRC encoding circuit to obtain the recursion between the data in the six registers of the serial CRC encoding circuit relationship; that is,

[0048] s 5 i + ...

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Abstract

The invention relates to the technical field of correction methods and discloses a cyclic Hamming code correction method based on parallel encoding and decoding . The method includes firstly, analyzing the structure of a conventional serial CRC (cyclic redundancy check) encoding circuit to acquire a recurrence relation of data in six registers of the CRC encoding circuit; secondly, extending the serial recurrence relation to acquire a relation expression between check bits and information bits in parallel encoding; thirdly, performing parallel encoding according to the relation expression between the check bits and the information bits in parallel encoding; fourthly, acquiring a relation expression between novel check bits and novel encoding codes in parallel decoding, and decoding to acquire codes; and fifthly, correcting the codes acquired by parallel decoding. Input data are encoded and decoded in a parallel manner, encoding and decoding speed of input signals is increased, correction of the input signals is achieved, and added check bits are few.

Description

technical field [0001] The invention relates to the technical field of error correction methods, and is mainly applicable to the error correction method of cyclic Hamming codes based on parallel encoding and decoding. Background technique [0002] CRC is an efficient error-correcting code. Its cyclic encoding and decoding characteristics make it widely used in communication, automatic control and memory reliability. The usual CRC encoding and decoding is implemented in a serial manner. The circuit required for encoding and decoding of this scheme is very small, but the encoding and decoding time depends on the clock cycle and the length of the codeword, so it is extremely unsuitable for occasions that require extremely high circuit speed. [0003] (39,32) The Hsiao code is a commonly used linear block code, an error-correcting code (SECDED) capable of correcting one error and detecting two errors. Through its corresponding generation matrix and parity check matrix, a corre...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/19
Inventor 刘鑫赵发展韩郑生
Owner SOI MICRO CO LTD
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