A limiting circuit

A limiting circuit and limiting technology, applied in the electronic field, can solve the problems of power supply voltage deviation and low precision

Active Publication Date: 2015-10-28
NATIONZ TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention provides a limiter circuit, which solves the technical problems of large deviation and low precision of the power supply voltage output by the limiter circuit in the prior art

Method used

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  • A limiting circuit
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Experimental program
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Embodiment 1

[0029] figure 1 It is a schematic diagram of a limiter circuit according to an embodiment of the present invention, please refer to figure 1 :

[0030] A limiting circuit, comprising a voltage sampling unit 1, an amplifying unit 2 and a limiting unit 3, wherein the voltage sampling unit 1 generates a first bias current I through a bias current generating circuit 1 The sampling voltage is formed by flowing through the sampling resistor; the amplifying unit 2 amplifies the voltage drop formed between the power supply voltage and the sampling voltage; the limiting unit 3 limits the voltage amplified by the amplifying unit 2 .

Embodiment 2

[0032] figure 2 It is a schematic diagram of a limiter circuit in Embodiment 2 of the present invention, please refer to figure 2 :

[0033] In this embodiment, the voltage sampling unit includes a sampling resistor 11, the amplifying unit includes a PMOS amplifier tube P1 and a load circuit 21, the limiting unit includes an NMOS discharge tube N3, the sampling resistor 11 is connected to a bias current generation circuit, and the bias current generation circuit circuit generates a first bias current flow I 1 Flow through the sampling resistor 11 to form a sampling voltage, I1 flows into the gate of P1, one end of the sampling resistor 11 is connected to the gate of the PMOS amplifier P1, the other end of the sampling resistor 11 is grounded to VSS, and the source of the PMOS amplifier P1 is connected to the power supply VDD , the load circuit 21 is connected between the ground wire VSS and the drain of the PMOS amplifier P1, the drain of the PMOS amplifier P1 is connected...

Embodiment 3

[0038] In the following, the first switching control circuit includes a first NMOS control transistor, the second switching control circuit includes a second NMOS control transistor and a second inverter, and the sampling resistor 11 is an adjustable resistor R1 as an example. Please refer to image 3 , image 3 It is a schematic diagram of a limiter circuit in Embodiment 3 of the present invention:

[0039] The resistor R1 is connected to the bias current generating circuit, and the first bias current I generated by the bias current generating circuit flows 1 It flows into the gate of PMOS amplifier tube P1; one end of resistor R1 is connected to the gate of PMOS amplifier tube P1, the other end of resistor R1 is grounded to VSS, and the first bias current flows I 1 Flow through resistor R1 to form the sampling voltage. The source of the PMOS amplifier tube P1 is connected to the power supply VDD, and the drain is connected to the first load circuit; the first load circuit ...

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Abstract

The invention discloses an amplitude limiting circuit. The amplitude limiting circuit comprises a voltage sampling unit, an amplification unit and an amplitude limiting unit, wherein the amplitude limiting circuit is connected with power voltage to be subjected to amplitude limiting and a bias current generation circuit; the voltage sampling unit converts first bias current which is generated by the bias current generation circuit into sampling voltage by a sampling resistor; the amplification unit amplifies voltage reduction formed between the power voltage and the sampling voltage; and the amplitude limiting unit performs amplitude limiting on the voltage which is amplified by the amplification unit. By adoption of the technical scheme, the technical problems of high deviation and low accuracy of the power voltage which is output by the amplitude limiting circuit in the prior art are solved.

Description

technical field [0001] The invention relates to the field of electronics, in particular to a limiter circuit. Background technique [0002] For electronic devices, when the input voltage is too large or the internal load is too small, the limiter circuit is usually required to discharge the excess energy and limit the power supply voltage. Take the UHF RFID tag chip as an example. When the distance between the tag and the card reader is relatively small When the energy sensed by proximity is too large or the internal load of the chip is too small, the power supply voltage will be too high, which is higher than the normal operating voltage of the device, which will affect the performance of the circuit. A limiting circuit is designed in the circuit, and excess energy is released through the limiting circuit. [0003] The limiter circuit in the prior art is generally implemented by detecting the voltage and incorporating a certain resistive load into the chip system according...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H03G11/00
Inventor李玲李鸿雁
OwnerNATIONZ TECH INC