Digital Waveform Test Method of Integrated Circuit Tester

Abstract

The invention discloses a digital waveform testing system and digital waveform generating method of an integrated circuit tester. The method comprises reading and sending a data generating command toa driving chip; setting the bit widths N and depths of FIFOs in a vector waveform generating module and a switch information generating module according to a set transmitter rate and a transmitter bitwidth; causing the set rate Rate to determine the resolution of the waveform data and the switch data as 1 / Rate, causing the data of an N-bit width to represent the data in a N / Rate time length, reading a cycle T and edge positioning information D1 and D2, dividing data in one cycle into T*Rate / N pieces of data to be successively saved in the waveform data; setting the transmitter rate and bit width to be the same, reading the cycle and the edge positioning information D0 and D3, dividing the switch information in one cycle into T*Rate / N d pieces of data to be successively stored in the switch data; while data is written into the FIFO, reading the waveform data and the switch data according to pipeline operation, and sending drive data through the transmitter.

Description

technical field

[0001] The invention relates to a digital waveform testing method for an integrated circuit tester, belonging to the field of digital integrated circuit testers. Background technique

[0002] Digital integrated circuit tester is a special instrument for testing integrated circuits. It tests DUT function, DUT DC parameters and AC parameters by sending vector test waveforms. It mainly relies on ASIC or programmable logic devices + peripheral high-precision devices to generate waveforms with a precision of 100 ps or even higher precision to measure various indicators of the DUT; the usual methods are either long development time and high cost, or the device takes up too much Large size and high power consumption. Contents of the invention

[0003] In view of the above problems, the present invention provides a digital waveform testing method of an integrated circuit tester with short development time, low cost, small occupied volume and low power consumption....

Examples

Embodiment Construction

[0025] Below in conjunction with accompanying drawing, the present invention is described in further detail.

[0026] Such as figure 1 As shown, the present invention provides a digital waveform test system of an integrated circuit tester, including a storage module, a reading module, a vector waveform generation module, a switch data generation module, a drive generation module, and a transmission module;

[0027] The storage module: storing vector information, cycle information, edge positioning information, and driving information data sent by the host computer;

[0028] The reading module: read vector, period, edge positioning information, and drive information to the vector waveform generation module, switch data generation module, and drive generation module to generate waveform data;

[0029] Described vector waveform generation module: generate the vector waveform for measuring DUT function according to cycle, edge positioning information;

[0030] The switch data ge...

technical field

[0001] The invention relates to a digital waveform testing method for an integrated circuit tester, belonging to the field of digital integrated circuit testers. Background technique

[0002] Digital integrated circuit tester is a special instrument for testing integrated circuits. It tests DUT function, DUT DC parameters and AC parameters by sending vector test waveforms. It mainly relies on ASIC or programmable logic devices + peripheral high-precision devices to generate waveforms with a precision of 100 ps or even higher precision to measure various indicators of the DUT; the usual methods are either long development time and high cost, or the device takes up too much Large size and high power consumption. Contents of the invention

[0003] In view of the above problems, the present invention provides a digital waveform testing method of an integrated circuit tester with short development time, low cost, small occupied volume and low power consumption....

Examples

Embodiment Construction

[0025] Below in conjunction with accompanying drawing, the present invention is described in further detail.

[0026] Such as figure 1 As shown, the present invention provides a digital waveform test system of an integrated circuit tester, including a storage module, a reading module, a vector waveform generation module, a switch data generation module, a drive generation module, and a transmission module;

[0027] The storage module: storing vector information, cycle information, edge positioning information, and driving information data sent by the host computer;

[0028] The reading module: read vector, period, edge positioning information, and drive information to the vector waveform generation module, switch data generation module, and drive generation module to generate waveform data;

[0029] Described vector waveform generation module: generate the vector waveform for measuring DUT function according to cycle, edge positioning information;

[0030] The switch data ge...

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