LDPC simulation verification platform and verification method

A simulation verification and platform technology, applied in the field of encoding and decoding verification, can solve the problems of low verification reliability and slow verification speed, and achieve the effect of improving verification efficiency, facilitating transplantation and redevelopment

Inactive Publication Date: 2018-06-22
HUNAN GOKE MICROELECTRONICS
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Problems solved by technology

[0005] In order to solve the problems of slow verification speed and low verification reliability in the systematic verification o

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  • LDPC simulation verification platform and verification method

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[0026] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following illustrative examples do not represent all implementations consistent with the present application; rather, they are merely means consistent with some aspects of the application as recited in the appended claims example of.

[0027] In order to further explain the technical means and effects adopted by the application to achieve the predetermined purpose, the specific implementation, structural features and effects of the application will be described in detail below in conjunction with the accompanying drawings and examples.

[0028] see figure 1 As shown, it is a connection block diagram of an LDPC simulation verificatio...

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Abstract

The present application relates to the technical field of encoding and decoding verification, and in particular, to an LDPC simulation verification platform and verification method. The verification platform comprises a sequence, an input unit, a to-be-tested device, an output unit, a reference model, and a scoreboard. The LDPC simulation verification platform is developed based on the UVM verification methodology, which is convenient for transplantation and redevelopment; through the verification matrix optimization program developed based on the MATLAB, an optimal verification matrix can begenerated for different NAND Flash particle characteristics; through the LDPC encoder/decoder reference model developed based on the C++, the expected data of each computing node in each codeword operation cycle can be accurately output, and by comparison with the resistance transistor logic code computed result, the problem location can be quickly locked; and by integrating the programming language interface component, real-time comparison between the C++ reference model and the resistance transistor logic code result and the error reporting can be implemented, and verification efficiency canbe improved.

Description

technical field [0001] The application relates to the technical field of encoding and decoding verification, in particular to an LDPC simulation verification platform and a verification method. Background technique [0002] LDPC, that is, Low Density Parity Code, is called Low Density Parity Check Code in Chinese. As a new type of high-efficiency error correction code, it greatly prolongs the service life of NAND Flash devices through its super error correction capability. Therefore, in the new generation of SSD main control chips, LDPC technology is widely used. [0003] At present, LDPC technology mainly focuses on LDPC pattern selection and coder / decoder hardware implementation and so on. For example, the hardware simulation verification platform based on the configurable QC-LDPC encoding and decoding algorithm proposed in the existing patent documents mainly verifies the LDPC code length and encoding and decoding characteristics applied in the communication field from t...

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Application Information

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IPC IPC(8): G06F11/10
CPCG06F11/1032
Inventor 王颖刘小波彭鹏姜黎
Owner HUNAN GOKE MICROELECTRONICS
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