Implementation method of solid state disk based on cascade architecture

A technology of solid-state hard disk and implementation method, which is applied in the field of data security, can solve problems such as increasing the complexity of circuit structure, and achieve the effect of reducing complexity

Inactive Publication Date: 2020-02-07
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Problems solved by technology

[0004] However, the memory cards in the prior art are all used as terminal storage nodes. When bus cascading is

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  • Implementation method of solid state disk based on cascade architecture
  • Implementation method of solid state disk based on cascade architecture
  • Implementation method of solid state disk based on cascade architecture

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Embodiment Construction

[0038] The technical solutions provided by the present invention will be further described below in conjunction with the accompanying drawings.

[0039] In the prior art, the SSD controller has multiple parallel storage channels to increase the parallel storage speed. Usually, each channel is connected to a flash memory (Flash). At present, the SSD controller generally drives a maximum of 8 channels (or called channels) of flash memory (Flash). Because there are more than 20 flash pins for one channel, if more than 8 channels (such as 16 channels) are to be realized to increase the speed and storage density, the pins of the main control chip (thus the chip size and packaging cost) will be greatly increased. This is one reason why you rarely see flash controllers with more than 8 channels on the market. In addition, when using Flash to directly construct a large-capacity solid state drive, the controller needs to add complex read and write balance control algorithms (error corr...

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Abstract

The invention discloses an implementation method of a solid state disk based on cascade architecture. The implementation method comprises the following steps that: S1: an SSD (Solid State Disk) controller is connected with a plurality of cascade storage mechanisms in parallel, and each cascade storage mechanism adopts a plurality of storage devices to form a multi-level architecture in a bus cascade mode through self interfaces of the storage devices; S2, when the SSD controller sends a storage task to the cascade storage mechanism, each storage device monitors a bus signal and judges whetherthe storage task is a storage task of the storage device or a cascade link node of the storage device or not; and S3, when any storage device sends data to the SSD controller or a subordinate node ofthe SSD controller, the storage device actively sends an instruction to preempt the bus control right, and chip selection is realized through the instruction. By adopting the technical scheme of the invention, a plurality of storage devices are cascaded step by step through the standard interface, so that the storage capacity can be infinitely expanded theoretically to meet the requirements of various applications; and meanwhile, the implementation complexity of the solid state disk is further reduced by adopting standard interface cascading.

Description

technical field [0001] The invention relates to the technical field of data security, in particular to an implementation method based on a cascade architecture solid state disk. Background technique [0002] Storage devices are currently commonly used data storage devices. With the advent of the era of big data, the demand for storage capacity is also increasing. In the prior art, storage devices are usually packaged in the form of SSD, MMC card, SD card, eMMC chip, Flash chip, etc. Due to the physical characteristics of NAND Flash itself, direct architecture for large-capacity storage will result in an increase in the chip area of ​​the Flash controller, which greatly increases the technical difficulty and hardware cost of the controller implementation. [0003] On the other hand, with the continuous maturity of memory card technology, memory cards such as SD cards, MMC cards or eMMC chips have been widely used in various storage devices, especially with the wide applicati...

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Application Information

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IPC IPC(8): G06F3/06
CPCG06F3/0607G06F3/0635G06F3/0688
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