Semiconductor device
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first embodiment
[0031]FIG. 1 is a schematic view illustrating the cross-sectional structure of the main part of a semiconductor device 1 according to a first embodiment of the invention.
[0032]FIG. 2 is a schematic view illustrating the planar structure of the main part of the semiconductor device 1.
[0033]FIG. 3 is a cross-sectional view taken along line A1-A1 in FIG. 2. FIG. 1 shows a cross section taken along line B-B in FIG. 3.
[0034]FIG. 4 is a cross-sectional view taken along line A2-A2 in FIG. 2.
[0035] This embodiment is described assuming the first conductivity type as P-type and the second conductivity type as N-type.
[0036] On a major surface of a P++-type silicon substrate 2, a semiconductor layer (drift layer or drain layer) 4 of P-type silicon and a first semiconductor region (base region) 6 of N−-type silicon are successively provided. A p-n junction is formed between the semiconductor layer 4 and the first semiconductor region 6.
[0037] Trenches T are provided to extend through the ...
second embodiment
[0072] The second embodiment is different from the first embodiment in the method of forming the third semiconductor region 13.
[0073] In this embodiment again, like the first embodiment, no insulating film is formed at the bottom of the trench T. The semiconductor layer 4 exposed inside the trench T through the bottom of the trench T is used as a base crystal to epitaxially grow N-type silicon. The growth is terminated before reaching the interface between the semiconductor layer 4 and the first semiconductor region 6. Thus a third semiconductor region 13 is formed, which fills the trench T below the interface between the semiconductor layer 4 and the first semiconductor region 6 and forms a junction with the semiconductor layer 4 at the bottom of the trench T.
[0074] The epitaxial growth of the third semiconductor region 13 is selective epitaxial growth exclusively onto the semiconductor layer 4 exposed through the bottom of the trench T. Therefore the crystal face (crystal orient...
third embodiment
[0075]FIG. 13 is a schematic view illustrating the cross-sectional structure of the main part of a semiconductor device 31 according to a third embodiment of the invention.
[0076] In this embodiment, the conductivity type of each element is reversed with respect to the first embodiment. More specifically, assuming the first conductivity type as N-type and the second conductivity type as P-type, the device comprises a substrate 102 of N++-type silicon, a semiconductor layer (drift layer) 104 of N-type silicon, a first semiconductor region (base region) 106 of P−-type silicon, a second semiconductor region (source region) 107 of N+-type silicon, a third semiconductor region 113 of P-type silicon or polysilicon, and a gate electrode 118 of N+-type silicon.
[0077] In this embodiment again, depletion of the semiconductor layer 104 and the third semiconductor region 113 can be facilitated through the bottom of the trench T serving as a p-n junction. Therefore, even when the dopant concent...
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