Semiconductor device having curved leads offset from the center of bonding pads

a technology of curved leads and bonding pads, which is applied in the direction of printed circuits, sustainable manufacturing/processing, and final product manufacturing, etc., can solve the problem of inability to ensure good electrical connections

Inactive Publication Date: 2008-03-13
SEIKO EPSON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0045] An objective of the embodiments of the present invention is to increase the reliability of the electrical connection between leads and electrodes.
[0051] Since the second portion is curved in this embodiment, it is difficult to break. This makes it possible to increase the reliability of the electrical connection between the leads and the electrodes.
[0051] Since the second portion is curved in this embodiment, it is difficult to break. This makes it possible to increase the reliability of the electrical connection between the leads and the electrodes.
[0022] wherein the substrate and the semiconductor chip are each heated in the step (a) at a temperature at which the rates of change of the lengths of the substrate and the semiconductor chip before and after the heating are the same.
[0051] Since the second portion is curved in this embodiment, it is difficult to break. This makes it possible to increase the reliability of the electrical connection between the leads and the electrodes.

Problems solved by technology

In addition, since the substrate and the semiconductor chip have different coefficients of thermal expansion, it would be impossible to ensure good electrical connections if there are large displacements of the leads and electrodes.

Method used

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  • Semiconductor device having curved leads offset from the center of bonding pads
  • Semiconductor device having curved leads offset from the center of bonding pads
  • Semiconductor device having curved leads offset from the center of bonding pads

Examples

Experimental program
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first embodiment

[0103]FIG. 1 is illustrative of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is an enlarged section of the semiconductor device taken along the line II-II of FIG. 1. The semiconductor device has a semiconductor chip 10. The semiconductor chip 10 could be of a three-dimensional cubic shape or of a two-dimensional rectangular shape. Integrated circuitry 12 is formed on the semiconductor chip 10. The semiconductor chip 10 has electrodes 14. The plurality of electrodes 14 are arranged along one edge of the semiconductor chip 10. The electrodes 14 could be disposed in a staggered arrangement. Each electrode 14 could be a pad and a bump provided thereon. The electrodes 14 are formed of a metal such as gold or copper. The electrodes 14 are connected electrically to the interior of the semiconductor chip 10 and at least to of the electrodes 14 (either all the electrodes 14 or a plurality thereof that is not all of the electrodes 14) are connected e...

second embodiment

[0121] A semiconductor device in accordance with a second embodiment of the present invention is shown in FIG. 7. The example shown in FIG. 7 is a variant of that shown in FIG. 3. In FIG. 7, details of the semiconductor chip 10 and the electrodes 14 correspond to those of the first embodiment. A first portion 42 of a lead 40 is bonded to the electrode 14. A second portion 44 of the lead 40 continuously extends from the first portion 42. The lead 40 further includes a third portion 46 that continuously extends from the second portion 44, in the opposite direction from the first portion 42. The first portion 42 is disposed so as to extend on a first straight line L11. The third portion 46 is disposed so as to extend on a second straight line L12. The second straight line L12 is parallel to the first straight line L10, displaced therefrom in the direction in which the second portion 44 protrudes. All other details of the lead 40 are similar to those of the lead 22.

[0122] The descripti...

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Abstract

A semiconductor device including: a substrate on which a plurality of leads are formed; and a semiconductor chip mounted on the substrate in such a manner that a surface of the semiconductor chip having a plurality of electrodes faces the substrate. Each of the leads includes a first portion that is bonded to one of the electrodes and a second portion that extends outward from the inner side of a region in the substrate that overlays the semiconductor chip. The second portion is entirely adhered to the substrate and curved.

Description

[0001] This is a Division of application Ser. No. 10 / 960,099 filed Oct. 8, 2004. The disclosure of the prior application is hereby incorporated by reference herein in its entirety.[0002] Japanese Patent Application No. 2003-358077, filed on Oct. 17, 2003, is hereby incorporated by reference in its entirety. BACKGROUND OF THE INVENTION [0003] The present invention relates to a semiconductor device and a method of fabrication thereof, an electronic module, together with an electronic instrument. [0004] In chip-on-film (COF) packaging, a semiconductor chip is mounted on a substrate. Since the substrate and the semiconductor chip have different coefficients of thermal expansion, stress is generated in connective portions between leads formed on the substrate and electrodes of the semiconductor chip. Since fine leads are easily broken by stress, it is required to prevent such a situation. In addition, since the substrate and the semiconductor chip have different coefficients of thermal e...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L21/60H01L23/12H01L23/498H05K1/11
CPCH01L23/49838H01L23/4985H01L2224/73204H01L2224/32225H01L2224/16225H01L2224/16H01L2924/01079H05K1/111H05K2201/09263H05K2201/10674H01L2924/01322H01L2924/00H01L2224/05571H01L2224/05573H01L2224/81385H01L2924/00014Y02P70/50H01L2224/05599H01L21/60
InventorUCHIDA, MASAMI
OwnerSEIKO EPSON CORP