API generation method, device, equipment and medium for heterogeneous integrated circuit modules

Abstract

The present invention discloses an API generation method, device, equipment and medium for a heterogeneous integrated circuit module. The method includes: obtaining a first RTL of a first heterogeneous integrated circuit module, and generating multiple first API sub-blocks according to each first functional block in the first RTL; connecting the first API sub-blocks according to the first RTL to generate a first heterogeneous API; when the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, obtaining the second RTL of the second heterogeneous integrated circuit module, and generating a second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API. By adopting the above technical solution, by simply adjusting the reusable heterogeneous API, a matching heterogeneous API can be generated for a heterogeneous integrated circuit module with frequently adjusted architecture, which reduces the difficulty of developing heterogeneous APIs and speeds up the development progress of heterogeneous integrated circuit modules.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit testing technology, and in particular to an API generation method, device, equipment and medium for heterogeneous integrated circuit modules. Background Art

[0002] With the development of integrated circuits, integrated circuit developers often choose circuit modules with similar but different internal structures in order to improve the construction efficiency and reliability of integrated circuits. This is also called heterogeneous integrated circuit modules (IP). Heterogeneous IP can be customized according to different needs to adapt to different usage scenarios.

[0003] In addition, during the custom development of heterogeneous IP, it is also necessary to customize the corresponding API (Application Programming Interface) for each heterogeneous IP. By verifying the API, the abnormal position of the heterogeneous IP can be quickly located, improving the design efficiency of the heterogeneous IP, and then realizing the repeatability, portability and maintainability of the integrated circuit's calling interface model.

[0004] However, for different heterogeneous IPs, their internal architectures are similar but not exactly the same. Therefore, it is necessary to customize APIs for different heterogeneous IPs. But in fact, the development of heterogeneous IPs will adjust the architecture according to demand. This frequent architecture adjustment and development has a huge impact on API development. If developers manually customize the API for each heterogeneous IP, it may lead to a longer development cycle of the heterogeneous API, making it difficult to synchronize the progress of heterogeneous IP verification with the development progress. Summary of the invention

[0005] The present invention provides a method, device, equipment and medium for generating an API for a heterogeneous integrated circuit module. By simply adjusting a reusable heterogeneous API, a matching heterogeneous API can be generated for a heterogeneous integrated circuit module whose architecture is frequently adjusted, thereby reducing the difficulty of developing the heterogeneous API and accelerating the development progress of the heterogeneous integrated circuit module.

[0006] According to one aspect of the present invention, a method for generating an API of a heterogeneous integrated circuit module is provided, comprising:

[0007] Obtaining a first RTL of a first heterogeneous integrated circuit module, and generating a plurality of first API sub-blocks according to each first functional block in the first RTL (Register Transfer Level).

[0008] According to the first RTL, the first API sub-blocks are connected to generate a first heterogeneous API;

[0009] When the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, a second RTL of the second heterogeneous integrated circuit module is obtained, and a second heterogeneous API is generated according to the first RTL, the second RTL and the first heterogeneous API.

[0010] According to another aspect of the present invention, there is provided an API generation device for a heterogeneous integrated circuit module, comprising:

[0011] A first API sub-block generation module, configured to obtain a first RTL of a first heterogeneous integrated circuit module, and generate a plurality of first API sub-blocks according to each first functional block in the first RTL;

[0012] A first heterogeneous API generation module, configured to connect the first API sub-blocks according to the first RTL to generate a first heterogeneous API;

[0013] The second heterogeneous API generation module is used to obtain the second RTL of the second heterogeneous integrated circuit module when the architecture of the first heterogeneous integrated circuit module is adjusted to generate the second heterogeneous integrated circuit module, and generate the second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API.

[0014] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0015] at least one processor; and

[0016] a memory communicatively connected to the at least one processor; wherein,

[0017] The memory stores a computer program that can be executed by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the API generation method for a heterogeneous integrated circuit module described in any embodiment of the present invention.

[0018] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the API generation method for a heterogeneous integrated circuit module described in any embodiment of the present invention when executed.

[0019] The technical solution of the embodiment of the present invention obtains the first RTL of the first heterogeneous integrated circuit module, generates multiple first API sub-blocks according to the first functional blocks in the first RTL, connects the first API sub-blocks according to the first RTL to generate a first heterogeneous API, and when the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, obtains the second RTL of the second heterogeneous integrated circuit module, and generates the second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API, thereby generating a matching heterogeneous API for a heterogeneous integrated circuit module with frequently adjusted architecture, reducing the development difficulty of the heterogeneous API, and can perform more fine-grained verification on the RTL, thereby improving the adequacy of the verification. From the perspective of verification, abnormal heterogeneous IPs and abnormal parts inside the heterogeneous IPs can be quickly located, thereby improving the error repair efficiency of the heterogeneous IPs and accelerating the development progress of the heterogeneous integrated circuit modules.

[0020] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 is a flowchart of a method for generating an API for a heterogeneous integrated circuit module according to a first embodiment of the present invention;

[0023] Figure 2 is a schematic diagram of a mapping relationship between a function block group and an API sub-block provided according to an embodiment of the present invention;

[0024] Figure 3 is a schematic diagram of the structure of a heterogeneous API provided according to an embodiment of the present invention;

[0025] Figure 4 is a schematic diagram of an adjustment method of an API sub-block in a heterogeneous API provided according to an embodiment of the present invention;

[0026] Figure 5 is a flowchart of another API generation method for a heterogeneous integrated circuit module provided in Embodiment 2 of the present invention;

[0027] Figure 6is a structural schematic diagram of an API generating device for a heterogeneous integrated circuit module provided in Embodiment 3 of the present invention;

[0028] Figure 7 It is a structural schematic diagram of an electronic device for implementing the API generation method of a heterogeneous integrated circuit module according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0030] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0031] Embodiment 1

[0032] Figure 1 This is a flowchart of a method for generating an API for a heterogeneous integrated circuit module provided in the first embodiment of the present invention. This embodiment is applicable to the case of quickly generating a heterogeneous API for a heterogeneous integrated circuit module. The method can be executed by an API generating device for a heterogeneous integrated circuit module. The API generating device for a heterogeneous integrated circuit module can be implemented in the form of hardware and / or software and can generally be configured in a computer with data processing capabilities. Figure 1 As shown, the method includes:

[0033] S110, obtaining a first RTL of a first heterogeneous integrated circuit module, and generating a plurality of first API sub-blocks according to each first functional block in the first RTL.

[0034] Optionally, the first heterogeneous integrated circuit may include multiple first functional blocks, each of which has a certain connection relationship. The functional blocks with the connection relationship can perform tasks such as data interaction, thereby realizing the function of the first heterogeneous integrated circuit module.

[0035] Optionally, the first heterogeneous integrated circuit module may refer to any heterogeneous IP, which may be used as a reference for the second heterogeneous integrated circuit module. The second heterogeneous integrated circuit module may refer to a heterogeneous IP after architectural adjustment based on the first heterogeneous integrated circuit module. The architectural adjustment may generally include adding functional blocks, deleting functional blocks, adjusting the link order between functional blocks, or adjusting internal parameters of functional blocks, but is not limited to the above-mentioned architectural adjustment content.

[0036] Optionally, RTL can be used as an abstract model of a heterogeneous integrated circuit module, generally used to describe the transmission process of internal data between registers of a processor of a heterogeneous integrated circuit module. The first heterogeneous integrated circuit can be used as a physical circuit designed by a technician. Since physical circuits generally cannot support a large number of tests, the first heterogeneous integrated circuit is generally verified by testing the abstract model RTL.

[0037] Optionally, after obtaining the first RTL corresponding to the first heterogeneous integrated circuit module, the structural information of each functional block in the first RTL can be analyzed, and based on the structural relationship between the functional blocks in the first RTL, the first functional block can be divided into multiple first functional block groups, and each first functional block group can be modeled to generate a first API sub-block corresponding to each first functional block group.

[0038] Optionally, the method for dividing the first functional block group may include: judging whether the target first functional block has a strong physical relationship with other first functional blocks based on the structural information of each first functional block; wherein, whether there is a strong physical relationship can be determined based on a preset structural relationship judgment rule; if not, the target first functional block is independently regarded as a first functional block group; if the target first functional block has a strong physical relationship with at least one other first functional block, the target first functional block and all first functional blocks having a strong physical relationship therewith are collectively regarded as a first functional block group.

[0039] The advantage of this setting is that the first functional block group can be divided according to the smallest unit. Then, during the testing process of the heterogeneous API, if it is detected that a certain API sub-block has not passed the verification, the first functional block group can be directly checked, and the number of functional blocks in the first functional block group can be reduced as much as possible. This can reduce the inspection workload and make the heterogeneous API more reusable.

[0040] Optionally, after dividing the first RTL into multiple first functional block groups, each first functional block group is modeled separately to generate a first API sub-block corresponding to each first functional block group. The heterogeneous API may refer to a callable application programming interface. The API sub-block may be used as an API sub-block inside the heterogeneous API. The API sub-block may also be called and may be regarded as an abstract model of the functional block group in the RTL.

[0041] Figure 2 FIG. 1 is a schematic diagram of the mapping relationship between an optional function block group and an API sub-block. Figure 2 As shown, each sub_block in the RTL may refer to a first functional block, and sub_api may refer to a first API sub-block. Figure 2 In the example shown, sub_block1 can be independently used as a first functional block group. By obtaining the input, output and parameters of sub_block1, sub_block1 can be directly abstracted as sub_api1. Sub_api1 is the first API sub-block corresponding to sub_block1. There may be a strong physical relationship between sub_block2 and sub_block3. Therefore, sub_block2 and sub_block3 can be used together as a first functional block group and abstracted as sub_api2. Sub_block4 and sub_block5 can also be abstracted to generate corresponding first API sub-blocks, which will not be elaborated here.

[0042] S120. Connect the first API sub-blocks according to the first RTL to generate a first heterogeneous API.

[0043] Optionally, the connection relationship between the first API sub-blocks can be determined based on the connection relationship between the first functional blocks in the first RTL, so that the first API sub-blocks are connected according to the link relationship between the first API sub-blocks, and the connected first API sub-blocks together constitute a first heterogeneous API.

[0044] like Figure 2 As shown in the example, in the first RTL, sub_block1, sub_block2, sub_block3, sub_block4 and sub_block5 are connected in sequence, and the first functional blocks with strong connection relationships are all adjacent first functional blocks. Therefore, the connection mode between each first functional block group can be determined.

[0045] Figure 3 A schematic diagram of the structure of an optional heterogeneous API is shown below. Figure 3As shown, each API sub-block is connected according to the same connection method as that between each functional block, and the number of API sub-blocks corresponds to the number of functional block groups. However, in fact, RTL contains a large number of functional block groups, and the number of API sub-blocks in heterogeneous APIs is also large. Only a small number of API sub-blocks are used for illustrative purposes in the figure.

[0046] Optionally, after generating the first heterogeneous API, each first API sub-block in the first heterogeneous API can be verified separately, and the first heterogeneous API as a whole can be verified. If the first heterogeneous API and each first API sub-block pass the verification, the mapping relationship between the first heterogeneous API and the first RTL can be determined, which means that the technician can use the first heterogeneous API to simulate and verify the first RTL.

[0047] S130: When the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, a second RTL of the second heterogeneous integrated circuit module is obtained, and a second heterogeneous API is generated according to the first RTL, the second RTL and the first heterogeneous API.

[0048] It is understandable that different heterogeneous IPs have different internal architectures. If a heterogeneous API is manually generated for each heterogeneous IP, it will not only take a lot of time, but also take a lot of time to verify the APIs separately after the heterogeneous APIs are generated. However, after the heterogeneous APIs are generated according to the method of the embodiment of the present invention, when the functional blocks inside the heterogeneous IP change, it is only necessary to edit the API sub-blocks corresponding to the changed functional blocks accordingly, so that the heterogeneous APIs can be quickly generated and the reliability of the heterogeneous APIs can be guaranteed at the same time.

[0049] Optionally, the first heterogeneous integrated circuit module can be used as a reference heterogeneous IP, and other heterogeneous IPs with internal structure changes made on the basis of the first heterogeneous integrated circuit module can be used as the second heterogeneous integrated circuit module.

[0050] Optionally, after obtaining the second RTL, changes of the second RTL relative to the first RTL can be determined based on the first RTL and the second RTL. The changes may at least include newly added functional blocks, internal adjustments of functional blocks, deletion of functional blocks, and adjustment of the order of functional blocks. After determining the changes, adjustments can be made between API sub-blocks based on the first heterogeneous API and according to the second functional blocks that have an association with the changes, thereby generating a second heterogeneous API.

[0051] Optionally, the second functional block may refer to a functional block in a second heterogeneous integrated circuit, the second heterogeneous API may refer to a heterogeneous API having a mapping relationship with the second heterogeneous integrated circuit, and the second heterogeneous API includes multiple second API sub-blocks.

[0052] Optionally, for the change items of the newly added functional blocks, a second functional block group corresponding to the newly added functional blocks can be determined; if the newly added functional blocks alone serve as a second functional block group, a second API sub-block corresponding to the second functional block group is generated; if the newly added functional blocks are combined with existing functional blocks in the first heterogeneous RTL as the second functional block group, the first API sub-block corresponding to the functional block group is modified to obtain the modified second API sub-block.

[0053] Optionally, for the change item of the internal adjustment of the function block, a first API sub-block corresponding to the internally adjusted function block may be determined, and parameters of the first API sub-block may be adjusted to obtain a second API sub-block.

[0054] Optionally, for the change item of deleting a function block, it is only necessary to delete the corresponding first API sub-block based on the first heterogeneous API, and the function blocks with a strong link relationship in the same function block group are generally deleted at the same time.

[0055] Optionally, for the change item of adjusting the order of functional blocks, it is only necessary to change the connection relationship between the related first API sub-blocks based on the first heterogeneous API.

[0056] Figure 4 FIG. 1 shows a schematic diagram of an adjustment method of API sub-blocks in a heterogeneous API. Figure 4 As shown, if the change item is to delete a function block, the corresponding API sub-block will be deleted accordingly. At this time, based on the first heterogeneous API, the API sub-blocks that still need to be retained can be connected accordingly, and the unconnected sub_api3 and sub_api5 can be reused later, but in the second heterogeneous API, they do not participate in data transmission and processing; if the change item is to adjust the order of function blocks, the sub-blocks in the first heterogeneous API are reconnected according to the adjusted order to obtain the second heterogeneous API; if the change item is to add a new function block, and the corresponding sub_api7 is added, then according to the connection relationship between the function blocks, sub_api7 is connected to the original API sub-blocks in the first heterogeneous API to obtain the second heterogeneous API.

[0057] It is understandable that, in actual use, it is only necessary to generate the corresponding first heterogeneous API for the first heterogeneous RTL. When the technicians subsequently update the structure in the RTL, they can quickly modify the first heterogeneous API according to the current update content and generate the currently required second heterogeneous API, thereby reducing development costs and shortening the development cycle.

[0058] The technical solution of the embodiment of the present invention obtains the first RTL of the first heterogeneous integrated circuit module, generates multiple first API sub-blocks according to the first functional blocks in the first RTL, connects the first API sub-blocks according to the first RTL to generate a first heterogeneous API, and when the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, obtains the second RTL of the second heterogeneous integrated circuit module, and generates the second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API, thereby generating a matching heterogeneous API for a heterogeneous integrated circuit module with frequently adjusted architecture, reducing the development difficulty of the heterogeneous API, and can perform more fine-grained verification on the RTL, thereby improving the adequacy of the verification. From the perspective of verification, abnormal heterogeneous IPs and abnormal parts inside the heterogeneous IPs can be quickly located, thereby improving the error repair efficiency of the heterogeneous IPs and accelerating the development progress of the heterogeneous integrated circuit modules.

[0059] Embodiment 2

[0060] Figure 5 This is a flowchart of a method for generating an API for a heterogeneous integrated circuit module provided by the second embodiment of the present invention. This embodiment specifically describes the method for generating an API for a heterogeneous integrated circuit module based on the above embodiment. Figure 5 As shown, the method includes:

[0061] S210. Obtain a first RTL of a first heterogeneous integrated circuit module.

[0062] S220 . Determine a plurality of first function block groups according to the structural information of each first function block in the first RTL, model each first function block group, and generate a first API sub-block corresponding to each first function block group.

[0063] Each first functional block group includes at least one first functional block.

[0064] S230. Determine the connection mode between the first API sub-blocks according to the connection mode of each first function block group in the first RTL and the correspondence between the first function block group and the first API sub-block, and connect the first API sub-blocks according to the connection mode between the first API sub-blocks to generate a first heterogeneous API.

[0065] S240, perform functional verification on the first heterogeneous API and each first API sub-block respectively. If it is determined that the first heterogeneous API and each first API sub-block have passed the verification, execute step S250; if it is determined that at least one API sub-block has not passed the verification, execute step S260.

[0066] S250. Determine a mapping relationship between the first heterogeneous API and the first RTL, and execute step S270.

[0067] S260: Locate an abnormal first functional block group in the first heterogeneous integrated circuit module according to the API sub-block that has not passed the verification.

[0068] Optionally, when an API sub-block that has not passed verification is determined, it is only necessary to determine the first functional block group corresponding to it in the first RTL, and then the technical staff can check and repair the functional block group, which solves the pain point of the prior art that a large amount of troubleshooting is required to locate the fault, and simultaneously improves the fault inspection efficiency and testing efficiency.

[0069] S270. When the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, a second RTL of the second heterogeneous integrated circuit module is obtained.

[0070] S280 , performing architecture analysis on the first RTL and the second RTL to determine at least one change item of the second RTL relative to the first RTL.

[0071] Optionally, the change items include adding new function blocks, adjusting the internal function blocks, deleting function blocks and adjusting the order of function blocks.

[0072] S290: Generate a second heterogeneous API according to the changed item and the first heterogeneous API.

[0073] Optionally, generating a second heterogeneous API according to the changed item and the first heterogeneous API includes at least one of the following:

[0074] When it is determined that the change item only includes deleting the second function block and / or adjusting the order of the second function block, determining each second API sub-block based on the first heterogeneous API, and connecting the second API sub-blocks according to the second RTL to generate a second heterogeneous API; and

[0075] When it is determined that the change item includes at least one of a newly added second function block and an internal adjustment of the second function block, a target function block group corresponding to the newly added or internally adjusted second function block is determined, and a new API sub-block corresponding to each target function block group is generated; based on the change item, the newly added API sub-block and the first heterogeneous API, a plurality of second API sub-blocks are determined, and based on the second RTL, the second API sub-blocks are connected to generate a second heterogeneous API.

[0076] Optionally, functional verification is required for the newly added API sub-blocks and the second heterogeneous API.

[0077] The technical solution of the embodiment of the present invention obtains the first RTL of the first heterogeneous integrated circuit module, generates multiple first API sub-blocks according to the first functional blocks in the first RTL, connects the first API sub-blocks according to the first RTL to generate a first heterogeneous API, and when the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, obtains the second RTL of the second heterogeneous integrated circuit module, and generates the second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API, thereby generating a matching heterogeneous API for a heterogeneous integrated circuit module with frequently adjusted architecture, reducing the development difficulty of the heterogeneous API, and can perform more fine-grained verification on the RTL, thereby improving the adequacy of the verification. From the perspective of verification, abnormal heterogeneous IPs and abnormal parts inside the heterogeneous IPs can be quickly located, thereby improving the error repair efficiency of the heterogeneous IPs and accelerating the development progress of the heterogeneous integrated circuit modules.

[0078] Embodiment 3

[0079] Figure 6 This is a schematic diagram of the structure of an API generation device for a heterogeneous integrated circuit module provided in Embodiment 3 of the present invention. Figure 6 As shown, the device includes: a first API sub-block generation module 310, a first heterogeneous API generation module 320 and a second heterogeneous API generation module 330.

[0080] The first API sub-block generating module 310 is used to obtain a first RTL of a first heterogeneous integrated circuit module, and generate a plurality of first API sub-blocks according to each first functional block in the first RTL.

[0081] The first heterogeneous API generating module 320 is used to connect the first API sub-blocks according to the first RTL to generate a first heterogeneous API.

[0082] The second heterogeneous API generation module 330 is used to obtain the second RTL of the second heterogeneous integrated circuit module when the architecture of the first heterogeneous integrated circuit module is adjusted to generate the second heterogeneous integrated circuit module, and generate the second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API.

[0083] The technical solution of the embodiment of the present invention obtains the first RTL of the first heterogeneous integrated circuit module, generates multiple first API sub-blocks according to the first functional blocks in the first RTL, connects the first API sub-blocks according to the first RTL to generate a first heterogeneous API, and when the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, obtains the second RTL of the second heterogeneous integrated circuit module, and generates the second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API, thereby generating a matching heterogeneous API for a heterogeneous integrated circuit module with frequently adjusted architecture, reducing the development difficulty of the heterogeneous API, and can perform more fine-grained verification on the RTL, thereby improving the adequacy of the verification. From the perspective of verification, abnormal heterogeneous IPs and abnormal parts inside the heterogeneous IPs can be quickly located, thereby improving the error repair efficiency of the heterogeneous IPs and accelerating the development progress of the heterogeneous integrated circuit modules.

[0084] Based on the above embodiments, the first API sub-block generation module 310 can be specifically used for:

[0085] Determine a plurality of first function block groups according to the structural information of each first function block in the first RTL, model each first function block group, and generate a first API sub-block corresponding to each first function block group;

[0086] Each first functional block group includes at least one first functional block.

[0087] Based on the above embodiments, the first heterogeneous API generation module 320 can be specifically used for:

[0088] According to the connection method of each first function block group in the first RTL, and the correspondence between the first function block group and the first API sub-block, the connection method between the first API sub-blocks is determined, and the first API sub-blocks are connected according to the connection method between the first API sub-blocks to generate a first heterogeneous API.

[0089] On the basis of the above embodiments, a heterogeneous API verification module may also be included, which is specifically used to:

[0090] Performing functional verification on the first heterogeneous API and each first API sub-block respectively;

[0091] If it is determined that the first heterogeneous API and each first API sub-block are verified, determining a mapping relationship between the first heterogeneous API and the first RTL;

[0092] If it is determined that at least one API sub-block fails the verification, an abnormal first functional block group is located in the first heterogeneous integrated circuit module according to the API sub-block that fails the verification.

[0093] Based on the above embodiments, the second heterogeneous API generation module 330 may include:

[0094] A change item confirmation unit, configured to perform architecture analysis on the first RTL and the second RTL, and determine at least one change item of the second RTL relative to the first RTL;

[0095] The API adjustment unit is used to generate a second heterogeneous API according to the change item and the first heterogeneous API.

[0096] Based on the above embodiments, the change items include adding new function blocks, adjusting the internal function blocks, deleting function blocks and adjusting the order of function blocks.

[0097] Based on the above embodiments, the API adjustment unit can be used to perform any of the following:

[0098] When it is determined that the change item only includes deleting the second function block and / or adjusting the order of the second function block, determining each second API sub-block based on the first heterogeneous API, and connecting the second API sub-blocks according to the second RTL to generate a second heterogeneous API; and

[0099] When it is determined that the change item includes at least one of adding a second functional block and adjusting the second functional block internally, determining a target functional block group corresponding to the newly added or internally adjusted second functional block, and generating a newly added API sub-block corresponding to each target functional block group;

[0100] According to the changed items, the newly added API sub-blocks and the first heterogeneous API, a plurality of second API sub-blocks are determined, and according to the second RTL, the second API sub-blocks are connected to generate a second heterogeneous API.

[0101] The API generation device for a heterogeneous integrated circuit module provided in an embodiment of the present invention can execute the API generation method for a heterogeneous integrated circuit module provided in any embodiment of the present invention, and has functional modules and beneficial effects corresponding to the execution method.

[0102] Embodiment 4

[0103] Figure 7A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0104] like Figure 7 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. The input / output (I / O) interface 15 is also connected to the bus 14.

[0105] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0106] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The processor 11 executes the various methods and processes described above, such as the API generation method for a heterogeneous integrated circuit module as described in an embodiment of the present invention. That is:

[0107] Obtaining a first RTL of a first heterogeneous integrated circuit module, and generating a plurality of first API sub-blocks according to each first functional block in the first RTL;

[0108] According to the first RTL, the first API sub-blocks are connected to generate a first heterogeneous API;

[0109] When the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, a second RTL of the second heterogeneous integrated circuit module is obtained, and a second heterogeneous API is generated according to the first RTL, the second RTL and the first heterogeneous API.

[0110] In some embodiments, the API generation method for heterogeneous integrated circuit modules may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the API generation method for heterogeneous integrated circuit modules described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to execute the API generation method for heterogeneous integrated circuit modules in any other appropriate manner (e.g., by means of firmware).

[0111] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0112] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0113] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, device, or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0114] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0115] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0116] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0117] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0118] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for generating an API for a heterogeneous integrated circuit module, characterized in that: include: Acquire a first register transfer level circuit RTL of a first heterogeneous integrated circuit module, and generate a plurality of first API sub-blocks according to each first functional block in the first RTL; According to the first RTL, the first API sub-blocks are connected to generate a first heterogeneous API; When the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, a second RTL of the second heterogeneous integrated circuit module is obtained, and a second heterogeneous API is generated according to the first RTL, the second RTL and the first heterogeneous API; The step of generating a second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API includes: Performing architecture analysis on the first RTL and the second RTL to determine changes in the second RTL relative to the first RTL; the changes at least include adding a new function block, adjusting the function block internally, deleting a function block, and adjusting the order of function blocks; According to the second functional block associated with the change item, the API sub-blocks are adjusted based on the first heterogeneous API to generate a second heterogeneous API.

2. The method according to claim 1, characterized in that According to each first function block in the first RTL, a plurality of first API sub-blocks are generated, including: Determine a plurality of first function block groups according to the structural information of each first function block in the first RTL, model each first function block group, and generate a first API sub-block corresponding to each first function block group; Each first functional block group includes at least one first functional block.

3. The method according to claim 2, characterized in that According to the first RTL, the first API sub-blocks are connected to generate a first heterogeneous API, including: According to the connection method of each first function block group in the first RTL, and the correspondence between the first function block group and the first API sub-block, the connection method between the first API sub-blocks is determined, and the first API sub-blocks are connected according to the connection method between the first API sub-blocks to generate a first heterogeneous API.

4. The method according to claim 3, characterized in that After the first API sub-blocks are connected according to the first RTL to generate the first heterogeneous API, the method further includes: Performing functional verification on the first heterogeneous API and each first API sub-block respectively; If it is determined that the first heterogeneous API and each first API sub-block are verified, determining a mapping relationship between the first heterogeneous API and the first RTL; If it is determined that at least one API sub-block fails the verification, an abnormal first functional block group is located in the first heterogeneous integrated circuit module according to the API sub-block that fails the verification.

5. The method according to claim 4, characterized in that Generating a second heterogeneous API according to the changed item and the first heterogeneous API includes at least one of the following: When it is determined that the change item only includes deleting the second function block and / or adjusting the order of the second function block, determining each second API sub-block based on the first heterogeneous API, and connecting the second API sub-blocks according to the second RTL to generate a second heterogeneous API; as well as When it is determined that the change item includes at least one of adding a second functional block and adjusting the second functional block internally, determining a target functional block group corresponding to the newly added or internally adjusted second functional block, and generating a newly added API sub-block corresponding to each target functional block group; According to the changed items, the newly added API sub-blocks and the first heterogeneous API, a plurality of second API sub-blocks are determined, and according to the second RTL, the second API sub-blocks are connected to generate a second heterogeneous API.

6. An API generation device for a heterogeneous integrated circuit module, characterized in that: include: A first API sub-block generation module, configured to obtain a first register transfer level circuit RTL of a first heterogeneous integrated circuit module, and generate a plurality of first API sub-blocks according to each first functional block in the first RTL; A first heterogeneous API generation module, configured to connect the first API sub-blocks according to the first RTL to generate a first heterogeneous API; A second heterogeneous API generation module is used to obtain a second RTL of the second heterogeneous integrated circuit module when the architecture of the first heterogeneous integrated circuit module is adjusted to generate a second heterogeneous integrated circuit module, and generate a second heterogeneous API according to the first RTL, the second RTL and the first heterogeneous API; The second heterogeneous API generation module is specifically used for: Performing architecture analysis on the first RTL and the second RTL to determine changes in the second RTL relative to the first RTL; the changes at least include adding a new function block, adjusting the function block internally, deleting a function block, and adjusting the order of function blocks; According to the second functional block associated with the change item, the API sub-blocks are adjusted based on the first heterogeneous API to generate a second heterogeneous API.

7. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the API generation method for a heterogeneous integrated circuit module according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the API generation method for a heterogeneous integrated circuit module according to any one of claims 1 to 5 when executed.

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