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Method and system for storing elements of tri-state content addressable memory without ordering

A technology of addressable memory and random access memory, which is applied in the network field to achieve the effect of reducing complexity, solving the problem of fast update of entries, and efficient and flexible adjustment

Inactive Publication Date: 2010-12-29
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

[0011] The problem to be solved by the present invention is that: aiming at the technical problems existing in the prior art, the present invention provides a method that can fundamentally eliminate the requirement for orderly storage of TCAM entries, realize sort-free storage of entries, and relieve entry storage and management. The three-state content-addressable memory entry sort-free storage method and its system are based on the maximum constraint and can be combined with an optimized entry management strategy to completely solve the entry update complexity problem

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  • Method and system for storing elements of tri-state content addressable memory without ordering
  • Method and system for storing elements of tri-state content addressable memory without ordering
  • Method and system for storing elements of tri-state content addressable memory without ordering

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Embodiment Construction

[0067] In the tri-state content addressable memory item sorting-free storage method of the present invention, first, the item mask priority is calculated through the mask, and the item operation instruction and the item mask priority are stored together in the associated random access memory RAM, and The rule entry corresponding to the entry operation instruction is stored in the three-state content addressable memory; when the network data is received, the corresponding protocol analysis is performed, and the agreed field is extracted to form a matching keyword and sent to the three-state content addressable memory Perform a matching search, obtain the entry operation instruction of the corresponding data packet in the associated random access memory RAM according to the matching result, and finally complete the corresponding operation and output forwarding; when a multi-match hit occurs, compare the entry mask priority of the hit entry and decide The best result output. It i...

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Abstract

The invention discloses a sequencing-free storage method for the entries of a ternary content addressable memory and a system thereof. The regular entries do not need the sequencing treatment, and are continuously stored in the ternary content addressable memory (TCAM). The mask priority is worked out by using the regular mask and stored in an associated random access memory (RAM) together with the operating instruction. After the network data is received, the protocol analysis is carried out, the appointed fields are drawn out and form into the matched keyword which is sent into the TCAM forthe matching research, then the operating instruction of the corresponding data package is obtained from the associated RAM according to the matching result, and the corresponding operation and outputting and forwarding are finally completed. When the multiple-matching is hit, the mask priorities of all entries to be hit are compared to obtain the optimal result and the optimal result is outputted. The invention realizes the effective separation of the outputting judgment and the storage address, eliminates the storage orderliness requirement of the TCAM entries, relieves the maximum restrictof the entry storage and management, combines the optimal entry management policy, and thoroughly solves the complexity problem of entry updating.

Description

technical field [0001] The invention mainly relates to the field of network technology, in particular to a sort-free storage method and system for three-state content addressable memory items. Background technique [0002] With the rapid development of the Internet, the number of nodes in the network has increased significantly, and the interface rate of routers has also become higher and higher. In the worst case (calculated as the shortest IP packet is 40 bytes, 100% traffic load), processing at 10Gbps interface rate The capacity requirement reaches 31Mpps (packet per second), while the processing capacity at the interface rate of 40Gbps must reach 125Mpps. With the emergence of various new network applications, the requirements for high-quality network services are becoming more and more complex, and the packet classification technology is also facing greater challenges. The traditional software-based route lookup and classification methods require multiple memory Intera...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/56H04L29/06
Inventor 邓黠黄芝平苏绍璟刘纯武唐贵林张羿猛左震吕喜在郭熙业
Owner NAT UNIV OF DEFENSE TECH
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