Frequency detection circuit and method of clock data restorer

Abstract

The invention relates to a frequency detection circuit and a method thereof, used for a clock data restorer. The circuit comprises a phase detector, a first delayer, a frequency detector and a logic circuit, wherein the phase detector samples data signals according to a first clock signal provided by a clock data restorer and provides a phase indication signal according to a sample value. The first delayer delays the first clock signal into a second clock signal. The frequency detector is coupled with the first delayer, samples data signals according to the second clock signal and provides a frequency indication signal according to a sample value. The logic circuit is coupled with the phase detector and the frequency detector and uses the phase indication signal and the frequency indication signal to carry out logical operation so as to generate a clock indication signal. The clock data restorer adjusts the frequency of the first clock signal according to the state of the clock indication signal.

Description

technical field [0001] The present invention relates to a clock data recovery circuit, and in particular to a frequency detection circuit and method of the clock data recovery circuit. Background technique [0002] At the receiving end of high-speed serial data, in order to obtain data correctly, there must be a clock signal as the basis for sampling (sample) data, and the frequency and phase of the clock signal must be locked to the received data signal. Traditional receivers use clock data restorers to provide such clock signals. [0003] figure 1 is a schematic diagram of a conventional clock data restorer 100 . Wherein, a voltage control oscillator (VCO: voltage control oscillator) 103 provides a clock signal CLK. The phase detector 101 samples the data signal DS according to the clock signal CLK, and provides an indication signal IS according to the sampled value. The charge pump 102 controls the VCO 103 to adjust the frequency of the clock signal CLK according to t...

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