Method, device, and system for processing messages based on CC-NUMA

Abstract

Disclosed are a message processing method, device and system based on CC-NUMA. A certain node controller in the present node performs address resolution on a message sent by another node, and if the destination address of the message is the present node and the catalogue of the address space corresponding to the message is maintained by the node controller, it determines a processor to which the address space corresponding to the message belongs; if the link of a quick path interconnect bus between the node controller and the processor is normal, then it sends the message to the processor via the quick path interconnect bus, so that the processor processes the message; if the link of the quick path interconnect bus between the node controller and the processor ­has failed, or the catalogue of the address space corresponding to the message is not maintained by the node controller, then it forwards the message to another node controller in the present node and this other node controller processes the message. The method can improve the efficiency and reliability of accessing system resources.

Description

technical field [0001] The present invention relates to the technical field of non-uniform storage access, in particular to a CC-NUMA-based message processing method, device and system. Background technique [0002] Cache Coherence Non-uniform Memory Access (CC-NUMA, Cache Coherence Non-uniform Memory Access) is an important system architecture currently used in the design of massively parallel computers. In the CC-NUMA system, each node is composed of a node controller and multiple CPUs, each node is interconnected through a network, and each CPU can access both local memory resources and other nodes in the entire system Since each central processing unit accesses local memory resources faster than other nodes' memory resources, the system is called a "non-uniform" access system. [0003] In the CC-NUMA system, there is a node controller in each node, and the node controller can complete distributed memory sharing and cache consistency maintenance. see figure 1 , is the ...

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Problems solved by technology

[0005] In order to complete the sharing of resources in the system, the node controller needs to maintain the directory of the address space in the entire node, and perform routing processing for the messages accessing the two central processors, and the system resource access efficiency is low

At the same time, when the QPI bus connection between the processor and the node controller fails, or the node controller itself fails, other nodes may not be able to send messages to the node, cannot access the resources in the node, or cause the entire node to fail. The file processing is interrupted, which affects the resource access of the entire system, and the reliability of system resource access is low.

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