DDR (Double Data Rate) 2 SDRAM (Synchronous Dynamic Random Access Memory) controller

Abstract

The invention provides a DDR (Double Data Rate) 2 SDRAM (Synchronous Dynamic Random Access Memory) controller. The controller comprises a control module, an initialization module, a configuration module, a data channel module and an execution module, wherein the control module is used for sending a control signal, receiving a feedback of the control signal, sending a sequence instruction, determining the conversion of operation states and providing a state indication signal for a system; the initialization module is used for initializing the DDR2 SDRAM controller and a DDR2 SDRAM and setting a register; the configuration module is used for configuring, controlling and indicating states of the DDR2 SDRAM controller and the DDR2 SDRAM; the data channel module is used for modulating and demodulating reading-writing data and providing data for the DDR2 SDRAM and a host computer port; and the execution module is used for receiving the sequence instruction and decoding an address carried in the sequence instruction into a sector address, a row address and a column address, judging the type of the current operation according to an instruction signal and selecting a corresponding channel to access. The DDR2 SDRAM controller hides a complex sequential operation and can be matched with various DDR2 SDRAM controllers.

Description

technical field [0001] The invention provides a DDR2SDRAM control interface, which belongs to the technical field of DDR2SDRAM interface algorithms. Background technique [0002] As a new generation of memory, DDR2SDRAM has the advantages of low price, large capacity, and fast speed, but it also has its own limitations. The read and write operations of DDR2 SDRAM are very complicated, and there are many parameters. These parameters must be satisfied during the operation to ensure the stable operation of SDRAM. [0003] DDR2 SDRAM is currently the mainstream memory in the memory market. In addition to general-purpose computer systems, a large number of embedded systems also use DDR2 memory. More and more SoC system chips will integrate DDR2 interface modules, but there is no one that can Matching various DDR2SDRAM memory controllers. Contents of the invention [0004] The purpose of the invention is to provide a memory controller capable of matching various DDR2 SDRAMs. ...

AI Technical Summary

Problems solved by technology

[0003] DDR2 SDRAM is currently the mainstream memory in the memory market. In addition to general-purpose computer systems, a large number of embedded systems also use DDR2 memory. More and more SoC system chips will integrate DDR2 interface modules, but there is no one that can Memory controller matching various DDR2SDRAM

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