Semiconductor device and preparation method thereof

Abstract

The invention provides a semiconductor device and a preparation method thereof, relating to the technical field of semiconductors. The preparation method of the semiconductor device has the beneficial effect that regulation of threshold voltages of transistors is achieved by adding cap layers and barrier layers in a gate laminated structure, so that the semiconductor device with multiple threshold voltages can be better achieved. Regulation of the threshold voltages of the transistors can be achieved as the cap layers and the barrier layers are added in the gate laminated structure, so that the semiconductor device has better threshold voltage characteristics.

Description

technical field

[0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique

[0002] In the field of semiconductor technology, how to reduce power consumption while ensuring the performance of semiconductor devices has become a major challenge faced by people. Power consumption / performance optimization (Power-performance optimization) usually requires semiconductor devices to have multiple threshold voltages (Vt) and low off-current (Ioff). In planar bulk silicon semiconductor devices, multiple threshold voltages are achieved by using two work function layers (corresponding to NFET and PFET respectively) and using different gate lengths and doping concentrations. Fin Field Effect Transistor (FinFET) has excellent electrostatic control ability due to its small device size and small operating voltage. However, the reduction of device size and operating voltage, especial...

Examples

Embodiment 1

[0100] An embodiment of the present invention provides a method for manufacturing a semiconductor device. The method realizes the adjustment of the threshold voltage of the transistor by adding a cap layer (cap layer) and a barrier layer (barrier layer) in the gate stack structure, which can be more Semiconductor devices with multiple threshold voltages are well realized.

[0101] Below, refer to Figure 1A to Figure 1H as well as Figure 3A A method for manufacturing a semiconductor device proposed in Embodiment 1 of the present invention will be described. in, Figure 1A to Figure 1H A schematic cross-sectional view of a structure formed in the relevant steps of a method for manufacturing a semiconductor device according to an embodiment of the present invention; Figure 3A It is a typical flowchart of a manufacturing method of a semiconductor device according to an embodiment of the present invention.

[0102] The method for manufacturing a semiconductor device according ...

Embodiment 2

[0167] The embodiment of the present invention provides another method for manufacturing a semiconductor device, which also realizes the adjustment of the threshold voltage of the transistor by adding a cap layer (cap layer) and a barrier layer (barrier layer) in the gate stack structure, Semiconductor devices with multiple threshold voltages can be better realized. The difference from Embodiment 1 is that the manufacturing method of the semiconductor device in this embodiment omits the step of forming a silicon germanium layer in the channel region of the P-type low-voltage transistor, and adds the step of forming a fourth function in the P-type low-voltage transistor. Function metal layer steps.

[0168] Below, refer to Figure 2A to Figure 2G as well as Figure 3B A method for manufacturing a semiconductor device proposed in Embodiment 2 of the present invention will be described. in, Figure 2A to Figure 2G A schematic cross-sectional view of a structure formed in the ...

Embodiment 3

[0220] An embodiment of the present invention provides a semiconductor device, which can be manufactured by using the method for manufacturing the semiconductor device in the first embodiment above.

[0221] Below, refer to Figure 4 The structure of a semiconductor device proposed in Embodiment 3 of the present invention will be described. in, Figure 4 It is a schematic cross-sectional view of the structure of a semiconductor device according to an embodiment of the present invention.

[0222] Such as Figure 4 As shown, the semiconductor device of this embodiment includes: a semiconductor substrate 100 and an N-type low-threshold voltage transistor, an N-type high-threshold voltage transistor, a P-type low-threshold voltage transistor, and a P-type high-threshold voltage transistor located on the semiconductor substrate 100 . Wherein, the N-type low-threshold voltage transistor, the N-type high-threshold voltage transistor, the P-type low-threshold voltage transistor, a...

technical field

[0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique

[0002] In the field of semiconductor technology, how to reduce power consumption while ensuring the performance of semiconductor devices has become a major challenge faced by people. Power consumption / performance optimization (Power-performance optimization) usually requires semiconductor devices to have multiple threshold voltages (Vt) and low off-current (Ioff). In planar bulk silicon semiconductor devices, multiple threshold voltages are achieved by using two work function layers (corresponding to NFET and PFET respectively) and using different gate lengths and doping concentrations. Fin Field Effect Transistor (FinFET) has excellent electrostatic control ability due to its small device size and small operating voltage. However, the reduction of device size and operating voltage, especial...

Examples

Embodiment 1

[0100] An embodiment of the present invention provides a method for manufacturing a semiconductor device. The method realizes the adjustment of the threshold voltage of the transistor by adding a cap layer (cap layer) and a barrier layer (barrier layer) in the gate stack structure, which can be more Semiconductor devices with multiple threshold voltages are well realized.

[0101] Below, refer to Figure 1A to Figure 1H as well as Figure 3A A method for manufacturing a semiconductor device proposed in Embodiment 1 of the present invention will be described. in, Figure 1A to Figure 1H A schematic cross-sectional view of a structure formed in the relevant steps of a method for manufacturing a semiconductor device according to an embodiment of the present invention; Figure 3A It is a typical flowchart of a manufacturing method of a semiconductor device according to an embodiment of the present invention.

[0102] The method for manufacturing a semiconductor device according ...

Embodiment 2

[0167] The embodiment of the present invention provides another method for manufacturing a semiconductor device, which also realizes the adjustment of the threshold voltage of the transistor by adding a cap layer (cap layer) and a barrier layer (barrier layer) in the gate stack structure, Semiconductor devices with multiple threshold voltages can be better realized. The difference from Embodiment 1 is that the manufacturing method of the semiconductor device in this embodiment omits the step of forming a silicon germanium layer in the channel region of the P-type low-voltage transistor, and adds the step of forming a fourth function in the P-type low-voltage transistor. Function metal layer steps.

[0168] Below, refer to Figure 2A to Figure 2G as well as Figure 3B A method for manufacturing a semiconductor device proposed in Embodiment 2 of the present invention will be described. in, Figure 2A to Figure 2G A schematic cross-sectional view of a structure formed in the ...

Embodiment 3

[0220] An embodiment of the present invention provides a semiconductor device, which can be manufactured by using the method for manufacturing the semiconductor device in the first embodiment above.

[0221] Below, refer to Figure 4 The structure of a semiconductor device proposed in Embodiment 3 of the present invention will be described. in, Figure 4 It is a schematic cross-sectional view of the structure of a semiconductor device according to an embodiment of the present invention.

[0222] Such as Figure 4 As shown, the semiconductor device of this embodiment includes: a semiconductor substrate 100 and an N-type low-threshold voltage transistor, an N-type high-threshold voltage transistor, a P-type low-threshold voltage transistor, and a P-type high-threshold voltage transistor located on the semiconductor substrate 100 . Wherein, the N-type low-threshold voltage transistor, the N-type high-threshold voltage transistor, the P-type low-threshold voltage transistor, a...

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