Semiconductor device and method of making the same

A technology for semiconductors and devices, applied in the field of semiconductor devices and their fabrication, can solve the problems of not being able to obviously improve the hot carrier effect, the effect of the maximum lateral electric field is not obvious, etc., so as to reduce the hot carrier effect and production cost. Low, reliability-enhancing effect

Active Publication Date: 2018-09-04
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the effect of reducing the maximum lateral electric field along the channel direction between the source and drain is not obvious, so the hot carrier effect cannot be significantly improved

Method used

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  • Semiconductor device and method of making the same
  • Semiconductor device and method of making the same
  • Semiconductor device and method of making the same

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Embodiment Construction

[0021] Next, the present invention will be described more fully with reference to the accompanying drawings, in which embodiments of the invention are shown. However, this invention may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

[0022] It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer. A layer may be on, adjacent to, connected to, or coupled to other elements or layers, or intervening elements or layers may be present. In contrast, when a...

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PUM

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Abstract

The invention discloses a semiconductor device and a manufacturing method thereof. The manufacturing method comprises a) providing a semiconductor substrate, on which a grid structure is formed, wherein shallow doped area are formed on two sides of the grid structure in the semiconductor substrate; b) forming a sidewall material layer on the semiconductor substrate and the grid structure, wherein the sidewall material layer comprises an oxide layer and a nitride layer alternatively formed; c) dry etching the sidewall material layer until exposing a lowest layer in the sidewall material layer; d) wet etching an exposed oxide layer or an exposed nitride layer so as to form sidewalls on two sides of the grid structure, wherein the residual oxide layer and the residual nitride layer posses different widths; and e) performing source-drain doping on the semiconductor substrate so that the semiconductor substrate corresponding with the sidewalls has doping gradients therein. The manufacturing method can effectively reduce hot carrier effect and enhance MOS device reliability.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, the size of semiconductor devices continues to decrease, the channel length becomes very short, and the electric field strength between the source and drain is strong, which easily forms a large number of destructive hot carriers. Hot carriers will produce hot carrier effects, which will affect the reliability of semiconductor devices. [0003] At present, the hot carrier effect is usually reduced by reducing the maximum lateral electric field strength along the channel direction between the source and the drain. For example, in the fabrication process of sub-micron MOSFET devices, a lightly doped drain region (LDD) with a shallower doping concentration is formed between the source and drain to slow down the doping g...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/36H01L29/66492H01L29/6653H01L29/6656H01L29/7833
Inventor刘俊文任小兵张花威
OwnerCSMC TECH FAB2 CO LTD