Shift register circuit, array substrate and display apparatus

A technology of shift registers and array substrates, applied in static memory, digital memory information, instruments, etc., to achieve the effect of improving the display effect, reducing horizontal stripes Mura, and reducing Flicker

Active Publication Date: 2016-05-25
BOE TECH GRP CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] However, the inventors of the present application have found that at the junction of adjacent GOA blocks, the resistive load and capacitive load of the drive signal input of the adjacently arranged shift registers will undergo relatively large jumps, thereb

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  • Shift register circuit, array substrate and display apparatus
  • Shift register circuit, array substrate and display apparatus
  • Shift register circuit, array substrate and display apparatus

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Embodiment Construction

[0034]The following introduces some of the possible embodiments of the present invention, which are intended to provide a basic understanding of the present invention, but are not intended to identify key or decisive elements of the present invention or limit the scope of protection. It is easy to understand that, according to the technical solution of the present invention, those skilled in the art may propose other alternative implementation manners without changing the essence and spirit of the present invention. Therefore, the following specific embodiments and drawings are only exemplary descriptions of the technical solution of the present invention, and should not be regarded as the entirety of the present invention or as a limitation or restriction on the technical solution of the present invention.

[0035] In the following description, for the sake of clarity and conciseness of description, all the multiple components shown in the figures are not described in detail, ...

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Abstract

The invention provides a shift register circuit, an array substrate and a display apparatus, and belongs to the technical field of display driving. The shift register circuit comprises two or more than two driving modules arranged on an array substrate for subarea driving according to a direction vertical to a grid wire, and any two adjacent driving modules in the direction vertical to the grid wire are defined as a first driving module and a second driving module, wherein first driving input wiring of the first driving module is arranged in such a way that first clock driving signals are successively accessed from a shift register at a first-end position of the first driving module to a shift register at a second-end position of the first driving module, and second driving input wiring of the second driving module is arranged in such a way that second clock driving signals are successively accessed from a shift register at a second-end position of the second driving module to a shift register at a first-end position of the second driving module. According to the invention, an RC delay at a juncture of the two driving modules basically does not jump, and the display effect is improved.

Description

technical field [0001] The invention belongs to the technical field of display driving, and relates to a block (Block) driving of GOA (GateDriverOnArray, a driver located on an array substrate), in particular to a shift register circuit, an array substrate and a display device. Background technique [0002] In the display panel, a gate drive circuit is required to drive the TFT array formed on the array substrate to control the display of each pixel or sub-pixel unit. Among them, the GOA technology is to manufacture the gate drive circuit on the array substrate to avoid Arranging circuit boards and chips for forming gate driving circuits outside the array substrate is very beneficial to reducing the frame size of the display, improving the integration of the display panel and reducing the cost, so it is widely used. [0003] In the existing GOA technology, a shift register arranged on an array substrate is used to provide a gate driving signal for a corresponding gate line, ...

Claims

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Application Information

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IPC IPC(8): G09G3/36G11C19/28
CPCG09G3/3677G11C19/28G11C5/063G09G3/3266G09G3/3674G09G2300/0408G09G2310/0286G09G2320/0223G11C19/287G09G3/2096G09G3/3666
Inventor 商广良韩承佑郑皓亮姚星韩明夫崔贤植林允植黄应龙田正牧董学
Owner BOE TECH GRP CO LTD
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