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Cell array computing system and method for group communication between cells

A cell array and computing system technology, applied in memory address/allocation/relocation and other directions, can solve problems affecting computer performance, poor cost-effectiveness ratio, etc., to achieve high parallelism, reduce processing burden, and improve efficiency.

Active Publication Date: 2018-09-14
SHANGHAI CIYU INFORMATION TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] The problem to be solved by the present invention is that the computer architecture in the prior art affects the improvement of the overall performance of the computer due to the communication bottleneck between the CPU, memory and storage, and makes the cost-effectiveness relatively poor

Method used

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  • Cell array computing system and method for group communication between cells
  • Cell array computing system and method for group communication between cells

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Embodiment Construction

[0046] Due to the communication bottleneck between the CPU, the memory and the storage in the computer architecture of the prior art, the improvement of the overall performance of the computer is affected, and the cost-effectiveness is relatively poor.

[0047] After research, the inventor of the present application considers that if the three functions of memory, storage and calculation are integrated into one chip, a relatively simple unit with independent calculation and storage functions will be formed, and a large number of such units will form a dense network. Communication network, in order to realize the function of data broadcasting / group sending and the internal network capable of large-scale parallel transmission of data, a computing architecture similar to the human brain can be developed, which is equivalent to building a large number of microcomputers in one on chip.

[0048] To this end, the technical solution of the present invention provides a computing archit...

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Abstract

The invention relates to a cell array calculation system and a communication method thereof. The cell array calculation system comprises a main-control central processing unit (CPU), a cell array and a cell array bus, wherein the cell array is a two-dimensional array comprising more than one cell compatible with functions of calculation and storage, the main-control CPU is in communication with each cell in the cell array through the cell array bus, a communication interface is arranged between adjacent cells and can be used for sending data, cells participating communication among cells comprise a starting cell, a terminal cell and transit cells, the starting cell is the cell for sending data to the terminal cell, the terminal cell is the cell for finally receiving the data sent from the starting cell, the transit cells are cells which are sequentially adjacent to one another along a communication path among the cells and are used for transiting the data sent from the starting cell through the communication interface, and an arbitrary cell also can be taken as the starting cell for group-sending communication to all cells in a target region. By the cell array calculation system, the communication bottleneck existing between the CPU and the memory and storage of a conventional computer framework can be overcome, and the comprehensive performance of the system is improved.

Description

technical field [0001] The invention relates to the technical field of computers and computer applications, in particular to a cell array computing system and a group communication method among cells. Background technique [0002] Generally speaking, a computer mainly includes three core parts: a central processing unit (CPU, Central Processing Unit), memory and storage. [0003] Through the unremitting efforts of some of the world's top companies, the CPU has evolved into an extremely complex semiconductor chip. The number of MOS tubes inside the top CPU core can exceed 100 million. The current industry trend is that it is difficult to increase the operating frequency of the CPU due to power consumption constraints. It is also difficult to improve the operating efficiency of the already extremely complex modern CPU. New CPU products are increasingly evolving towards multi-core. [0004] In terms of memory, the current dominant technology is Dynamic Random Access Memory ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/02
Inventor 戴瑾郭一民王践识
Owner SHANGHAI CIYU INFORMATION TECH CO LTD
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