Language source program generation method and device for neural network processor

Abstract

The invention discloses a source program generation method and device for a neural network processor, and the method comprises the steps: enabling a neural network algorithm to be mapped into abstractconcepts in a programming language, wherein elements in the neural network algorithm is in one-to-one correspondence with elements in the abstract concepts; mapping an abstraction concept in a programming language into a source program. According to the method, the abstract neural network concept can be directly mapped into codes in a source program, a programmer does not need to face boring instructions, and the programmer can use the advanced abstract neural network concept for programming.

Description

technical field [0001] The present disclosure relates to the field of computers, and further relates to the field of artificial intelligence. Background technique [0002] Deep neural network algorithm is a very popular machine learning algorithm recently, which is widely used in various fields, such as image recognition, speech recognition, natural language processing, etc. Since the deep neural network has achieved good results in various tasks, a variety of network structures and algorithms emerge in an endless stream, which brings challenges to programming development. For the neural network processor, due to its unique hardware structure and the characteristics of intensive calculation and memory access of the neural network algorithm running on it, programming becomes more complicated and difficult. [0003] During the process of implementing the present disclosure, the applicant found the following problems in the above-mentioned prior art: [0004] 1. Most of the n...

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Problems solved by technology

[0004] 1. Most of the neural network processors currently proposed are programmed by handwritten instructions. This method is very time-consuming and labor-intensive. It is also prone to errors and difficult to debug.

[0005] 2. At the same time, if the writers are not familiar with the structure of the hardware, it is difficult to write very efficient instruction codes

Lack of a straightforward, efficient method for parallel development to produce efficient parallel programs

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