Multi-chip flip-chip three-dimensional integrated packaging structure and manufacturing method thereof

Abstract

This application discloses a multi-chip flip-chip three-dimensional integrated packaging structure, including a first-level chip and a second-level chip. The second-level chip is connected to the first-level chip in a flip-chip manner. The first-level chip is fixed and connected to the assembly board through the assembly layer, and the second-level chip is connected to the assembly board through several long bumps, located on the upper part of the assembly board and the first-level chip One side of the core is fixed with a connection programming box between the cores, and the plurality of short bumps are connected to a short convex connection plate, and the plurality of long bumps are connected to a long convex connection plate, and the long convex connection plate and the short bumps are connected to each other. The contact part is isolated by insulating material, the long convex connection board is connected to the programming box between the cores through the up line, and the short convex connection board is connected to the programming box between the cores through the bent down line, and the down line wiring Insert it through the mounting notch on the mounting plate. The present application also discloses a manufacturing method of the above structure.

Description

technical field [0001] The present application relates to a multi-chip flip-chip three-dimensional integrated packaging structure and a manufacturing method thereof. Background technique [0002] In the existing multi-chip flip-chip technology, Chinese invention CN201811366711.5 discloses a multi-chip flip-chip three-dimensional integrated packaging structure and a manufacturing method thereof. The multi-chip flip-chip three-dimensional integrated packaging structure, such as Figure 7 As shown, the multi-chip flip-chip three-dimensional integrated package structure 100 includes a package substrate 110, a first chip 120, a chip layer 130, a second chip 140, a first bump 141, a second bump 142, a plastic encapsulation layer 150 and External pad 160 . The package substrate 110 is a common package substrate, such as acrylic, PCB, glass and other package substrates. In one disclosed embodiment, the package substrate is a multi-layer board, and re-distribution wiring lines are a...

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